From 07f7321c0f79c0b800d28898a480d044f839e813 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 6 Dec 2012 11:59:23 +0100
Subject: [PATCH 104/123] MIPS: lantiq: adds 4dword burst length for dma

---
 arch/mips/lantiq/xway/dma.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
index b5d76d1..986fbce 100644
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -47,6 +47,7 @@
 #define DMA_IRQ_ACK		0x7e		/* IRQ status register */
 #define DMA_POLL		BIT(31)		/* turn on channel polling */
 #define DMA_CLK_DIV4		BIT(6)		/* polling clock divider */
+#define DMA_4W_BURST		BIT(2)		/* 4 word burst length */
 #define DMA_2W_BURST		BIT(1)		/* 2 word burst length */
 #define DMA_MAX_CHANNEL		20		/* the soc has 20 channels */
 #define DMA_ETOP_ENDIANESS	(0xf << 8) /* endianess swap etop channels */
@@ -195,7 +196,8 @@ ltq_dma_init_port(int p)
 		 * Tell the DMA engine to swap the endianess of data frames and
 		 * drop packets if the channel arbitration fails.
 		 */
-		ltq_dma_w32_mask(0, DMA_ETOP_ENDIANESS | DMA_PDEN,
+		ltq_dma_w32_mask(0, (DMA_4W_BURST << 4) | (DMA_4W_BURST << 2) |
+			DMA_ETOP_ENDIANESS | DMA_PDEN,
 			LTQ_DMA_PCTRL);
 		break;
 
-- 
1.7.10.4

