From 27d97aa507d63033d907b80e33f6e4e8bb203c4b Mon Sep 17 00:00:00 2001 From: Jonas Jelonek Date: Fri, 16 Oct 2026 20:14:43 +0000 Subject: [PATCH] realtek: pcs: rtl930x: limit clock-ready polling to 10G SerDes The clock-ready debug readback is used by the SDK's 10G SerDes setup sequence. Restrict polling to 10G-type SerDes while retaining the existing exclusion for OFF mode. This avoids applying the check to the 5G QSGMII SerDes 0 and 1, which can report clock synchronization failures despite working links. Assisted-By: ChatGPT (OpenAI GPT-6.1 Sol) Link: https://github.com/openwrt/openwrt/pull/25882 Signed-off-by: Jonas Jelonek --- target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c index f2ae658e4e6..1eb1f98c78f 100644 --- a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c @@ -2303,7 +2303,8 @@ static int rtpcs_930x_sds_set_mode(struct rtpcs_serdes *sds, enum rtpcs_sds_mode if (ret) return ret; - if (hw_mode != RTPCS_SDS_MODE_OFF && rtpcs_930x_sds_wait_clock_ready(sds)) + if (sds->type == RTPCS_SDS_TYPE_10G && hw_mode != RTPCS_SDS_MODE_OFF && + rtpcs_930x_sds_wait_clock_ready(sds)) dev_err(sds->ctrl->dev, "SerDes %d could not sync clock\n", sds->id); if (rtpcs_930x_sds_init_state_machine(sds, hw_mode))