From 35747c66e18bc828cf57b20a8affa3c26b621adc Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Wed, 6 May 2026 20:30:16 +0800 Subject: [PATCH] mediatek: fix patch to enable an8855 eFuse Although the AN8855 eFuse driver was merged upstream, other drivers were not. Restore Kconfig dependencies to enable it. Also remove useless change logs from the patch. Fixes: 2129465 ("mediatek: fix patches for Linux 6.18") Signed-off-by: Chukun Pan Link: https://github.com/openwrt/openwrt/pull/23250 Signed-off-by: Christian Marangi --- .../737-net-dsa-add-Airoha-AN8855.patch | 107 ++---------------- 1 file changed, 12 insertions(+), 95 deletions(-) diff --git a/target/linux/mediatek/patches-6.18/737-net-dsa-add-Airoha-AN8855.patch b/target/linux/mediatek/patches-6.18/737-net-dsa-add-Airoha-AN8855.patch index affbd025e41..c86f2423acc 100644 --- a/target/linux/mediatek/patches-6.18/737-net-dsa-add-Airoha-AN8855.patch +++ b/target/linux/mediatek/patches-6.18/737-net-dsa-add-Airoha-AN8855.patch @@ -37,101 +37,7 @@ Saddly for that part we have absolutely NO documentation currently. There is this special thing where PHY needs to be calibrated with values from the switch efuse. (the thing have a whole cpu timer and MCU) -Changes v11: -- Address reviews from Christophe (spell mistake + dev_err_probe) -- Fix kconfig dependency for MFD driver (depends on MDIO_DEVICE instead of MDIO) - (indirectly fix link error for mdio APIs) -- Fix copy-paste error for MFD driver of_table -- Fix compilation error for PHY (move NVMEM to .config) -- Drop unneeded NVMEM node from MDIO example schema (from Andrew) -- Adapt MFD example schema to MDIO reg property restrictions -Changes v10: -- Entire rework to MFD + split to MDIO, EFUSE, SWITCH separate drivers -- Drop EEE OPs (while Russell finish RFC for EEE changes) -- Use new pcs_inpand OPs -- Drop AN restart function and move to pcs_config -- Enable assisted_learning and disable CPU learn (preparation for fdb_isolation) -- Move EFUSE read in Internal PHY driver to .config to handle EPROBE_DEFER - (needed now that NVMEM driver is register externally instead of internally to switch - node) -Changes v9: -- Error out on using 5G speed as currently not supported -- Add missing MAC_2500FD in phylink mac_capabilities -- Add comment and improve if condition for an8855_phylink_mac_config -Changes v8: -- Add port Fast Age support -- Add support for Port Isolation -- Use correct register for Learning Disable -- Add support for Ageing Time OP -- Set default PVID to 0 by default -- Add mdb OPs -- Add port change MTU -- Fix support for Upper VLAN -Changes v7: -- Fix devm_dsa_register_switch wrong export symbol -Changes v6: -- Drop standard MIB and handle with ethtool OPs (as requested by Jakub) -- Cosmetic: use bool instead of 0 or 1 -Changes v5: -- Add devm_dsa_register_switch() patch -- Add Reviewed-by tag for DT patch -Changes v4: -- Set regmap readable_table static (mute compilation warning) -- Add support for port_bridge flags (LEARNING, FLOOD) -- Reset fdb struct in fdb_dump -- Drop support_asym_pause in port_enable -- Add define for get_phy_flags -- Fix bug for port not inititially part of a bridge - (in an8855_setup the port matrix was always cleared but - the CPU port was never initially added) -- Disable learning and flood for user port by default -- Set CPU port to flood and learning by default -- Correctly AND force duplex and flow control in an8855_phylink_mac_link_up -- Drop RGMII from pcs_config -- Check ret in "Disable AN if not in autoneg" -- Use devm_mutex_init -- Fix typo for AN8855_PORT_CHECK_MODE -- Better define AN8855_STP_LISTENING = AN8855_STP_BLOCKING -- Fix typo in AN8855_PHY_EN_DOWN_SHIFT -- Use paged helper for PHY -- Skip calibration in config_init if priv not defined -Changes v3: -- Out of RFC -- Switch PHY code to select_page API -- Better describe masks and bits in PHY driver for ADC register -- Drop raw values and use define for mii read/write -- Switch to absolute PHY address -- Replace raw values with mask and bits for pcs_config -- Fix typo for ext-surge property name -- Drop support for relocating Switch base PHY address on the bus -Changes v2: -- Drop mutex guard patch -- Drop guard usage in DSA driver -- Use __mdiobus_write/read -- Check return condition and return errors for mii read/write -- Fix wrong logic for EEE -- Fix link_down (don't force link down with autoneg) -- Fix forcing speed on sgmii autoneg -- Better document link speed for sgmii reg -- Use standard define for sgmii reg -- Imlement nvmem support to expose switch EFUSE -- Rework PHY calibration with the use of NVMEM producer/consumer -- Update DT with new NVMEM property -- Move aneg validation for 2500-basex in pcs_config -- Move r50Ohm table and function to PHY driver - -Christian Marangi (9): - dt-bindings: nvmem: Document support for Airoha AN8855 Switch EFUSE - dt-bindings: net: Document support for Airoha AN8855 Switch Virtual - MDIO - dt-bindings: net: dsa: Document support for Airoha AN8855 DSA Switch - dt-bindings: mfd: Document support for Airoha AN8855 Switch SoC - mfd: an8855: Add support for Airoha AN8855 Switch MFD - net: mdio: Add Airoha AN8855 Switch MDIO Passtrough - nvmem: an8855: Add support for Airoha AN8855 Switch EFUSE - net: dsa: Add Airoha AN8855 5-Port Gigabit DSA Switch driver - net: phy: Add Airoha AN8855 Internal Switch Gigabit PHY - +--- .../bindings/mfd/airoha,an8855-mfd.yaml | 178 ++ .../bindings/net/airoha,an8855-mdio.yaml | 56 + .../net/dsa/airoha,an8855-switch.yaml | 105 + @@ -274,3 +180,14 @@ Christian Marangi (9): obj-$(CONFIG_AIR_EN8811H_PHY) += air_en8811h.o obj-$(CONFIG_AMD_PHY) += amd.o obj-$(CONFIG_AMCC_QT2025_PHY) += qt2025.o +--- a/drivers/nvmem/Kconfig ++++ b/drivers/nvmem/Kconfig +@@ -31,7 +31,7 @@ source "drivers/nvmem/layouts/Kconfig" + + config NVMEM_AN8855_EFUSE + tristate "Airoha AN8855 eFuse support" +- depends on COMPILE_TEST ++ depends on MFD_AIROHA_AN8855 || COMPILE_TEST + help + Say y here to enable support for reading eFuses on Airoha AN8855 + Switch. These are e.g. used to store factory programmed