From 439cafde19723bb0c46bb404749aa513c8d3ac85 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Sun, 13 Sep 2026 13:33:41 +0200 Subject: [PATCH] realtek: dsa: prefix PIE template identifiers by SoC The PIE template identifiers currently rely on being declared in separate SoC-specific translation units. Their generic names would collide when the PIE implementations are moved into a shared source file. Prefix the template field enums, constants, template counts and fixed template arrays with their respective SoC family names. This is a preparatory rename and does not change functionality. Assisted-by: ChatGPT (OpenAI GPT-5.6 Sol) Link: https://github.com/openwrt/openwrt/pull/25160 Signed-off-by: Markus Stockhausen --- .../drivers/net/dsa/rtl83xx/rtl838x.c | 302 ++++++++-------- .../drivers/net/dsa/rtl83xx/rtl839x.c | 338 +++++++++--------- .../drivers/net/dsa/rtl83xx/rtl930x.c | 258 ++++++------- .../drivers/net/dsa/rtl83xx/rtl931x.c | 254 ++++++------- 4 files changed, 576 insertions(+), 576 deletions(-) diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c index 4f4ef0fa8f6..00fa98d02ae 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c @@ -11,53 +11,53 @@ /* see_dal_maple_acl_log2PhyTmplteField and src/app/diag_v2/src/diag_acl.c */ /* Definition of the RTL838X-specific template field IDs as used in the PIE */ -enum template_field_id { - TEMPLATE_FIELD_SPMMASK = 0, - TEMPLATE_FIELD_SPM0 = 1, /* Source portmask ports 0-15 */ - TEMPLATE_FIELD_SPM1 = 2, /* Source portmask ports 16-28 */ - TEMPLATE_FIELD_RANGE_CHK = 3, - TEMPLATE_FIELD_DMAC0 = 4, /* Destination MAC [15:0] */ - TEMPLATE_FIELD_DMAC1 = 5, /* Destination MAC [31:16] */ - TEMPLATE_FIELD_DMAC2 = 6, /* Destination MAC [47:32] */ - TEMPLATE_FIELD_SMAC0 = 7, /* Source MAC [15:0] */ - TEMPLATE_FIELD_SMAC1 = 8, /* Source MAC [31:16] */ - TEMPLATE_FIELD_SMAC2 = 9, /* Source MAC [47:32] */ - TEMPLATE_FIELD_ETHERTYPE = 10, /* Ethernet typ */ - TEMPLATE_FIELD_OTAG = 11, /* Outer VLAN tag */ - TEMPLATE_FIELD_ITAG = 12, /* Inner VLAN tag */ - TEMPLATE_FIELD_SIP0 = 13, /* IPv4 or IPv6 source IP[15:0] or ARP/RARP */ +enum rtl838x_template_field_id { + RTL838X_TEMPLATE_FIELD_SPMMASK = 0, + RTL838X_TEMPLATE_FIELD_SPM0 = 1, /* Source portmask ports 0-15 */ + RTL838X_TEMPLATE_FIELD_SPM1 = 2, /* Source portmask ports 16-28 */ + RTL838X_TEMPLATE_FIELD_RANGE_CHK = 3, + RTL838X_TEMPLATE_FIELD_DMAC0 = 4, /* Destination MAC [15:0] */ + RTL838X_TEMPLATE_FIELD_DMAC1 = 5, /* Destination MAC [31:16] */ + RTL838X_TEMPLATE_FIELD_DMAC2 = 6, /* Destination MAC [47:32] */ + RTL838X_TEMPLATE_FIELD_SMAC0 = 7, /* Source MAC [15:0] */ + RTL838X_TEMPLATE_FIELD_SMAC1 = 8, /* Source MAC [31:16] */ + RTL838X_TEMPLATE_FIELD_SMAC2 = 9, /* Source MAC [47:32] */ + RTL838X_TEMPLATE_FIELD_ETHERTYPE = 10, /* Ethernet typ */ + RTL838X_TEMPLATE_FIELD_OTAG = 11, /* Outer VLAN tag */ + RTL838X_TEMPLATE_FIELD_ITAG = 12, /* Inner VLAN tag */ + RTL838X_TEMPLATE_FIELD_SIP0 = 13, /* IPv4 or IPv6 source IP[15:0] or ARP/RARP */ /* source protocol address in header */ - TEMPLATE_FIELD_SIP1 = 14, /* IPv4 or IPv6 source IP[31:16] or ARP/RARP */ - TEMPLATE_FIELD_DIP0 = 15, /* IPv4 or IPv6 destination IP[15:0] */ - TEMPLATE_FIELD_DIP1 = 16, /* IPv4 or IPv6 destination IP[31:16] */ - TEMPLATE_FIELD_IP_TOS_PROTO = 17, /* IPv4 TOS/IPv6 traffic class and */ + RTL838X_TEMPLATE_FIELD_SIP1 = 14, /* IPv4 or IPv6 source IP[31:16] or ARP/RARP */ + RTL838X_TEMPLATE_FIELD_DIP0 = 15, /* IPv4 or IPv6 destination IP[15:0] */ + RTL838X_TEMPLATE_FIELD_DIP1 = 16, /* IPv4 or IPv6 destination IP[31:16] */ + RTL838X_TEMPLATE_FIELD_IP_TOS_PROTO = 17, /* IPv4 TOS/IPv6 traffic class and */ /* IPv4 proto/IPv6 next header fields */ - TEMPLATE_FIELD_L34_HEADER = 18, /* packet with extra tag and IPv6 with auth, dest, */ + RTL838X_TEMPLATE_FIELD_L34_HEADER = 18, /* packet with extra tag and IPv6 with auth, dest, */ /* frag, route, hop-by-hop option header, */ /* IGMP type, TCP flag */ - TEMPLATE_FIELD_L4_SPORT = 19, /* TCP/UDP source port */ - TEMPLATE_FIELD_L4_DPORT = 20, /* TCP/UDP destination port */ - TEMPLATE_FIELD_ICMP_IGMP = 21, - TEMPLATE_FIELD_IP_RANGE = 22, - TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 23, /* Field selector mask */ - TEMPLATE_FIELD_FIELD_SELECTOR_0 = 24, - TEMPLATE_FIELD_FIELD_SELECTOR_1 = 25, - TEMPLATE_FIELD_FIELD_SELECTOR_2 = 26, - TEMPLATE_FIELD_FIELD_SELECTOR_3 = 27, - TEMPLATE_FIELD_SIP2 = 28, /* IPv6 source IP[47:32] */ - TEMPLATE_FIELD_SIP3 = 29, /* IPv6 source IP[63:48] */ - TEMPLATE_FIELD_SIP4 = 30, /* IPv6 source IP[79:64] */ - TEMPLATE_FIELD_SIP5 = 31, /* IPv6 source IP[95:80] */ - TEMPLATE_FIELD_SIP6 = 32, /* IPv6 source IP[111:96] */ - TEMPLATE_FIELD_SIP7 = 33, /* IPv6 source IP[127:112] */ - TEMPLATE_FIELD_DIP2 = 34, /* IPv6 destination IP[47:32] */ - TEMPLATE_FIELD_DIP3 = 35, /* IPv6 destination IP[63:48] */ - TEMPLATE_FIELD_DIP4 = 36, /* IPv6 destination IP[79:64] */ - TEMPLATE_FIELD_DIP5 = 37, /* IPv6 destination IP[95:80] */ - TEMPLATE_FIELD_DIP6 = 38, /* IPv6 destination IP[111:96] */ - TEMPLATE_FIELD_DIP7 = 39, /* IPv6 destination IP[127:112] */ - TEMPLATE_FIELD_FWD_VID = 40, /* Forwarding VLAN-ID */ - TEMPLATE_FIELD_FLOW_LABEL = 41, + RTL838X_TEMPLATE_FIELD_L4_SPORT = 19, /* TCP/UDP source port */ + RTL838X_TEMPLATE_FIELD_L4_DPORT = 20, /* TCP/UDP destination port */ + RTL838X_TEMPLATE_FIELD_ICMP_IGMP = 21, + RTL838X_TEMPLATE_FIELD_IP_RANGE = 22, + RTL838X_TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 23, /* Field selector mask */ + RTL838X_TEMPLATE_FIELD_FIELD_SELECTOR_0 = 24, + RTL838X_TEMPLATE_FIELD_FIELD_SELECTOR_1 = 25, + RTL838X_TEMPLATE_FIELD_FIELD_SELECTOR_2 = 26, + RTL838X_TEMPLATE_FIELD_FIELD_SELECTOR_3 = 27, + RTL838X_TEMPLATE_FIELD_SIP2 = 28, /* IPv6 source IP[47:32] */ + RTL838X_TEMPLATE_FIELD_SIP3 = 29, /* IPv6 source IP[63:48] */ + RTL838X_TEMPLATE_FIELD_SIP4 = 30, /* IPv6 source IP[79:64] */ + RTL838X_TEMPLATE_FIELD_SIP5 = 31, /* IPv6 source IP[95:80] */ + RTL838X_TEMPLATE_FIELD_SIP6 = 32, /* IPv6 source IP[111:96] */ + RTL838X_TEMPLATE_FIELD_SIP7 = 33, /* IPv6 source IP[127:112] */ + RTL838X_TEMPLATE_FIELD_DIP2 = 34, /* IPv6 destination IP[47:32] */ + RTL838X_TEMPLATE_FIELD_DIP3 = 35, /* IPv6 destination IP[63:48] */ + RTL838X_TEMPLATE_FIELD_DIP4 = 36, /* IPv6 destination IP[79:64] */ + RTL838X_TEMPLATE_FIELD_DIP5 = 37, /* IPv6 destination IP[95:80] */ + RTL838X_TEMPLATE_FIELD_DIP6 = 38, /* IPv6 destination IP[111:96] */ + RTL838X_TEMPLATE_FIELD_DIP7 = 39, /* IPv6 destination IP[127:112] */ + RTL838X_TEMPLATE_FIELD_FWD_VID = 40, /* Forwarding VLAN-ID */ + RTL838X_TEMPLATE_FIELD_FLOW_LABEL = 41, }; /* The RTL838X SoCs use 5 fixed templates with definitions for which data fields are to @@ -67,33 +67,33 @@ enum template_field_id { * in RTL838X_ACL_TMPLTE_CTRL control registers. * TODO: See all src/app/diag_v2/src/diag_pie.c */ -#define N_FIXED_TEMPLATES 5 -static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = { +#define RTL838X_N_FIXED_TEMPLATES 5 +static enum rtl838x_template_field_id rtl838x_fixed_templates[RTL838X_N_FIXED_TEMPLATES][N_FIXED_FIELDS] = { { - TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_OTAG, - TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2, - TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2, - TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_ITAG, TEMPLATE_FIELD_RANGE_CHK + RTL838X_TEMPLATE_FIELD_SPM0, RTL838X_TEMPLATE_FIELD_SPM1, RTL838X_TEMPLATE_FIELD_OTAG, + RTL838X_TEMPLATE_FIELD_SMAC0, RTL838X_TEMPLATE_FIELD_SMAC1, RTL838X_TEMPLATE_FIELD_SMAC2, + RTL838X_TEMPLATE_FIELD_DMAC0, RTL838X_TEMPLATE_FIELD_DMAC1, RTL838X_TEMPLATE_FIELD_DMAC2, + RTL838X_TEMPLATE_FIELD_ETHERTYPE, RTL838X_TEMPLATE_FIELD_ITAG, RTL838X_TEMPLATE_FIELD_RANGE_CHK }, { - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, - TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_L4_SPORT, - TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_ITAG, - TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1 + RTL838X_TEMPLATE_FIELD_SIP0, RTL838X_TEMPLATE_FIELD_SIP1, RTL838X_TEMPLATE_FIELD_DIP0, + RTL838X_TEMPLATE_FIELD_DIP1, RTL838X_TEMPLATE_FIELD_IP_TOS_PROTO, RTL838X_TEMPLATE_FIELD_L4_SPORT, + RTL838X_TEMPLATE_FIELD_L4_DPORT, RTL838X_TEMPLATE_FIELD_ICMP_IGMP, RTL838X_TEMPLATE_FIELD_ITAG, + RTL838X_TEMPLATE_FIELD_RANGE_CHK, RTL838X_TEMPLATE_FIELD_SPM0, RTL838X_TEMPLATE_FIELD_SPM1 }, { - TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2, - TEMPLATE_FIELD_ITAG, TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_IP_TOS_PROTO, - TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_SIP0, - TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1 + RTL838X_TEMPLATE_FIELD_DMAC0, RTL838X_TEMPLATE_FIELD_DMAC1, RTL838X_TEMPLATE_FIELD_DMAC2, + RTL838X_TEMPLATE_FIELD_ITAG, RTL838X_TEMPLATE_FIELD_ETHERTYPE, RTL838X_TEMPLATE_FIELD_IP_TOS_PROTO, + RTL838X_TEMPLATE_FIELD_L4_DPORT, RTL838X_TEMPLATE_FIELD_L4_SPORT, RTL838X_TEMPLATE_FIELD_SIP0, + RTL838X_TEMPLATE_FIELD_SIP1, RTL838X_TEMPLATE_FIELD_DIP0, RTL838X_TEMPLATE_FIELD_DIP1 }, { - TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_DIP2, - TEMPLATE_FIELD_DIP3, TEMPLATE_FIELD_DIP4, TEMPLATE_FIELD_DIP5, - TEMPLATE_FIELD_DIP6, TEMPLATE_FIELD_DIP7, TEMPLATE_FIELD_L4_DPORT, - TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_IP_TOS_PROTO + RTL838X_TEMPLATE_FIELD_DIP0, RTL838X_TEMPLATE_FIELD_DIP1, RTL838X_TEMPLATE_FIELD_DIP2, + RTL838X_TEMPLATE_FIELD_DIP3, RTL838X_TEMPLATE_FIELD_DIP4, RTL838X_TEMPLATE_FIELD_DIP5, + RTL838X_TEMPLATE_FIELD_DIP6, RTL838X_TEMPLATE_FIELD_DIP7, RTL838X_TEMPLATE_FIELD_L4_DPORT, + RTL838X_TEMPLATE_FIELD_L4_SPORT, RTL838X_TEMPLATE_FIELD_ICMP_IGMP, RTL838X_TEMPLATE_FIELD_IP_TOS_PROTO }, { - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_SIP2, - TEMPLATE_FIELD_SIP3, TEMPLATE_FIELD_SIP4, TEMPLATE_FIELD_SIP5, - TEMPLATE_FIELD_SIP6, TEMPLATE_FIELD_SIP7, TEMPLATE_FIELD_ITAG, - TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1 + RTL838X_TEMPLATE_FIELD_SIP0, RTL838X_TEMPLATE_FIELD_SIP1, RTL838X_TEMPLATE_FIELD_SIP2, + RTL838X_TEMPLATE_FIELD_SIP3, RTL838X_TEMPLATE_FIELD_SIP4, RTL838X_TEMPLATE_FIELD_SIP5, + RTL838X_TEMPLATE_FIELD_SIP6, RTL838X_TEMPLATE_FIELD_SIP7, RTL838X_TEMPLATE_FIELD_ITAG, + RTL838X_TEMPLATE_FIELD_RANGE_CHK, RTL838X_TEMPLATE_FIELD_SPM0, RTL838X_TEMPLATE_FIELD_SPM1 }, }; @@ -646,74 +646,74 @@ static void rtl838x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_fro * however the RTL9310 has 2 more registers / fields and the physical field-ids * are specific to every platform. */ -static void rtl838x_write_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[]) +static void rtl838x_write_pie_templated(u32 r[], struct pie_rule *pr, enum rtl838x_template_field_id t[]) { for (int i = 0; i < N_FIXED_FIELDS; i++) { - enum template_field_id field_type = t[i]; + enum rtl838x_template_field_id field_type = t[i]; u16 data = 0, data_m = 0; switch (field_type) { - case TEMPLATE_FIELD_SPM0: + case RTL838X_TEMPLATE_FIELD_SPM0: data = pr->spm; data_m = pr->spm_m; break; - case TEMPLATE_FIELD_SPM1: + case RTL838X_TEMPLATE_FIELD_SPM1: data = pr->spm >> 16; data_m = pr->spm_m >> 16; break; - case TEMPLATE_FIELD_OTAG: + case RTL838X_TEMPLATE_FIELD_OTAG: data = pr->otag; data_m = pr->otag_m; break; - case TEMPLATE_FIELD_SMAC0: + case RTL838X_TEMPLATE_FIELD_SMAC0: data = pr->smac[4]; data = (data << 8) | pr->smac[5]; data_m = pr->smac_m[4]; data_m = (data_m << 8) | pr->smac_m[5]; break; - case TEMPLATE_FIELD_SMAC1: + case RTL838X_TEMPLATE_FIELD_SMAC1: data = pr->smac[2]; data = (data << 8) | pr->smac[3]; data_m = pr->smac_m[2]; data_m = (data_m << 8) | pr->smac_m[3]; break; - case TEMPLATE_FIELD_SMAC2: + case RTL838X_TEMPLATE_FIELD_SMAC2: data = pr->smac[0]; data = (data << 8) | pr->smac[1]; data_m = pr->smac_m[0]; data_m = (data_m << 8) | pr->smac_m[1]; break; - case TEMPLATE_FIELD_DMAC0: + case RTL838X_TEMPLATE_FIELD_DMAC0: data = pr->dmac[4]; data = (data << 8) | pr->dmac[5]; data_m = pr->dmac_m[4]; data_m = (data_m << 8) | pr->dmac_m[5]; break; - case TEMPLATE_FIELD_DMAC1: + case RTL838X_TEMPLATE_FIELD_DMAC1: data = pr->dmac[2]; data = (data << 8) | pr->dmac[3]; data_m = pr->dmac_m[2]; data_m = (data_m << 8) | pr->dmac_m[3]; break; - case TEMPLATE_FIELD_DMAC2: + case RTL838X_TEMPLATE_FIELD_DMAC2: data = pr->dmac[0]; data = (data << 8) | pr->dmac[1]; data_m = pr->dmac_m[0]; data_m = (data_m << 8) | pr->dmac_m[1]; break; - case TEMPLATE_FIELD_ETHERTYPE: + case RTL838X_TEMPLATE_FIELD_ETHERTYPE: data = pr->ethertype; data_m = pr->ethertype_m; break; - case TEMPLATE_FIELD_ITAG: + case RTL838X_TEMPLATE_FIELD_ITAG: data = pr->itag; data_m = pr->itag_m; break; - case TEMPLATE_FIELD_RANGE_CHK: + case RTL838X_TEMPLATE_FIELD_RANGE_CHK: data = pr->field_range_check; data_m = pr->field_range_check_m; break; - case TEMPLATE_FIELD_SIP0: + case RTL838X_TEMPLATE_FIELD_SIP0: if (pr->is_ipv6) { data = pr->sip6.s6_addr16[7]; data_m = pr->sip6_m.s6_addr16[7]; @@ -722,7 +722,7 @@ static void rtl838x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->sip_m; } break; - case TEMPLATE_FIELD_SIP1: + case RTL838X_TEMPLATE_FIELD_SIP1: if (pr->is_ipv6) { data = pr->sip6.s6_addr16[6]; data_m = pr->sip6_m.s6_addr16[6]; @@ -731,16 +731,16 @@ static void rtl838x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->sip_m >> 16; } break; - case TEMPLATE_FIELD_SIP2: - case TEMPLATE_FIELD_SIP3: - case TEMPLATE_FIELD_SIP4: - case TEMPLATE_FIELD_SIP5: - case TEMPLATE_FIELD_SIP6: - case TEMPLATE_FIELD_SIP7: - data = pr->sip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)]; - data_m = pr->sip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)]; + case RTL838X_TEMPLATE_FIELD_SIP2: + case RTL838X_TEMPLATE_FIELD_SIP3: + case RTL838X_TEMPLATE_FIELD_SIP4: + case RTL838X_TEMPLATE_FIELD_SIP5: + case RTL838X_TEMPLATE_FIELD_SIP6: + case RTL838X_TEMPLATE_FIELD_SIP7: + data = pr->sip6.s6_addr16[5 - (field_type - RTL838X_TEMPLATE_FIELD_SIP2)]; + data_m = pr->sip6_m.s6_addr16[5 - (field_type - RTL838X_TEMPLATE_FIELD_SIP2)]; break; - case TEMPLATE_FIELD_DIP0: + case RTL838X_TEMPLATE_FIELD_DIP0: if (pr->is_ipv6) { data = pr->dip6.s6_addr16[7]; data_m = pr->dip6_m.s6_addr16[7]; @@ -749,7 +749,7 @@ static void rtl838x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->dip_m; } break; - case TEMPLATE_FIELD_DIP1: + case RTL838X_TEMPLATE_FIELD_DIP1: if (pr->is_ipv6) { data = pr->dip6.s6_addr16[6]; data_m = pr->dip6_m.s6_addr16[6]; @@ -758,28 +758,28 @@ static void rtl838x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->dip_m >> 16; } break; - case TEMPLATE_FIELD_DIP2: - case TEMPLATE_FIELD_DIP3: - case TEMPLATE_FIELD_DIP4: - case TEMPLATE_FIELD_DIP5: - case TEMPLATE_FIELD_DIP6: - case TEMPLATE_FIELD_DIP7: - data = pr->dip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)]; - data_m = pr->dip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)]; + case RTL838X_TEMPLATE_FIELD_DIP2: + case RTL838X_TEMPLATE_FIELD_DIP3: + case RTL838X_TEMPLATE_FIELD_DIP4: + case RTL838X_TEMPLATE_FIELD_DIP5: + case RTL838X_TEMPLATE_FIELD_DIP6: + case RTL838X_TEMPLATE_FIELD_DIP7: + data = pr->dip6.s6_addr16[5 - (field_type - RTL838X_TEMPLATE_FIELD_DIP2)]; + data_m = pr->dip6_m.s6_addr16[5 - (field_type - RTL838X_TEMPLATE_FIELD_DIP2)]; break; - case TEMPLATE_FIELD_IP_TOS_PROTO: + case RTL838X_TEMPLATE_FIELD_IP_TOS_PROTO: data = pr->tos_proto; data_m = pr->tos_proto_m; break; - case TEMPLATE_FIELD_L4_SPORT: + case RTL838X_TEMPLATE_FIELD_L4_SPORT: data = pr->sport; data_m = pr->sport_m; break; - case TEMPLATE_FIELD_L4_DPORT: + case RTL838X_TEMPLATE_FIELD_L4_DPORT: data = pr->dport; data_m = pr->dport_m; break; - case TEMPLATE_FIELD_ICMP_IGMP: + case RTL838X_TEMPLATE_FIELD_ICMP_IGMP: data = pr->icmp_igmp; data_m = pr->icmp_igmp_m; break; @@ -803,10 +803,10 @@ static void rtl838x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ * The register space configuration size is identical for the RTL8380/90 and RTL9300, * however the RTL9310 has 2 more registers / fields and the physical field-ids */ -static void rtl838x_read_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[]) +static void rtl838x_read_pie_templated(u32 r[], struct pie_rule *pr, enum rtl838x_template_field_id t[]) { for (int i = 0; i < N_FIXED_FIELDS; i++) { - enum template_field_id field_type = t[i]; + enum rtl838x_template_field_id field_type = t[i]; u16 data, data_m; field_type = t[i]; @@ -819,120 +819,120 @@ static void rtl838x_read_pie_templated(u32 r[], struct pie_rule *pr, enum templa } switch (field_type) { - case TEMPLATE_FIELD_SPM0: + case RTL838X_TEMPLATE_FIELD_SPM0: pr->spm = (pr->spn << 16) | data; pr->spm_m = (pr->spn << 16) | data_m; break; - case TEMPLATE_FIELD_SPM1: + case RTL838X_TEMPLATE_FIELD_SPM1: pr->spm = data; pr->spm_m = data_m; break; - case TEMPLATE_FIELD_OTAG: + case RTL838X_TEMPLATE_FIELD_OTAG: pr->otag = data; pr->otag_m = data_m; break; - case TEMPLATE_FIELD_SMAC0: + case RTL838X_TEMPLATE_FIELD_SMAC0: pr->smac[4] = data >> 8; pr->smac[5] = data; pr->smac_m[4] = data >> 8; pr->smac_m[5] = data; break; - case TEMPLATE_FIELD_SMAC1: + case RTL838X_TEMPLATE_FIELD_SMAC1: pr->smac[2] = data >> 8; pr->smac[3] = data; pr->smac_m[2] = data >> 8; pr->smac_m[3] = data; break; - case TEMPLATE_FIELD_SMAC2: + case RTL838X_TEMPLATE_FIELD_SMAC2: pr->smac[0] = data >> 8; pr->smac[1] = data; pr->smac_m[0] = data >> 8; pr->smac_m[1] = data; break; - case TEMPLATE_FIELD_DMAC0: + case RTL838X_TEMPLATE_FIELD_DMAC0: pr->dmac[4] = data >> 8; pr->dmac[5] = data; pr->dmac_m[4] = data >> 8; pr->dmac_m[5] = data; break; - case TEMPLATE_FIELD_DMAC1: + case RTL838X_TEMPLATE_FIELD_DMAC1: pr->dmac[2] = data >> 8; pr->dmac[3] = data; pr->dmac_m[2] = data >> 8; pr->dmac_m[3] = data; break; - case TEMPLATE_FIELD_DMAC2: + case RTL838X_TEMPLATE_FIELD_DMAC2: pr->dmac[0] = data >> 8; pr->dmac[1] = data; pr->dmac_m[0] = data >> 8; pr->dmac_m[1] = data; break; - case TEMPLATE_FIELD_ETHERTYPE: + case RTL838X_TEMPLATE_FIELD_ETHERTYPE: pr->ethertype = data; pr->ethertype_m = data_m; break; - case TEMPLATE_FIELD_ITAG: + case RTL838X_TEMPLATE_FIELD_ITAG: pr->itag = data; pr->itag_m = data_m; break; - case TEMPLATE_FIELD_RANGE_CHK: + case RTL838X_TEMPLATE_FIELD_RANGE_CHK: pr->field_range_check = data; pr->field_range_check_m = data_m; break; - case TEMPLATE_FIELD_SIP0: + case RTL838X_TEMPLATE_FIELD_SIP0: pr->sip = data; pr->sip_m = data_m; break; - case TEMPLATE_FIELD_SIP1: + case RTL838X_TEMPLATE_FIELD_SIP1: pr->sip = (pr->sip << 16) | data; pr->sip_m = (pr->sip << 16) | data_m; break; - case TEMPLATE_FIELD_SIP2: + case RTL838X_TEMPLATE_FIELD_SIP2: pr->is_ipv6 = true; /* Make use of limitiations on the position of the match values */ ipv6_addr_set(&pr->sip6, pr->sip, r[5 - i / 2], r[4 - i / 2], r[3 - i / 2]); ipv6_addr_set(&pr->sip6_m, pr->sip_m, r[5 - i / 2], r[4 - i / 2], r[3 - i / 2]); - case TEMPLATE_FIELD_SIP3: - case TEMPLATE_FIELD_SIP4: - case TEMPLATE_FIELD_SIP5: - case TEMPLATE_FIELD_SIP6: - case TEMPLATE_FIELD_SIP7: + case RTL838X_TEMPLATE_FIELD_SIP3: + case RTL838X_TEMPLATE_FIELD_SIP4: + case RTL838X_TEMPLATE_FIELD_SIP5: + case RTL838X_TEMPLATE_FIELD_SIP6: + case RTL838X_TEMPLATE_FIELD_SIP7: break; - case TEMPLATE_FIELD_DIP0: + case RTL838X_TEMPLATE_FIELD_DIP0: pr->dip = data; pr->dip_m = data_m; break; - case TEMPLATE_FIELD_DIP1: + case RTL838X_TEMPLATE_FIELD_DIP1: pr->dip = (pr->dip << 16) | data; pr->dip_m = (pr->dip << 16) | data_m; break; - case TEMPLATE_FIELD_DIP2: + case RTL838X_TEMPLATE_FIELD_DIP2: pr->is_ipv6 = true; ipv6_addr_set(&pr->dip6, pr->dip, r[5 - i / 2], r[4 - i / 2], r[3 - i / 2]); ipv6_addr_set(&pr->dip6_m, pr->dip_m, r[5 - i / 2], r[4 - i / 2], r[3 - i / 2]); - case TEMPLATE_FIELD_DIP3: - case TEMPLATE_FIELD_DIP4: - case TEMPLATE_FIELD_DIP5: - case TEMPLATE_FIELD_DIP6: - case TEMPLATE_FIELD_DIP7: + case RTL838X_TEMPLATE_FIELD_DIP3: + case RTL838X_TEMPLATE_FIELD_DIP4: + case RTL838X_TEMPLATE_FIELD_DIP5: + case RTL838X_TEMPLATE_FIELD_DIP6: + case RTL838X_TEMPLATE_FIELD_DIP7: break; - case TEMPLATE_FIELD_IP_TOS_PROTO: + case RTL838X_TEMPLATE_FIELD_IP_TOS_PROTO: pr->tos_proto = data; pr->tos_proto_m = data_m; break; - case TEMPLATE_FIELD_L4_SPORT: + case RTL838X_TEMPLATE_FIELD_L4_SPORT: pr->sport = data; pr->sport_m = data_m; break; - case TEMPLATE_FIELD_L4_DPORT: + case RTL838X_TEMPLATE_FIELD_L4_DPORT: pr->dport = data; pr->dport_m = data_m; break; - case TEMPLATE_FIELD_ICMP_IGMP: + case RTL838X_TEMPLATE_FIELD_ICMP_IGMP: pr->icmp_igmp = data; pr->icmp_igmp_m = data_m; break; @@ -1257,7 +1257,7 @@ static int rtl838x_pie_rule_read(struct rtl838x_switch_priv *priv, int idx, stru pr_debug("%s: template_selectors %08x, tid: %d\n", __func__, t_select, pr->tid); rtl838x_pie_rule_dump_raw(r); - rtl838x_read_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]); + rtl838x_read_pie_templated(r, pr, rtl838x_fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]); rtl838x_read_pie_action(r, pr); @@ -1286,7 +1286,7 @@ static int rtl838x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, str rtl838x_write_pie_fixed_fields(r, pr); pr_debug("%s: template %d\n", __func__, (t_select >> (pr->tid * 3)) & 0x7); - rtl838x_write_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]); + rtl838x_write_pie_templated(r, pr, rtl838x_fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]); err = rtl838x_write_pie_action(r, pr); if (err) { @@ -1313,12 +1313,12 @@ errout: return err; } -static bool rtl838x_pie_templ_has(int t, enum template_field_id field_type) +static bool rtl838x_pie_templ_has(int t, enum rtl838x_template_field_id field_type) { - enum template_field_id ft; + enum rtl838x_template_field_id ft; for (int i = 0; i < N_FIXED_FIELDS; i++) { - ft = fixed_templates[t][i]; + ft = rtl838x_fixed_templates[t][i]; if (field_type == ft) return true; } @@ -1331,10 +1331,10 @@ static int rtl838x_pie_verify_template(struct rtl838x_switch_priv *priv, { int i; - if (!pr->is_ipv6 && pr->sip_m && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_SIP0)) + if (!pr->is_ipv6 && pr->sip_m && !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_SIP0)) return -1; - if (!pr->is_ipv6 && pr->dip_m && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_DIP0)) + if (!pr->is_ipv6 && pr->dip_m && !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_DIP0)) return -1; if (pr->is_ipv6) { @@ -1342,29 +1342,29 @@ static int rtl838x_pie_verify_template(struct rtl838x_switch_priv *priv, pr->sip6_m.s6_addr32[1] || pr->sip6_m.s6_addr32[2] || pr->sip6_m.s6_addr32[3]) && - !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_SIP2)) + !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_SIP2)) return -1; if ((pr->dip6_m.s6_addr32[0] || pr->dip6_m.s6_addr32[1] || pr->dip6_m.s6_addr32[2] || pr->dip6_m.s6_addr32[3]) && - !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_DIP2)) + !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_DIP2)) return -1; } - if (ether_addr_to_u64(pr->smac_m) && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_SMAC0)) + if (ether_addr_to_u64(pr->smac_m) && !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_SMAC0)) return -1; - if (ether_addr_to_u64(pr->dmac_m) && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_DMAC0)) + if (ether_addr_to_u64(pr->dmac_m) && !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_DMAC0)) return -1; - if (pr->itag_m && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_ITAG)) + if (pr->itag_m && !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_ITAG)) return -1; - if (pr->sport_m && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_L4_SPORT)) + if (pr->sport_m && !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_L4_SPORT)) return -1; - if (pr->dport_m && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_L4_DPORT)) + if (pr->dport_m && !rtl838x_pie_templ_has(t, RTL838X_TEMPLATE_FIELD_L4_DPORT)) return -1; /* TODO: Check more */ diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c index 813e68d4dea..7c4f55b3b31 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c @@ -8,99 +8,99 @@ #include "vlan.h" /* Definition of the RTL839X-specific template field IDs as used in the PIE */ -enum template_field_id { - TEMPLATE_FIELD_SPMMASK = 0, - TEMPLATE_FIELD_SPM0 = 1, /* Source portmask ports 0-15 */ - TEMPLATE_FIELD_SPM1 = 2, /* Source portmask ports 16-31 */ - TEMPLATE_FIELD_SPM2 = 3, /* Source portmask ports 32-47 */ - TEMPLATE_FIELD_SPM3 = 4, /* Source portmask ports 48-56 */ - TEMPLATE_FIELD_DMAC0 = 5, /* Destination MAC [15:0] */ - TEMPLATE_FIELD_DMAC1 = 6, /* Destination MAC [31:16] */ - TEMPLATE_FIELD_DMAC2 = 7, /* Destination MAC [47:32] */ - TEMPLATE_FIELD_SMAC0 = 8, /* Source MAC [15:0] */ - TEMPLATE_FIELD_SMAC1 = 9, /* Source MAC [31:16] */ - TEMPLATE_FIELD_SMAC2 = 10, /* Source MAC [47:32] */ - TEMPLATE_FIELD_ETHERTYPE = 11, /* Ethernet frame type field */ +enum rtl839x_template_field_id { + RTL839X_TEMPLATE_FIELD_SPMMASK = 0, + RTL839X_TEMPLATE_FIELD_SPM0 = 1, /* Source portmask ports 0-15 */ + RTL839X_TEMPLATE_FIELD_SPM1 = 2, /* Source portmask ports 16-31 */ + RTL839X_TEMPLATE_FIELD_SPM2 = 3, /* Source portmask ports 32-47 */ + RTL839X_TEMPLATE_FIELD_SPM3 = 4, /* Source portmask ports 48-56 */ + RTL839X_TEMPLATE_FIELD_DMAC0 = 5, /* Destination MAC [15:0] */ + RTL839X_TEMPLATE_FIELD_DMAC1 = 6, /* Destination MAC [31:16] */ + RTL839X_TEMPLATE_FIELD_DMAC2 = 7, /* Destination MAC [47:32] */ + RTL839X_TEMPLATE_FIELD_SMAC0 = 8, /* Source MAC [15:0] */ + RTL839X_TEMPLATE_FIELD_SMAC1 = 9, /* Source MAC [31:16] */ + RTL839X_TEMPLATE_FIELD_SMAC2 = 10, /* Source MAC [47:32] */ + RTL839X_TEMPLATE_FIELD_ETHERTYPE = 11, /* Ethernet frame type field */ /* Field-ID 12 is not used */ - TEMPLATE_FIELD_OTAG = 13, - TEMPLATE_FIELD_ITAG = 14, - TEMPLATE_FIELD_SIP0 = 15, - TEMPLATE_FIELD_SIP1 = 16, - TEMPLATE_FIELD_DIP0 = 17, - TEMPLATE_FIELD_DIP1 = 18, - TEMPLATE_FIELD_IP_TOS_PROTO = 19, - TEMPLATE_FIELD_IP_FLAG = 20, - TEMPLATE_FIELD_L4_SPORT = 21, - TEMPLATE_FIELD_L4_DPORT = 22, - TEMPLATE_FIELD_L34_HEADER = 23, - TEMPLATE_FIELD_ICMP_IGMP = 24, - TEMPLATE_FIELD_VID_RANG0 = 25, - TEMPLATE_FIELD_VID_RANG1 = 26, - TEMPLATE_FIELD_L4_PORT_RANG = 27, - TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 28, - TEMPLATE_FIELD_FIELD_SELECTOR_0 = 29, - TEMPLATE_FIELD_FIELD_SELECTOR_1 = 30, - TEMPLATE_FIELD_FIELD_SELECTOR_2 = 31, - TEMPLATE_FIELD_FIELD_SELECTOR_3 = 32, - TEMPLATE_FIELD_FIELD_SELECTOR_4 = 33, - TEMPLATE_FIELD_FIELD_SELECTOR_5 = 34, - TEMPLATE_FIELD_SIP2 = 35, - TEMPLATE_FIELD_SIP3 = 36, - TEMPLATE_FIELD_SIP4 = 37, - TEMPLATE_FIELD_SIP5 = 38, - TEMPLATE_FIELD_SIP6 = 39, - TEMPLATE_FIELD_SIP7 = 40, - TEMPLATE_FIELD_OLABEL = 41, - TEMPLATE_FIELD_ILABEL = 42, - TEMPLATE_FIELD_OILABEL = 43, - TEMPLATE_FIELD_DPMMASK = 44, - TEMPLATE_FIELD_DPM0 = 45, - TEMPLATE_FIELD_DPM1 = 46, - TEMPLATE_FIELD_DPM2 = 47, - TEMPLATE_FIELD_DPM3 = 48, - TEMPLATE_FIELD_L2DPM0 = 49, - TEMPLATE_FIELD_L2DPM1 = 50, - TEMPLATE_FIELD_L2DPM2 = 51, - TEMPLATE_FIELD_L2DPM3 = 52, - TEMPLATE_FIELD_IVLAN = 53, - TEMPLATE_FIELD_OVLAN = 54, - TEMPLATE_FIELD_FWD_VID = 55, - TEMPLATE_FIELD_DIP2 = 56, - TEMPLATE_FIELD_DIP3 = 57, - TEMPLATE_FIELD_DIP4 = 58, - TEMPLATE_FIELD_DIP5 = 59, - TEMPLATE_FIELD_DIP6 = 60, - TEMPLATE_FIELD_DIP7 = 61, + RTL839X_TEMPLATE_FIELD_OTAG = 13, + RTL839X_TEMPLATE_FIELD_ITAG = 14, + RTL839X_TEMPLATE_FIELD_SIP0 = 15, + RTL839X_TEMPLATE_FIELD_SIP1 = 16, + RTL839X_TEMPLATE_FIELD_DIP0 = 17, + RTL839X_TEMPLATE_FIELD_DIP1 = 18, + RTL839X_TEMPLATE_FIELD_IP_TOS_PROTO = 19, + RTL839X_TEMPLATE_FIELD_IP_FLAG = 20, + RTL839X_TEMPLATE_FIELD_L4_SPORT = 21, + RTL839X_TEMPLATE_FIELD_L4_DPORT = 22, + RTL839X_TEMPLATE_FIELD_L34_HEADER = 23, + RTL839X_TEMPLATE_FIELD_ICMP_IGMP = 24, + RTL839X_TEMPLATE_FIELD_VID_RANG0 = 25, + RTL839X_TEMPLATE_FIELD_VID_RANG1 = 26, + RTL839X_TEMPLATE_FIELD_L4_PORT_RANG = 27, + RTL839X_TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 28, + RTL839X_TEMPLATE_FIELD_FIELD_SELECTOR_0 = 29, + RTL839X_TEMPLATE_FIELD_FIELD_SELECTOR_1 = 30, + RTL839X_TEMPLATE_FIELD_FIELD_SELECTOR_2 = 31, + RTL839X_TEMPLATE_FIELD_FIELD_SELECTOR_3 = 32, + RTL839X_TEMPLATE_FIELD_FIELD_SELECTOR_4 = 33, + RTL839X_TEMPLATE_FIELD_FIELD_SELECTOR_5 = 34, + RTL839X_TEMPLATE_FIELD_SIP2 = 35, + RTL839X_TEMPLATE_FIELD_SIP3 = 36, + RTL839X_TEMPLATE_FIELD_SIP4 = 37, + RTL839X_TEMPLATE_FIELD_SIP5 = 38, + RTL839X_TEMPLATE_FIELD_SIP6 = 39, + RTL839X_TEMPLATE_FIELD_SIP7 = 40, + RTL839X_TEMPLATE_FIELD_OLABEL = 41, + RTL839X_TEMPLATE_FIELD_ILABEL = 42, + RTL839X_TEMPLATE_FIELD_OILABEL = 43, + RTL839X_TEMPLATE_FIELD_DPMMASK = 44, + RTL839X_TEMPLATE_FIELD_DPM0 = 45, + RTL839X_TEMPLATE_FIELD_DPM1 = 46, + RTL839X_TEMPLATE_FIELD_DPM2 = 47, + RTL839X_TEMPLATE_FIELD_DPM3 = 48, + RTL839X_TEMPLATE_FIELD_L2DPM0 = 49, + RTL839X_TEMPLATE_FIELD_L2DPM1 = 50, + RTL839X_TEMPLATE_FIELD_L2DPM2 = 51, + RTL839X_TEMPLATE_FIELD_L2DPM3 = 52, + RTL839X_TEMPLATE_FIELD_IVLAN = 53, + RTL839X_TEMPLATE_FIELD_OVLAN = 54, + RTL839X_TEMPLATE_FIELD_FWD_VID = 55, + RTL839X_TEMPLATE_FIELD_DIP2 = 56, + RTL839X_TEMPLATE_FIELD_DIP3 = 57, + RTL839X_TEMPLATE_FIELD_DIP4 = 58, + RTL839X_TEMPLATE_FIELD_DIP5 = 59, + RTL839X_TEMPLATE_FIELD_DIP6 = 60, + RTL839X_TEMPLATE_FIELD_DIP7 = 61, }; /* Number of fixed templates predefined in the SoC */ -#define N_FIXED_TEMPLATES 5 -static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = { +#define RTL839X_N_FIXED_TEMPLATES 5 +static enum rtl839x_template_field_id rtl839x_fixed_templates[RTL839X_N_FIXED_TEMPLATES][N_FIXED_FIELDS] = { { - TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_ITAG, - TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2, - TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2, - TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3 + RTL839X_TEMPLATE_FIELD_SPM0, RTL839X_TEMPLATE_FIELD_SPM1, RTL839X_TEMPLATE_FIELD_ITAG, + RTL839X_TEMPLATE_FIELD_SMAC0, RTL839X_TEMPLATE_FIELD_SMAC1, RTL839X_TEMPLATE_FIELD_SMAC2, + RTL839X_TEMPLATE_FIELD_DMAC0, RTL839X_TEMPLATE_FIELD_DMAC1, RTL839X_TEMPLATE_FIELD_DMAC2, + RTL839X_TEMPLATE_FIELD_ETHERTYPE, RTL839X_TEMPLATE_FIELD_SPM2, RTL839X_TEMPLATE_FIELD_SPM3 }, { - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, - TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_L4_SPORT, - TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_SPM0, - TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3 + RTL839X_TEMPLATE_FIELD_SIP0, RTL839X_TEMPLATE_FIELD_SIP1, RTL839X_TEMPLATE_FIELD_DIP0, + RTL839X_TEMPLATE_FIELD_DIP1, RTL839X_TEMPLATE_FIELD_IP_TOS_PROTO, RTL839X_TEMPLATE_FIELD_L4_SPORT, + RTL839X_TEMPLATE_FIELD_L4_DPORT, RTL839X_TEMPLATE_FIELD_ICMP_IGMP, RTL839X_TEMPLATE_FIELD_SPM0, + RTL839X_TEMPLATE_FIELD_SPM1, RTL839X_TEMPLATE_FIELD_SPM2, RTL839X_TEMPLATE_FIELD_SPM3 }, { - TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2, - TEMPLATE_FIELD_ITAG, TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_IP_TOS_PROTO, - TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_SIP0, - TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1 + RTL839X_TEMPLATE_FIELD_DMAC0, RTL839X_TEMPLATE_FIELD_DMAC1, RTL839X_TEMPLATE_FIELD_DMAC2, + RTL839X_TEMPLATE_FIELD_ITAG, RTL839X_TEMPLATE_FIELD_ETHERTYPE, RTL839X_TEMPLATE_FIELD_IP_TOS_PROTO, + RTL839X_TEMPLATE_FIELD_L4_DPORT, RTL839X_TEMPLATE_FIELD_L4_SPORT, RTL839X_TEMPLATE_FIELD_SIP0, + RTL839X_TEMPLATE_FIELD_SIP1, RTL839X_TEMPLATE_FIELD_DIP0, RTL839X_TEMPLATE_FIELD_DIP1 }, { - TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_DIP2, - TEMPLATE_FIELD_DIP3, TEMPLATE_FIELD_DIP4, TEMPLATE_FIELD_DIP5, - TEMPLATE_FIELD_DIP6, TEMPLATE_FIELD_DIP7, TEMPLATE_FIELD_L4_DPORT, - TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_IP_TOS_PROTO + RTL839X_TEMPLATE_FIELD_DIP0, RTL839X_TEMPLATE_FIELD_DIP1, RTL839X_TEMPLATE_FIELD_DIP2, + RTL839X_TEMPLATE_FIELD_DIP3, RTL839X_TEMPLATE_FIELD_DIP4, RTL839X_TEMPLATE_FIELD_DIP5, + RTL839X_TEMPLATE_FIELD_DIP6, RTL839X_TEMPLATE_FIELD_DIP7, RTL839X_TEMPLATE_FIELD_L4_DPORT, + RTL839X_TEMPLATE_FIELD_L4_SPORT, RTL839X_TEMPLATE_FIELD_ICMP_IGMP, RTL839X_TEMPLATE_FIELD_IP_TOS_PROTO }, { - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_SIP2, - TEMPLATE_FIELD_SIP3, TEMPLATE_FIELD_SIP4, TEMPLATE_FIELD_SIP5, - TEMPLATE_FIELD_SIP6, TEMPLATE_FIELD_SIP7, TEMPLATE_FIELD_SPM0, - TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3 + RTL839X_TEMPLATE_FIELD_SIP0, RTL839X_TEMPLATE_FIELD_SIP1, RTL839X_TEMPLATE_FIELD_SIP2, + RTL839X_TEMPLATE_FIELD_SIP3, RTL839X_TEMPLATE_FIELD_SIP4, RTL839X_TEMPLATE_FIELD_SIP5, + RTL839X_TEMPLATE_FIELD_SIP6, RTL839X_TEMPLATE_FIELD_SIP7, RTL839X_TEMPLATE_FIELD_SPM0, + RTL839X_TEMPLATE_FIELD_SPM1, RTL839X_TEMPLATE_FIELD_SPM2, RTL839X_TEMPLATE_FIELD_SPM3 }, }; @@ -646,78 +646,78 @@ static int rtl839x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_from * on all SoCs * On the RTL8390 the template mask registers are not word-aligned! */ -static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[]) +static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum rtl839x_template_field_id t[]) { for (int i = 0; i < N_FIXED_FIELDS; i++) { - enum template_field_id field_type = t[i]; + enum rtl839x_template_field_id field_type = t[i]; u16 data = 0, data_m = 0; switch (field_type) { - case TEMPLATE_FIELD_SPM0: + case RTL839X_TEMPLATE_FIELD_SPM0: data = pr->spm; data_m = pr->spm_m; break; - case TEMPLATE_FIELD_SPM1: + case RTL839X_TEMPLATE_FIELD_SPM1: data = pr->spm >> 16; data_m = pr->spm_m >> 16; break; - case TEMPLATE_FIELD_SPM2: + case RTL839X_TEMPLATE_FIELD_SPM2: data = pr->spm >> 32; data_m = pr->spm_m >> 32; break; - case TEMPLATE_FIELD_SPM3: + case RTL839X_TEMPLATE_FIELD_SPM3: data = pr->spm >> 48; data_m = pr->spm_m >> 48; break; - case TEMPLATE_FIELD_OTAG: + case RTL839X_TEMPLATE_FIELD_OTAG: data = pr->otag; data_m = pr->otag_m; break; - case TEMPLATE_FIELD_SMAC0: + case RTL839X_TEMPLATE_FIELD_SMAC0: data = pr->smac[4]; data = (data << 8) | pr->smac[5]; data_m = pr->smac_m[4]; data_m = (data_m << 8) | pr->smac_m[5]; break; - case TEMPLATE_FIELD_SMAC1: + case RTL839X_TEMPLATE_FIELD_SMAC1: data = pr->smac[2]; data = (data << 8) | pr->smac[3]; data_m = pr->smac_m[2]; data_m = (data_m << 8) | pr->smac_m[3]; break; - case TEMPLATE_FIELD_SMAC2: + case RTL839X_TEMPLATE_FIELD_SMAC2: data = pr->smac[0]; data = (data << 8) | pr->smac[1]; data_m = pr->smac_m[0]; data_m = (data_m << 8) | pr->smac_m[1]; break; - case TEMPLATE_FIELD_DMAC0: + case RTL839X_TEMPLATE_FIELD_DMAC0: data = pr->dmac[4]; data = (data << 8) | pr->dmac[5]; data_m = pr->dmac_m[4]; data_m = (data_m << 8) | pr->dmac_m[5]; break; - case TEMPLATE_FIELD_DMAC1: + case RTL839X_TEMPLATE_FIELD_DMAC1: data = pr->dmac[2]; data = (data << 8) | pr->dmac[3]; data_m = pr->dmac_m[2]; data_m = (data_m << 8) | pr->dmac_m[3]; break; - case TEMPLATE_FIELD_DMAC2: + case RTL839X_TEMPLATE_FIELD_DMAC2: data = pr->dmac[0]; data = (data << 8) | pr->dmac[1]; data_m = pr->dmac_m[0]; data_m = (data_m << 8) | pr->dmac_m[1]; break; - case TEMPLATE_FIELD_ETHERTYPE: + case RTL839X_TEMPLATE_FIELD_ETHERTYPE: data = pr->ethertype; data_m = pr->ethertype_m; break; - case TEMPLATE_FIELD_ITAG: + case RTL839X_TEMPLATE_FIELD_ITAG: data = pr->itag; data_m = pr->itag_m; break; - case TEMPLATE_FIELD_SIP0: + case RTL839X_TEMPLATE_FIELD_SIP0: if (pr->is_ipv6) { data = pr->sip6.s6_addr16[7]; data_m = pr->sip6_m.s6_addr16[7]; @@ -726,7 +726,7 @@ static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->sip_m; } break; - case TEMPLATE_FIELD_SIP1: + case RTL839X_TEMPLATE_FIELD_SIP1: if (pr->is_ipv6) { data = pr->sip6.s6_addr16[6]; data_m = pr->sip6_m.s6_addr16[6]; @@ -735,16 +735,16 @@ static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->sip_m >> 16; } break; - case TEMPLATE_FIELD_SIP2: - case TEMPLATE_FIELD_SIP3: - case TEMPLATE_FIELD_SIP4: - case TEMPLATE_FIELD_SIP5: - case TEMPLATE_FIELD_SIP6: - case TEMPLATE_FIELD_SIP7: - data = pr->sip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)]; - data_m = pr->sip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)]; + case RTL839X_TEMPLATE_FIELD_SIP2: + case RTL839X_TEMPLATE_FIELD_SIP3: + case RTL839X_TEMPLATE_FIELD_SIP4: + case RTL839X_TEMPLATE_FIELD_SIP5: + case RTL839X_TEMPLATE_FIELD_SIP6: + case RTL839X_TEMPLATE_FIELD_SIP7: + data = pr->sip6.s6_addr16[5 - (field_type - RTL839X_TEMPLATE_FIELD_SIP2)]; + data_m = pr->sip6_m.s6_addr16[5 - (field_type - RTL839X_TEMPLATE_FIELD_SIP2)]; break; - case TEMPLATE_FIELD_DIP0: + case RTL839X_TEMPLATE_FIELD_DIP0: if (pr->is_ipv6) { data = pr->dip6.s6_addr16[7]; data_m = pr->dip6_m.s6_addr16[7]; @@ -753,7 +753,7 @@ static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->dip_m; } break; - case TEMPLATE_FIELD_DIP1: + case RTL839X_TEMPLATE_FIELD_DIP1: if (pr->is_ipv6) { data = pr->dip6.s6_addr16[6]; data_m = pr->dip6_m.s6_addr16[6]; @@ -762,28 +762,28 @@ static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->dip_m >> 16; } break; - case TEMPLATE_FIELD_DIP2: - case TEMPLATE_FIELD_DIP3: - case TEMPLATE_FIELD_DIP4: - case TEMPLATE_FIELD_DIP5: - case TEMPLATE_FIELD_DIP6: - case TEMPLATE_FIELD_DIP7: - data = pr->dip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)]; - data_m = pr->dip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)]; + case RTL839X_TEMPLATE_FIELD_DIP2: + case RTL839X_TEMPLATE_FIELD_DIP3: + case RTL839X_TEMPLATE_FIELD_DIP4: + case RTL839X_TEMPLATE_FIELD_DIP5: + case RTL839X_TEMPLATE_FIELD_DIP6: + case RTL839X_TEMPLATE_FIELD_DIP7: + data = pr->dip6.s6_addr16[5 - (field_type - RTL839X_TEMPLATE_FIELD_DIP2)]; + data_m = pr->dip6_m.s6_addr16[5 - (field_type - RTL839X_TEMPLATE_FIELD_DIP2)]; break; - case TEMPLATE_FIELD_IP_TOS_PROTO: + case RTL839X_TEMPLATE_FIELD_IP_TOS_PROTO: data = pr->tos_proto; data_m = pr->tos_proto_m; break; - case TEMPLATE_FIELD_L4_SPORT: + case RTL839X_TEMPLATE_FIELD_L4_SPORT: data = pr->sport; data_m = pr->sport_m; break; - case TEMPLATE_FIELD_L4_DPORT: + case RTL839X_TEMPLATE_FIELD_L4_DPORT: data = pr->dport; data_m = pr->dport_m; break; - case TEMPLATE_FIELD_ICMP_IGMP: + case RTL839X_TEMPLATE_FIELD_ICMP_IGMP: data = pr->icmp_igmp; data_m = pr->icmp_igmp_m; break; @@ -810,10 +810,10 @@ static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ * however the RTL9310 has 2 more registers / fields and the physical field-ids * On the RTL8390 the template mask registers are not word-aligned! */ -static void rtl839x_read_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[]) +static void rtl839x_read_pie_templated(u32 r[], struct pie_rule *pr, enum rtl839x_template_field_id t[]) { for (int i = 0; i < N_FIXED_FIELDS; i++) { - enum template_field_id field_type = t[i]; + enum rtl839x_template_field_id field_type = t[i]; u16 data, data_m; if (!(i % 2)) { @@ -825,119 +825,119 @@ static void rtl839x_read_pie_templated(u32 r[], struct pie_rule *pr, enum templa } switch (field_type) { - case TEMPLATE_FIELD_SPM0: + case RTL839X_TEMPLATE_FIELD_SPM0: pr->spm = (pr->spn << 16) | data; pr->spm_m = (pr->spn << 16) | data_m; break; - case TEMPLATE_FIELD_SPM1: + case RTL839X_TEMPLATE_FIELD_SPM1: pr->spm = data; pr->spm_m = data_m; break; - case TEMPLATE_FIELD_OTAG: + case RTL839X_TEMPLATE_FIELD_OTAG: pr->otag = data; pr->otag_m = data_m; break; - case TEMPLATE_FIELD_SMAC0: + case RTL839X_TEMPLATE_FIELD_SMAC0: pr->smac[4] = data >> 8; pr->smac[5] = data; pr->smac_m[4] = data >> 8; pr->smac_m[5] = data; break; - case TEMPLATE_FIELD_SMAC1: + case RTL839X_TEMPLATE_FIELD_SMAC1: pr->smac[2] = data >> 8; pr->smac[3] = data; pr->smac_m[2] = data >> 8; pr->smac_m[3] = data; break; - case TEMPLATE_FIELD_SMAC2: + case RTL839X_TEMPLATE_FIELD_SMAC2: pr->smac[0] = data >> 8; pr->smac[1] = data; pr->smac_m[0] = data >> 8; pr->smac_m[1] = data; break; - case TEMPLATE_FIELD_DMAC0: + case RTL839X_TEMPLATE_FIELD_DMAC0: pr->dmac[4] = data >> 8; pr->dmac[5] = data; pr->dmac_m[4] = data >> 8; pr->dmac_m[5] = data; break; - case TEMPLATE_FIELD_DMAC1: + case RTL839X_TEMPLATE_FIELD_DMAC1: pr->dmac[2] = data >> 8; pr->dmac[3] = data; pr->dmac_m[2] = data >> 8; pr->dmac_m[3] = data; break; - case TEMPLATE_FIELD_DMAC2: + case RTL839X_TEMPLATE_FIELD_DMAC2: pr->dmac[0] = data >> 8; pr->dmac[1] = data; pr->dmac_m[0] = data >> 8; pr->dmac_m[1] = data; break; - case TEMPLATE_FIELD_ETHERTYPE: + case RTL839X_TEMPLATE_FIELD_ETHERTYPE: pr->ethertype = data; pr->ethertype_m = data_m; break; - case TEMPLATE_FIELD_ITAG: + case RTL839X_TEMPLATE_FIELD_ITAG: pr->itag = data; pr->itag_m = data_m; break; - case TEMPLATE_FIELD_SIP0: + case RTL839X_TEMPLATE_FIELD_SIP0: pr->sip = data; pr->sip_m = data_m; break; - case TEMPLATE_FIELD_SIP1: + case RTL839X_TEMPLATE_FIELD_SIP1: pr->sip = (pr->sip << 16) | data; pr->sip_m = (pr->sip << 16) | data_m; break; - case TEMPLATE_FIELD_SIP2: + case RTL839X_TEMPLATE_FIELD_SIP2: pr->is_ipv6 = true; /* Make use of limitiations on the position of the match values */ ipv6_addr_set(&pr->sip6, pr->sip, r[5 - i / 2], r[4 - i / 2], r[3 - i / 2]); ipv6_addr_set(&pr->sip6_m, pr->sip_m, r[5 - i / 2], r[4 - i / 2], r[3 - i / 2]); - case TEMPLATE_FIELD_SIP3: - case TEMPLATE_FIELD_SIP4: - case TEMPLATE_FIELD_SIP5: - case TEMPLATE_FIELD_SIP6: - case TEMPLATE_FIELD_SIP7: + case RTL839X_TEMPLATE_FIELD_SIP3: + case RTL839X_TEMPLATE_FIELD_SIP4: + case RTL839X_TEMPLATE_FIELD_SIP5: + case RTL839X_TEMPLATE_FIELD_SIP6: + case RTL839X_TEMPLATE_FIELD_SIP7: break; - case TEMPLATE_FIELD_DIP0: + case RTL839X_TEMPLATE_FIELD_DIP0: pr->dip = data; pr->dip_m = data_m; break; - case TEMPLATE_FIELD_DIP1: + case RTL839X_TEMPLATE_FIELD_DIP1: pr->dip = (pr->dip << 16) | data; pr->dip_m = (pr->dip << 16) | data_m; break; - case TEMPLATE_FIELD_DIP2: + case RTL839X_TEMPLATE_FIELD_DIP2: pr->is_ipv6 = true; ipv6_addr_set(&pr->dip6, pr->dip, r[5 - i / 2], r[4 - i / 2], r[3 - i / 2]); ipv6_addr_set(&pr->dip6_m, pr->dip_m, r[5 - i / 2], r[4 - i / 2], r[3 - i / 2]); - case TEMPLATE_FIELD_DIP3: - case TEMPLATE_FIELD_DIP4: - case TEMPLATE_FIELD_DIP5: - case TEMPLATE_FIELD_DIP6: - case TEMPLATE_FIELD_DIP7: + case RTL839X_TEMPLATE_FIELD_DIP3: + case RTL839X_TEMPLATE_FIELD_DIP4: + case RTL839X_TEMPLATE_FIELD_DIP5: + case RTL839X_TEMPLATE_FIELD_DIP6: + case RTL839X_TEMPLATE_FIELD_DIP7: break; - case TEMPLATE_FIELD_IP_TOS_PROTO: + case RTL839X_TEMPLATE_FIELD_IP_TOS_PROTO: pr->tos_proto = data; pr->tos_proto_m = data_m; break; - case TEMPLATE_FIELD_L4_SPORT: + case RTL839X_TEMPLATE_FIELD_L4_SPORT: pr->sport = data; pr->sport_m = data_m; break; - case TEMPLATE_FIELD_L4_DPORT: + case RTL839X_TEMPLATE_FIELD_L4_DPORT: pr->dport = data; pr->dport_m = data_m; break; - case TEMPLATE_FIELD_ICMP_IGMP: + case RTL839X_TEMPLATE_FIELD_ICMP_IGMP: pr->icmp_igmp = data; pr->icmp_igmp_m = data_m; break; @@ -1127,7 +1127,7 @@ static int rtl839x_pie_rule_read(struct rtl838x_switch_priv *priv, int idx, stru pr_debug("%s: template_selectors %08x, tid: %d\n", __func__, t_select, pr->tid); rtl839x_pie_rule_dump_raw(r); - rtl839x_read_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]); + rtl839x_read_pie_templated(r, pr, rtl839x_fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]); rtl839x_read_pie_action(r, pr); @@ -1154,7 +1154,7 @@ static int rtl839x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, str rtl839x_write_pie_fixed_fields(r, pr); pr_debug("%s: template %d\n", __func__, (t_select >> (pr->tid * 3)) & 0x7); - rtl839x_write_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]); + rtl839x_write_pie_templated(r, pr, rtl839x_fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]); rtl839x_write_pie_action(r, pr); @@ -1166,10 +1166,10 @@ static int rtl839x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, str return 0; } -static bool rtl839x_pie_templ_has(int t, enum template_field_id field_type) +static bool rtl839x_pie_templ_has(int t, enum rtl839x_template_field_id field_type) { for (int i = 0; i < N_FIXED_FIELDS; i++) { - enum template_field_id ft = fixed_templates[t][i]; + enum rtl839x_template_field_id ft = rtl839x_fixed_templates[t][i]; if (field_type == ft) return true; @@ -1183,10 +1183,10 @@ static int rtl839x_pie_verify_template(struct rtl838x_switch_priv *priv, { int i; - if (!pr->is_ipv6 && pr->sip_m && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_SIP0)) + if (!pr->is_ipv6 && pr->sip_m && !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_SIP0)) return -1; - if (!pr->is_ipv6 && pr->dip_m && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_DIP0)) + if (!pr->is_ipv6 && pr->dip_m && !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_DIP0)) return -1; if (pr->is_ipv6) { @@ -1194,29 +1194,29 @@ static int rtl839x_pie_verify_template(struct rtl838x_switch_priv *priv, pr->sip6_m.s6_addr32[1] || pr->sip6_m.s6_addr32[2] || pr->sip6_m.s6_addr32[3]) && - !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_SIP2)) + !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_SIP2)) return -1; if ((pr->dip6_m.s6_addr32[0] || pr->dip6_m.s6_addr32[1] || pr->dip6_m.s6_addr32[2] || pr->dip6_m.s6_addr32[3]) && - !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_DIP2)) + !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_DIP2)) return -1; } - if (ether_addr_to_u64(pr->smac_m) && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_SMAC0)) + if (ether_addr_to_u64(pr->smac_m) && !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_SMAC0)) return -1; - if (ether_addr_to_u64(pr->dmac_m) && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_DMAC0)) + if (ether_addr_to_u64(pr->dmac_m) && !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_DMAC0)) return -1; - if (pr->itag_m && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_ITAG)) + if (pr->itag_m && !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_ITAG)) return -1; - if (pr->sport_m && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_L4_SPORT)) + if (pr->sport_m && !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_L4_SPORT)) return -1; - if (pr->dport_m && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_L4_DPORT)) + if (pr->dport_m && !rtl839x_pie_templ_has(t, RTL839X_TEMPLATE_FIELD_L4_DPORT)) return -1; /* TODO: Check more */ diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c index 997cedc29da..5512a1bcd9a 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c @@ -26,93 +26,93 @@ #define RTL930X_LED_SET_LEDX_SHIFT(x) (16 * (x % 2)) /* Definition of the RTL930X-specific template field IDs as used in the PIE */ -enum template_field_id { - TEMPLATE_FIELD_SPM0 = 0, /* Source portmask ports 0-15 */ - TEMPLATE_FIELD_SPM1 = 1, /* Source portmask ports 16-31 */ - TEMPLATE_FIELD_DMAC0 = 2, /* Destination MAC [15:0] */ - TEMPLATE_FIELD_DMAC1 = 3, /* Destination MAC [31:16] */ - TEMPLATE_FIELD_DMAC2 = 4, /* Destination MAC [47:32] */ - TEMPLATE_FIELD_SMAC0 = 5, /* Source MAC [15:0] */ - TEMPLATE_FIELD_SMAC1 = 6, /* Source MAC [31:16] */ - TEMPLATE_FIELD_SMAC2 = 7, /* Source MAC [47:32] */ - TEMPLATE_FIELD_ETHERTYPE = 8, /* Ethernet frame type field */ - TEMPLATE_FIELD_OTAG = 9, - TEMPLATE_FIELD_ITAG = 10, - TEMPLATE_FIELD_SIP0 = 11, - TEMPLATE_FIELD_SIP1 = 12, - TEMPLATE_FIELD_DIP0 = 13, - TEMPLATE_FIELD_DIP1 = 14, - TEMPLATE_FIELD_IP_TOS_PROTO = 15, - TEMPLATE_FIELD_L4_SPORT = 16, - TEMPLATE_FIELD_L4_DPORT = 17, - TEMPLATE_FIELD_L34_HEADER = 18, - TEMPLATE_FIELD_TCP_INFO = 19, - TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 20, - TEMPLATE_FIELD_FIELD_SELECTOR_0 = 21, - TEMPLATE_FIELD_FIELD_SELECTOR_1 = 22, - TEMPLATE_FIELD_FIELD_SELECTOR_2 = 23, - TEMPLATE_FIELD_FIELD_SELECTOR_3 = 24, - TEMPLATE_FIELD_FIELD_SELECTOR_4 = 25, - TEMPLATE_FIELD_FIELD_SELECTOR_5 = 26, - TEMPLATE_FIELD_SIP2 = 27, - TEMPLATE_FIELD_SIP3 = 28, - TEMPLATE_FIELD_SIP4 = 29, - TEMPLATE_FIELD_SIP5 = 30, - TEMPLATE_FIELD_SIP6 = 31, - TEMPLATE_FIELD_SIP7 = 32, - TEMPLATE_FIELD_DIP2 = 33, - TEMPLATE_FIELD_DIP3 = 34, - TEMPLATE_FIELD_DIP4 = 35, - TEMPLATE_FIELD_DIP5 = 36, - TEMPLATE_FIELD_DIP6 = 37, - TEMPLATE_FIELD_DIP7 = 38, - TEMPLATE_FIELD_PKT_INFO = 39, - TEMPLATE_FIELD_FLOW_LABEL = 40, - TEMPLATE_FIELD_DSAP_SSAP = 41, - TEMPLATE_FIELD_SNAP_OUI = 42, - TEMPLATE_FIELD_FWD_VID = 43, - TEMPLATE_FIELD_RANGE_CHK = 44, - TEMPLATE_FIELD_VLAN_GMSK = 45, /* VLAN Group Mask/IP range check */ - TEMPLATE_FIELD_DLP = 46, - TEMPLATE_FIELD_META_DATA = 47, - TEMPLATE_FIELD_SRC_FWD_VID = 48, - TEMPLATE_FIELD_SLP = 49, +enum rtl930x_template_field_id { + RTL930X_TEMPLATE_FIELD_SPM0 = 0, /* Source portmask ports 0-15 */ + RTL930X_TEMPLATE_FIELD_SPM1 = 1, /* Source portmask ports 16-31 */ + RTL930X_TEMPLATE_FIELD_DMAC0 = 2, /* Destination MAC [15:0] */ + RTL930X_TEMPLATE_FIELD_DMAC1 = 3, /* Destination MAC [31:16] */ + RTL930X_TEMPLATE_FIELD_DMAC2 = 4, /* Destination MAC [47:32] */ + RTL930X_TEMPLATE_FIELD_SMAC0 = 5, /* Source MAC [15:0] */ + RTL930X_TEMPLATE_FIELD_SMAC1 = 6, /* Source MAC [31:16] */ + RTL930X_TEMPLATE_FIELD_SMAC2 = 7, /* Source MAC [47:32] */ + RTL930X_TEMPLATE_FIELD_ETHERTYPE = 8, /* Ethernet frame type field */ + RTL930X_TEMPLATE_FIELD_OTAG = 9, + RTL930X_TEMPLATE_FIELD_ITAG = 10, + RTL930X_TEMPLATE_FIELD_SIP0 = 11, + RTL930X_TEMPLATE_FIELD_SIP1 = 12, + RTL930X_TEMPLATE_FIELD_DIP0 = 13, + RTL930X_TEMPLATE_FIELD_DIP1 = 14, + RTL930X_TEMPLATE_FIELD_IP_TOS_PROTO = 15, + RTL930X_TEMPLATE_FIELD_L4_SPORT = 16, + RTL930X_TEMPLATE_FIELD_L4_DPORT = 17, + RTL930X_TEMPLATE_FIELD_L34_HEADER = 18, + RTL930X_TEMPLATE_FIELD_TCP_INFO = 19, + RTL930X_TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 20, + RTL930X_TEMPLATE_FIELD_FIELD_SELECTOR_0 = 21, + RTL930X_TEMPLATE_FIELD_FIELD_SELECTOR_1 = 22, + RTL930X_TEMPLATE_FIELD_FIELD_SELECTOR_2 = 23, + RTL930X_TEMPLATE_FIELD_FIELD_SELECTOR_3 = 24, + RTL930X_TEMPLATE_FIELD_FIELD_SELECTOR_4 = 25, + RTL930X_TEMPLATE_FIELD_FIELD_SELECTOR_5 = 26, + RTL930X_TEMPLATE_FIELD_SIP2 = 27, + RTL930X_TEMPLATE_FIELD_SIP3 = 28, + RTL930X_TEMPLATE_FIELD_SIP4 = 29, + RTL930X_TEMPLATE_FIELD_SIP5 = 30, + RTL930X_TEMPLATE_FIELD_SIP6 = 31, + RTL930X_TEMPLATE_FIELD_SIP7 = 32, + RTL930X_TEMPLATE_FIELD_DIP2 = 33, + RTL930X_TEMPLATE_FIELD_DIP3 = 34, + RTL930X_TEMPLATE_FIELD_DIP4 = 35, + RTL930X_TEMPLATE_FIELD_DIP5 = 36, + RTL930X_TEMPLATE_FIELD_DIP6 = 37, + RTL930X_TEMPLATE_FIELD_DIP7 = 38, + RTL930X_TEMPLATE_FIELD_PKT_INFO = 39, + RTL930X_TEMPLATE_FIELD_FLOW_LABEL = 40, + RTL930X_TEMPLATE_FIELD_DSAP_SSAP = 41, + RTL930X_TEMPLATE_FIELD_SNAP_OUI = 42, + RTL930X_TEMPLATE_FIELD_FWD_VID = 43, + RTL930X_TEMPLATE_FIELD_RANGE_CHK = 44, + RTL930X_TEMPLATE_FIELD_VLAN_GMSK = 45, /* VLAN Group Mask/IP range check */ + RTL930X_TEMPLATE_FIELD_DLP = 46, + RTL930X_TEMPLATE_FIELD_META_DATA = 47, + RTL930X_TEMPLATE_FIELD_SRC_FWD_VID = 48, + RTL930X_TEMPLATE_FIELD_SLP = 49, }; -/* The meaning of TEMPLATE_FIELD_VLAN depends on phase and the configuration in +/* The meaning of RTL930X_TEMPLATE_FIELD_VLAN depends on phase and the configuration in * RTL930X_PIE_CTRL. We use always the same definition and map to the inner VLAN tag: */ -#define TEMPLATE_FIELD_VLAN TEMPLATE_FIELD_ITAG +#define RTL930X_TEMPLATE_FIELD_VLAN RTL930X_TEMPLATE_FIELD_ITAG /* Number of fixed templates predefined in the RTL9300 SoC */ -#define N_FIXED_TEMPLATES 5 +#define RTL930X_N_FIXED_TEMPLATES 5 /* RTL9300 specific predefined templates */ -static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = { +static enum rtl930x_template_field_id rtl930x_fixed_templates[RTL930X_N_FIXED_TEMPLATES][N_FIXED_FIELDS] = { { - TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2, - TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2, - TEMPLATE_FIELD_VLAN, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_DSAP_SSAP, - TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1 + RTL930X_TEMPLATE_FIELD_DMAC0, RTL930X_TEMPLATE_FIELD_DMAC1, RTL930X_TEMPLATE_FIELD_DMAC2, + RTL930X_TEMPLATE_FIELD_SMAC0, RTL930X_TEMPLATE_FIELD_SMAC1, RTL930X_TEMPLATE_FIELD_SMAC2, + RTL930X_TEMPLATE_FIELD_VLAN, RTL930X_TEMPLATE_FIELD_IP_TOS_PROTO, RTL930X_TEMPLATE_FIELD_DSAP_SSAP, + RTL930X_TEMPLATE_FIELD_ETHERTYPE, RTL930X_TEMPLATE_FIELD_SPM0, RTL930X_TEMPLATE_FIELD_SPM1 }, { - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, - TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_TCP_INFO, - TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_VLAN, - TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1 + RTL930X_TEMPLATE_FIELD_SIP0, RTL930X_TEMPLATE_FIELD_SIP1, RTL930X_TEMPLATE_FIELD_DIP0, + RTL930X_TEMPLATE_FIELD_DIP1, RTL930X_TEMPLATE_FIELD_IP_TOS_PROTO, RTL930X_TEMPLATE_FIELD_TCP_INFO, + RTL930X_TEMPLATE_FIELD_L4_SPORT, RTL930X_TEMPLATE_FIELD_L4_DPORT, RTL930X_TEMPLATE_FIELD_VLAN, + RTL930X_TEMPLATE_FIELD_RANGE_CHK, RTL930X_TEMPLATE_FIELD_SPM0, RTL930X_TEMPLATE_FIELD_SPM1 }, { - TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2, - TEMPLATE_FIELD_VLAN, TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_IP_TOS_PROTO, - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, - TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT + RTL930X_TEMPLATE_FIELD_DMAC0, RTL930X_TEMPLATE_FIELD_DMAC1, RTL930X_TEMPLATE_FIELD_DMAC2, + RTL930X_TEMPLATE_FIELD_VLAN, RTL930X_TEMPLATE_FIELD_ETHERTYPE, RTL930X_TEMPLATE_FIELD_IP_TOS_PROTO, + RTL930X_TEMPLATE_FIELD_SIP0, RTL930X_TEMPLATE_FIELD_SIP1, RTL930X_TEMPLATE_FIELD_DIP0, + RTL930X_TEMPLATE_FIELD_DIP1, RTL930X_TEMPLATE_FIELD_L4_SPORT, RTL930X_TEMPLATE_FIELD_L4_DPORT }, { - TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_DIP2, - TEMPLATE_FIELD_DIP3, TEMPLATE_FIELD_DIP4, TEMPLATE_FIELD_DIP5, - TEMPLATE_FIELD_DIP6, TEMPLATE_FIELD_DIP7, TEMPLATE_FIELD_IP_TOS_PROTO, - TEMPLATE_FIELD_TCP_INFO, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT + RTL930X_TEMPLATE_FIELD_DIP0, RTL930X_TEMPLATE_FIELD_DIP1, RTL930X_TEMPLATE_FIELD_DIP2, + RTL930X_TEMPLATE_FIELD_DIP3, RTL930X_TEMPLATE_FIELD_DIP4, RTL930X_TEMPLATE_FIELD_DIP5, + RTL930X_TEMPLATE_FIELD_DIP6, RTL930X_TEMPLATE_FIELD_DIP7, RTL930X_TEMPLATE_FIELD_IP_TOS_PROTO, + RTL930X_TEMPLATE_FIELD_TCP_INFO, RTL930X_TEMPLATE_FIELD_L4_SPORT, RTL930X_TEMPLATE_FIELD_L4_DPORT }, { - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_SIP2, - TEMPLATE_FIELD_SIP3, TEMPLATE_FIELD_SIP4, TEMPLATE_FIELD_SIP5, - TEMPLATE_FIELD_SIP6, TEMPLATE_FIELD_SIP7, TEMPLATE_FIELD_VLAN, - TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_SPM1 + RTL930X_TEMPLATE_FIELD_SIP0, RTL930X_TEMPLATE_FIELD_SIP1, RTL930X_TEMPLATE_FIELD_SIP2, + RTL930X_TEMPLATE_FIELD_SIP3, RTL930X_TEMPLATE_FIELD_SIP4, RTL930X_TEMPLATE_FIELD_SIP5, + RTL930X_TEMPLATE_FIELD_SIP6, RTL930X_TEMPLATE_FIELD_SIP7, RTL930X_TEMPLATE_FIELD_VLAN, + RTL930X_TEMPLATE_FIELD_RANGE_CHK, RTL930X_TEMPLATE_FIELD_SPM1, RTL930X_TEMPLATE_FIELD_SPM1 }, }; @@ -1112,70 +1112,70 @@ static void rtl930x_pie_lookup_enable(struct rtl838x_switch_priv *priv, int inde * on all SoCs * On the RTL9300 the mask fields are not word-aligend! */ -static void rtl930x_write_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[]) +static void rtl930x_write_pie_templated(u32 r[], struct pie_rule *pr, enum rtl930x_template_field_id t[]) { for (int i = 0; i < N_FIXED_FIELDS; i++) { - enum template_field_id field_type = t[i]; + enum rtl930x_template_field_id field_type = t[i]; u16 data = 0, data_m = 0; switch (field_type) { - case TEMPLATE_FIELD_SPM0: + case RTL930X_TEMPLATE_FIELD_SPM0: data = pr->spm; data_m = pr->spm_m; break; - case TEMPLATE_FIELD_SPM1: + case RTL930X_TEMPLATE_FIELD_SPM1: data = pr->spm >> 16; data_m = pr->spm_m >> 16; break; - case TEMPLATE_FIELD_OTAG: + case RTL930X_TEMPLATE_FIELD_OTAG: data = pr->otag; data_m = pr->otag_m; break; - case TEMPLATE_FIELD_SMAC0: + case RTL930X_TEMPLATE_FIELD_SMAC0: data = pr->smac[4]; data = (data << 8) | pr->smac[5]; data_m = pr->smac_m[4]; data_m = (data_m << 8) | pr->smac_m[5]; break; - case TEMPLATE_FIELD_SMAC1: + case RTL930X_TEMPLATE_FIELD_SMAC1: data = pr->smac[2]; data = (data << 8) | pr->smac[3]; data_m = pr->smac_m[2]; data_m = (data_m << 8) | pr->smac_m[3]; break; - case TEMPLATE_FIELD_SMAC2: + case RTL930X_TEMPLATE_FIELD_SMAC2: data = pr->smac[0]; data = (data << 8) | pr->smac[1]; data_m = pr->smac_m[0]; data_m = (data_m << 8) | pr->smac_m[1]; break; - case TEMPLATE_FIELD_DMAC0: + case RTL930X_TEMPLATE_FIELD_DMAC0: data = pr->dmac[4]; data = (data << 8) | pr->dmac[5]; data_m = pr->dmac_m[4]; data_m = (data_m << 8) | pr->dmac_m[5]; break; - case TEMPLATE_FIELD_DMAC1: + case RTL930X_TEMPLATE_FIELD_DMAC1: data = pr->dmac[2]; data = (data << 8) | pr->dmac[3]; data_m = pr->dmac_m[2]; data_m = (data_m << 8) | pr->dmac_m[3]; break; - case TEMPLATE_FIELD_DMAC2: + case RTL930X_TEMPLATE_FIELD_DMAC2: data = pr->dmac[0]; data = (data << 8) | pr->dmac[1]; data_m = pr->dmac_m[0]; data_m = (data_m << 8) | pr->dmac_m[1]; break; - case TEMPLATE_FIELD_ETHERTYPE: + case RTL930X_TEMPLATE_FIELD_ETHERTYPE: data = pr->ethertype; data_m = pr->ethertype_m; break; - case TEMPLATE_FIELD_ITAG: + case RTL930X_TEMPLATE_FIELD_ITAG: data = pr->itag; data_m = pr->itag_m; break; - case TEMPLATE_FIELD_SIP0: + case RTL930X_TEMPLATE_FIELD_SIP0: if (pr->is_ipv6) { data = pr->sip6.s6_addr16[7]; data_m = pr->sip6_m.s6_addr16[7]; @@ -1184,7 +1184,7 @@ static void rtl930x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->sip_m; } break; - case TEMPLATE_FIELD_SIP1: + case RTL930X_TEMPLATE_FIELD_SIP1: if (pr->is_ipv6) { data = pr->sip6.s6_addr16[6]; data_m = pr->sip6_m.s6_addr16[6]; @@ -1193,16 +1193,16 @@ static void rtl930x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->sip_m >> 16; } break; - case TEMPLATE_FIELD_SIP2: - case TEMPLATE_FIELD_SIP3: - case TEMPLATE_FIELD_SIP4: - case TEMPLATE_FIELD_SIP5: - case TEMPLATE_FIELD_SIP6: - case TEMPLATE_FIELD_SIP7: - data = pr->sip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)]; - data_m = pr->sip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)]; + case RTL930X_TEMPLATE_FIELD_SIP2: + case RTL930X_TEMPLATE_FIELD_SIP3: + case RTL930X_TEMPLATE_FIELD_SIP4: + case RTL930X_TEMPLATE_FIELD_SIP5: + case RTL930X_TEMPLATE_FIELD_SIP6: + case RTL930X_TEMPLATE_FIELD_SIP7: + data = pr->sip6.s6_addr16[5 - (field_type - RTL930X_TEMPLATE_FIELD_SIP2)]; + data_m = pr->sip6_m.s6_addr16[5 - (field_type - RTL930X_TEMPLATE_FIELD_SIP2)]; break; - case TEMPLATE_FIELD_DIP0: + case RTL930X_TEMPLATE_FIELD_DIP0: if (pr->is_ipv6) { data = pr->dip6.s6_addr16[7]; data_m = pr->dip6_m.s6_addr16[7]; @@ -1211,7 +1211,7 @@ static void rtl930x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->dip_m; } break; - case TEMPLATE_FIELD_DIP1: + case RTL930X_TEMPLATE_FIELD_DIP1: if (pr->is_ipv6) { data = pr->dip6.s6_addr16[6]; data_m = pr->dip6_m.s6_addr16[6]; @@ -1220,37 +1220,37 @@ static void rtl930x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ data_m = pr->dip_m >> 16; } break; - case TEMPLATE_FIELD_DIP2: - case TEMPLATE_FIELD_DIP3: - case TEMPLATE_FIELD_DIP4: - case TEMPLATE_FIELD_DIP5: - case TEMPLATE_FIELD_DIP6: - case TEMPLATE_FIELD_DIP7: - data = pr->dip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)]; - data_m = pr->dip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)]; + case RTL930X_TEMPLATE_FIELD_DIP2: + case RTL930X_TEMPLATE_FIELD_DIP3: + case RTL930X_TEMPLATE_FIELD_DIP4: + case RTL930X_TEMPLATE_FIELD_DIP5: + case RTL930X_TEMPLATE_FIELD_DIP6: + case RTL930X_TEMPLATE_FIELD_DIP7: + data = pr->dip6.s6_addr16[5 - (field_type - RTL930X_TEMPLATE_FIELD_DIP2)]; + data_m = pr->dip6_m.s6_addr16[5 - (field_type - RTL930X_TEMPLATE_FIELD_DIP2)]; break; - case TEMPLATE_FIELD_IP_TOS_PROTO: + case RTL930X_TEMPLATE_FIELD_IP_TOS_PROTO: data = pr->tos_proto; data_m = pr->tos_proto_m; break; - case TEMPLATE_FIELD_L4_SPORT: + case RTL930X_TEMPLATE_FIELD_L4_SPORT: data = pr->sport; data_m = pr->sport_m; break; - case TEMPLATE_FIELD_L4_DPORT: + case RTL930X_TEMPLATE_FIELD_L4_DPORT: data = pr->dport; data_m = pr->dport_m; break; - case TEMPLATE_FIELD_DSAP_SSAP: + case RTL930X_TEMPLATE_FIELD_DSAP_SSAP: data = pr->dsap_ssap; data_m = pr->dsap_ssap_m; break; - case TEMPLATE_FIELD_TCP_INFO: + case RTL930X_TEMPLATE_FIELD_TCP_INFO: data = pr->tcp_info; data_m = pr->tcp_info_m; break; - case TEMPLATE_FIELD_RANGE_CHK: - pr_debug("TEMPLATE_FIELD_RANGE_CHK: not configured\n"); + case RTL930X_TEMPLATE_FIELD_RANGE_CHK: + pr_debug("RTL930X_TEMPLATE_FIELD_RANGE_CHK: not configured\n"); break; default: pr_debug("%s: unknown field %d\n", __func__, field_type); @@ -1434,7 +1434,7 @@ static int rtl930x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, str rtl930x_write_pie_fixed_fields(r, pr); pr_debug("%s: template %d\n", __func__, (t_select >> (pr->tid * 4)) & 0xf); - rtl930x_write_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 4)) & 0xf]); + rtl930x_write_pie_templated(r, pr, rtl930x_fixed_templates[(t_select >> (pr->tid * 4)) & 0xf]); rtl930x_write_pie_action(r, pr); @@ -1446,10 +1446,10 @@ static int rtl930x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, str return 0; } -static bool rtl930x_pie_templ_has(int t, enum template_field_id field_type) +static bool rtl930x_pie_templ_has(int t, enum rtl930x_template_field_id field_type) { for (int i = 0; i < N_FIXED_FIELDS; i++) { - enum template_field_id ft = fixed_templates[t][i]; + enum rtl930x_template_field_id ft = rtl930x_fixed_templates[t][i]; if (field_type == ft) return true; @@ -1459,7 +1459,7 @@ static bool rtl930x_pie_templ_has(int t, enum template_field_id field_type) } /* Verify that the rule pr is compatible with a given template t in block - * Note that this function is SoC specific since the values of e.g. TEMPLATE_FIELD_SIP0 + * Note that this function is SoC specific since the values of e.g. RTL930X_TEMPLATE_FIELD_SIP0 * depend on the SoC */ static int rtl930x_pie_verify_template(struct rtl838x_switch_priv *priv, @@ -1467,10 +1467,10 @@ static int rtl930x_pie_verify_template(struct rtl838x_switch_priv *priv, { int i; - if (!pr->is_ipv6 && pr->sip_m && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_SIP0)) + if (!pr->is_ipv6 && pr->sip_m && !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_SIP0)) return -1; - if (!pr->is_ipv6 && pr->dip_m && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_DIP0)) + if (!pr->is_ipv6 && pr->dip_m && !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_DIP0)) return -1; if (pr->is_ipv6) { @@ -1478,32 +1478,32 @@ static int rtl930x_pie_verify_template(struct rtl838x_switch_priv *priv, pr->sip6_m.s6_addr32[1] || pr->sip6_m.s6_addr32[2] || pr->sip6_m.s6_addr32[3]) && - !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_SIP2)) + !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_SIP2)) return -1; if ((pr->dip6_m.s6_addr32[0] || pr->dip6_m.s6_addr32[1] || pr->dip6_m.s6_addr32[2] || pr->dip6_m.s6_addr32[3]) && - !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_DIP2)) + !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_DIP2)) return -1; } - if (ether_addr_to_u64(pr->smac_m) && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_SMAC0)) + if (ether_addr_to_u64(pr->smac_m) && !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_SMAC0)) return -1; - if (ether_addr_to_u64(pr->dmac_m) && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_DMAC0)) + if (ether_addr_to_u64(pr->dmac_m) && !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_DMAC0)) return -1; - if (pr->ethertype_m && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_ETHERTYPE)) + if (pr->ethertype_m && !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_ETHERTYPE)) return -1; - if (pr->itag_m && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_VLAN)) + if (pr->itag_m && !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_VLAN)) return -1; - if (pr->sport_m && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_L4_SPORT)) + if (pr->sport_m && !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_L4_SPORT)) return -1; - if (pr->dport_m && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_L4_DPORT)) + if (pr->dport_m && !rtl930x_pie_templ_has(t, RTL930X_TEMPLATE_FIELD_L4_DPORT)) return -1; /* TODO: Check more */ diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c index 1339a768432..00477dad62a 100644 --- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c +++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c @@ -14,92 +14,92 @@ #define RTL931X_LED_CLK_SEL_100NS 3 /* Definition of the RTL931X-specific template field IDs as used in the PIE */ -enum template_field_id { - TEMPLATE_FIELD_SPM0 = 1, - TEMPLATE_FIELD_SPM1 = 2, - TEMPLATE_FIELD_SPM2 = 3, - TEMPLATE_FIELD_SPM3 = 4, - TEMPLATE_FIELD_DMAC0 = 9, - TEMPLATE_FIELD_DMAC1 = 10, - TEMPLATE_FIELD_DMAC2 = 11, - TEMPLATE_FIELD_SMAC0 = 12, - TEMPLATE_FIELD_SMAC1 = 13, - TEMPLATE_FIELD_SMAC2 = 14, - TEMPLATE_FIELD_ETHERTYPE = 15, - TEMPLATE_FIELD_OTAG = 16, - TEMPLATE_FIELD_ITAG = 17, - TEMPLATE_FIELD_SIP0 = 18, - TEMPLATE_FIELD_SIP1 = 19, - TEMPLATE_FIELD_DIP0 = 20, - TEMPLATE_FIELD_DIP1 = 21, - TEMPLATE_FIELD_IP_TOS_PROTO = 22, - TEMPLATE_FIELD_L4_SPORT = 23, - TEMPLATE_FIELD_L4_DPORT = 24, - TEMPLATE_FIELD_L34_HEADER = 25, - TEMPLATE_FIELD_TCP_INFO = 26, - TEMPLATE_FIELD_SIP2 = 34, - TEMPLATE_FIELD_SIP3 = 35, - TEMPLATE_FIELD_SIP4 = 36, - TEMPLATE_FIELD_SIP5 = 37, - TEMPLATE_FIELD_SIP6 = 38, - TEMPLATE_FIELD_SIP7 = 39, - TEMPLATE_FIELD_DIP2 = 42, - TEMPLATE_FIELD_DIP3 = 43, - TEMPLATE_FIELD_DIP4 = 44, - TEMPLATE_FIELD_DIP5 = 45, - TEMPLATE_FIELD_DIP6 = 46, - TEMPLATE_FIELD_DIP7 = 47, - TEMPLATE_FIELD_FLOW_LABEL = 49, - TEMPLATE_FIELD_DSAP_SSAP = 50, - TEMPLATE_FIELD_FWD_VID = 52, - TEMPLATE_FIELD_RANGE_CHK = 53, - TEMPLATE_FIELD_SLP = 55, - TEMPLATE_FIELD_DLP = 56, - TEMPLATE_FIELD_META_DATA = 57, - TEMPLATE_FIELD_FIRST_MPLS1 = 60, - TEMPLATE_FIELD_FIRST_MPLS2 = 61, - TEMPLATE_FIELD_DPM3 = 8, +enum rtl931x_template_field_id { + RTL931X_TEMPLATE_FIELD_SPM0 = 1, + RTL931X_TEMPLATE_FIELD_SPM1 = 2, + RTL931X_TEMPLATE_FIELD_SPM2 = 3, + RTL931X_TEMPLATE_FIELD_SPM3 = 4, + RTL931X_TEMPLATE_FIELD_DMAC0 = 9, + RTL931X_TEMPLATE_FIELD_DMAC1 = 10, + RTL931X_TEMPLATE_FIELD_DMAC2 = 11, + RTL931X_TEMPLATE_FIELD_SMAC0 = 12, + RTL931X_TEMPLATE_FIELD_SMAC1 = 13, + RTL931X_TEMPLATE_FIELD_SMAC2 = 14, + RTL931X_TEMPLATE_FIELD_ETHERTYPE = 15, + RTL931X_TEMPLATE_FIELD_OTAG = 16, + RTL931X_TEMPLATE_FIELD_ITAG = 17, + RTL931X_TEMPLATE_FIELD_SIP0 = 18, + RTL931X_TEMPLATE_FIELD_SIP1 = 19, + RTL931X_TEMPLATE_FIELD_DIP0 = 20, + RTL931X_TEMPLATE_FIELD_DIP1 = 21, + RTL931X_TEMPLATE_FIELD_IP_TOS_PROTO = 22, + RTL931X_TEMPLATE_FIELD_L4_SPORT = 23, + RTL931X_TEMPLATE_FIELD_L4_DPORT = 24, + RTL931X_TEMPLATE_FIELD_L34_HEADER = 25, + RTL931X_TEMPLATE_FIELD_TCP_INFO = 26, + RTL931X_TEMPLATE_FIELD_SIP2 = 34, + RTL931X_TEMPLATE_FIELD_SIP3 = 35, + RTL931X_TEMPLATE_FIELD_SIP4 = 36, + RTL931X_TEMPLATE_FIELD_SIP5 = 37, + RTL931X_TEMPLATE_FIELD_SIP6 = 38, + RTL931X_TEMPLATE_FIELD_SIP7 = 39, + RTL931X_TEMPLATE_FIELD_DIP2 = 42, + RTL931X_TEMPLATE_FIELD_DIP3 = 43, + RTL931X_TEMPLATE_FIELD_DIP4 = 44, + RTL931X_TEMPLATE_FIELD_DIP5 = 45, + RTL931X_TEMPLATE_FIELD_DIP6 = 46, + RTL931X_TEMPLATE_FIELD_DIP7 = 47, + RTL931X_TEMPLATE_FIELD_FLOW_LABEL = 49, + RTL931X_TEMPLATE_FIELD_DSAP_SSAP = 50, + RTL931X_TEMPLATE_FIELD_FWD_VID = 52, + RTL931X_TEMPLATE_FIELD_RANGE_CHK = 53, + RTL931X_TEMPLATE_FIELD_SLP = 55, + RTL931X_TEMPLATE_FIELD_DLP = 56, + RTL931X_TEMPLATE_FIELD_META_DATA = 57, + RTL931X_TEMPLATE_FIELD_FIRST_MPLS1 = 60, + RTL931X_TEMPLATE_FIELD_FIRST_MPLS2 = 61, + RTL931X_TEMPLATE_FIELD_DPM3 = 8, }; -/* The meaning of TEMPLATE_FIELD_VLAN depends on phase and the configuration in +/* The meaning of RTL931X_TEMPLATE_FIELD_VLAN depends on phase and the configuration in * RTL931X_PIE_CTRL. We use always the same definition and map to the inner VLAN tag: */ -#define TEMPLATE_FIELD_VLAN TEMPLATE_FIELD_ITAG +#define RTL931X_TEMPLATE_FIELD_VLAN RTL931X_TEMPLATE_FIELD_ITAG /* Number of fixed templates predefined in the RTL9300 SoC */ -#define N_FIXED_TEMPLATES 5 +#define RTL931X_N_FIXED_TEMPLATES 5 /* RTL931x specific predefined templates */ -static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS_RTL931X] = { +static enum rtl931x_template_field_id rtl931x_fixed_templates[RTL931X_N_FIXED_TEMPLATES][N_FIXED_FIELDS_RTL931X] = { { - TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2, - TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2, - TEMPLATE_FIELD_VLAN, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_DSAP_SSAP, - TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, - TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3 + RTL931X_TEMPLATE_FIELD_DMAC0, RTL931X_TEMPLATE_FIELD_DMAC1, RTL931X_TEMPLATE_FIELD_DMAC2, + RTL931X_TEMPLATE_FIELD_SMAC0, RTL931X_TEMPLATE_FIELD_SMAC1, RTL931X_TEMPLATE_FIELD_SMAC2, + RTL931X_TEMPLATE_FIELD_VLAN, RTL931X_TEMPLATE_FIELD_IP_TOS_PROTO, RTL931X_TEMPLATE_FIELD_DSAP_SSAP, + RTL931X_TEMPLATE_FIELD_ETHERTYPE, RTL931X_TEMPLATE_FIELD_SPM0, RTL931X_TEMPLATE_FIELD_SPM1, + RTL931X_TEMPLATE_FIELD_SPM2, RTL931X_TEMPLATE_FIELD_SPM3 }, { - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, - TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_TCP_INFO, - TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_VLAN, - TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, - TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3 + RTL931X_TEMPLATE_FIELD_SIP0, RTL931X_TEMPLATE_FIELD_SIP1, RTL931X_TEMPLATE_FIELD_DIP0, + RTL931X_TEMPLATE_FIELD_DIP1, RTL931X_TEMPLATE_FIELD_IP_TOS_PROTO, RTL931X_TEMPLATE_FIELD_TCP_INFO, + RTL931X_TEMPLATE_FIELD_L4_SPORT, RTL931X_TEMPLATE_FIELD_L4_DPORT, RTL931X_TEMPLATE_FIELD_VLAN, + RTL931X_TEMPLATE_FIELD_RANGE_CHK, RTL931X_TEMPLATE_FIELD_SPM0, RTL931X_TEMPLATE_FIELD_SPM1, + RTL931X_TEMPLATE_FIELD_SPM2, RTL931X_TEMPLATE_FIELD_SPM3 }, { - TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2, - TEMPLATE_FIELD_VLAN, TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_IP_TOS_PROTO, - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, - TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT, - TEMPLATE_FIELD_META_DATA, TEMPLATE_FIELD_SLP + RTL931X_TEMPLATE_FIELD_DMAC0, RTL931X_TEMPLATE_FIELD_DMAC1, RTL931X_TEMPLATE_FIELD_DMAC2, + RTL931X_TEMPLATE_FIELD_VLAN, RTL931X_TEMPLATE_FIELD_ETHERTYPE, RTL931X_TEMPLATE_FIELD_IP_TOS_PROTO, + RTL931X_TEMPLATE_FIELD_SIP0, RTL931X_TEMPLATE_FIELD_SIP1, RTL931X_TEMPLATE_FIELD_DIP0, + RTL931X_TEMPLATE_FIELD_DIP1, RTL931X_TEMPLATE_FIELD_L4_SPORT, RTL931X_TEMPLATE_FIELD_L4_DPORT, + RTL931X_TEMPLATE_FIELD_META_DATA, RTL931X_TEMPLATE_FIELD_SLP }, { - TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_DIP2, - TEMPLATE_FIELD_DIP3, TEMPLATE_FIELD_DIP4, TEMPLATE_FIELD_DIP5, - TEMPLATE_FIELD_DIP6, TEMPLATE_FIELD_DIP7, TEMPLATE_FIELD_IP_TOS_PROTO, - TEMPLATE_FIELD_TCP_INFO, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT, - TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SLP + RTL931X_TEMPLATE_FIELD_DIP0, RTL931X_TEMPLATE_FIELD_DIP1, RTL931X_TEMPLATE_FIELD_DIP2, + RTL931X_TEMPLATE_FIELD_DIP3, RTL931X_TEMPLATE_FIELD_DIP4, RTL931X_TEMPLATE_FIELD_DIP5, + RTL931X_TEMPLATE_FIELD_DIP6, RTL931X_TEMPLATE_FIELD_DIP7, RTL931X_TEMPLATE_FIELD_IP_TOS_PROTO, + RTL931X_TEMPLATE_FIELD_TCP_INFO, RTL931X_TEMPLATE_FIELD_L4_SPORT, RTL931X_TEMPLATE_FIELD_L4_DPORT, + RTL931X_TEMPLATE_FIELD_RANGE_CHK, RTL931X_TEMPLATE_FIELD_SLP }, { - TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_SIP2, - TEMPLATE_FIELD_SIP3, TEMPLATE_FIELD_SIP4, TEMPLATE_FIELD_SIP5, - TEMPLATE_FIELD_SIP6, TEMPLATE_FIELD_SIP7, TEMPLATE_FIELD_META_DATA, - TEMPLATE_FIELD_VLAN, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, - TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3 + RTL931X_TEMPLATE_FIELD_SIP0, RTL931X_TEMPLATE_FIELD_SIP1, RTL931X_TEMPLATE_FIELD_SIP2, + RTL931X_TEMPLATE_FIELD_SIP3, RTL931X_TEMPLATE_FIELD_SIP4, RTL931X_TEMPLATE_FIELD_SIP5, + RTL931X_TEMPLATE_FIELD_SIP6, RTL931X_TEMPLATE_FIELD_SIP7, RTL931X_TEMPLATE_FIELD_META_DATA, + RTL931X_TEMPLATE_FIELD_VLAN, RTL931X_TEMPLATE_FIELD_SPM0, RTL931X_TEMPLATE_FIELD_SPM1, + RTL931X_TEMPLATE_FIELD_SPM2, RTL931X_TEMPLATE_FIELD_SPM3 }, }; @@ -786,68 +786,68 @@ static void rtl931x_pie_lookup_enable(struct rtl838x_switch_priv *priv, int inde * pie_data_fill function for all SoCs, provided we have also for each SoC a * function to map between physical and intermediate field type */ -static int rtl931x_pie_data_fill(enum template_field_id field_type, struct pie_rule *pr, u16 *data, u16 *data_m) +static int rtl931x_pie_data_fill(enum rtl931x_template_field_id field_type, struct pie_rule *pr, u16 *data, u16 *data_m) { *data = *data_m = 0; switch (field_type) { - case TEMPLATE_FIELD_SPM0: + case RTL931X_TEMPLATE_FIELD_SPM0: *data = pr->spm; *data_m = pr->spm_m; break; - case TEMPLATE_FIELD_SPM1: + case RTL931X_TEMPLATE_FIELD_SPM1: *data = pr->spm >> 16; *data_m = pr->spm_m >> 16; break; - case TEMPLATE_FIELD_OTAG: + case RTL931X_TEMPLATE_FIELD_OTAG: *data = pr->otag; *data_m = pr->otag_m; break; - case TEMPLATE_FIELD_SMAC0: + case RTL931X_TEMPLATE_FIELD_SMAC0: *data = pr->smac[4]; *data = (*data << 8) | pr->smac[5]; *data_m = pr->smac_m[4]; *data_m = (*data_m << 8) | pr->smac_m[5]; break; - case TEMPLATE_FIELD_SMAC1: + case RTL931X_TEMPLATE_FIELD_SMAC1: *data = pr->smac[2]; *data = (*data << 8) | pr->smac[3]; *data_m = pr->smac_m[2]; *data_m = (*data_m << 8) | pr->smac_m[3]; break; - case TEMPLATE_FIELD_SMAC2: + case RTL931X_TEMPLATE_FIELD_SMAC2: *data = pr->smac[0]; *data = (*data << 8) | pr->smac[1]; *data_m = pr->smac_m[0]; *data_m = (*data_m << 8) | pr->smac_m[1]; break; - case TEMPLATE_FIELD_DMAC0: + case RTL931X_TEMPLATE_FIELD_DMAC0: *data = pr->dmac[4]; *data = (*data << 8) | pr->dmac[5]; *data_m = pr->dmac_m[4]; *data_m = (*data_m << 8) | pr->dmac_m[5]; break; - case TEMPLATE_FIELD_DMAC1: + case RTL931X_TEMPLATE_FIELD_DMAC1: *data = pr->dmac[2]; *data = (*data << 8) | pr->dmac[3]; *data_m = pr->dmac_m[2]; *data_m = (*data_m << 8) | pr->dmac_m[3]; break; - case TEMPLATE_FIELD_DMAC2: + case RTL931X_TEMPLATE_FIELD_DMAC2: *data = pr->dmac[0]; *data = (*data << 8) | pr->dmac[1]; *data_m = pr->dmac_m[0]; *data_m = (*data_m << 8) | pr->dmac_m[1]; break; - case TEMPLATE_FIELD_ETHERTYPE: + case RTL931X_TEMPLATE_FIELD_ETHERTYPE: *data = pr->ethertype; *data_m = pr->ethertype_m; break; - case TEMPLATE_FIELD_ITAG: + case RTL931X_TEMPLATE_FIELD_ITAG: *data = pr->itag; *data_m = pr->itag_m; break; - case TEMPLATE_FIELD_SIP0: + case RTL931X_TEMPLATE_FIELD_SIP0: if (pr->is_ipv6) { *data = pr->sip6.s6_addr16[7]; *data_m = pr->sip6_m.s6_addr16[7]; @@ -856,7 +856,7 @@ static int rtl931x_pie_data_fill(enum template_field_id field_type, struct pie_r *data_m = pr->sip_m; } break; - case TEMPLATE_FIELD_SIP1: + case RTL931X_TEMPLATE_FIELD_SIP1: if (pr->is_ipv6) { *data = pr->sip6.s6_addr16[6]; *data_m = pr->sip6_m.s6_addr16[6]; @@ -865,16 +865,16 @@ static int rtl931x_pie_data_fill(enum template_field_id field_type, struct pie_r *data_m = pr->sip_m >> 16; } break; - case TEMPLATE_FIELD_SIP2: - case TEMPLATE_FIELD_SIP3: - case TEMPLATE_FIELD_SIP4: - case TEMPLATE_FIELD_SIP5: - case TEMPLATE_FIELD_SIP6: - case TEMPLATE_FIELD_SIP7: - *data = pr->sip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)]; - *data_m = pr->sip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)]; + case RTL931X_TEMPLATE_FIELD_SIP2: + case RTL931X_TEMPLATE_FIELD_SIP3: + case RTL931X_TEMPLATE_FIELD_SIP4: + case RTL931X_TEMPLATE_FIELD_SIP5: + case RTL931X_TEMPLATE_FIELD_SIP6: + case RTL931X_TEMPLATE_FIELD_SIP7: + *data = pr->sip6.s6_addr16[5 - (field_type - RTL931X_TEMPLATE_FIELD_SIP2)]; + *data_m = pr->sip6_m.s6_addr16[5 - (field_type - RTL931X_TEMPLATE_FIELD_SIP2)]; break; - case TEMPLATE_FIELD_DIP0: + case RTL931X_TEMPLATE_FIELD_DIP0: if (pr->is_ipv6) { *data = pr->dip6.s6_addr16[7]; *data_m = pr->dip6_m.s6_addr16[7]; @@ -883,7 +883,7 @@ static int rtl931x_pie_data_fill(enum template_field_id field_type, struct pie_r *data_m = pr->dip_m; } break; - case TEMPLATE_FIELD_DIP1: + case RTL931X_TEMPLATE_FIELD_DIP1: if (pr->is_ipv6) { *data = pr->dip6.s6_addr16[6]; *data_m = pr->dip6_m.s6_addr16[6]; @@ -892,37 +892,37 @@ static int rtl931x_pie_data_fill(enum template_field_id field_type, struct pie_r *data_m = pr->dip_m >> 16; } break; - case TEMPLATE_FIELD_DIP2: - case TEMPLATE_FIELD_DIP3: - case TEMPLATE_FIELD_DIP4: - case TEMPLATE_FIELD_DIP5: - case TEMPLATE_FIELD_DIP6: - case TEMPLATE_FIELD_DIP7: - *data = pr->dip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)]; - *data_m = pr->dip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)]; + case RTL931X_TEMPLATE_FIELD_DIP2: + case RTL931X_TEMPLATE_FIELD_DIP3: + case RTL931X_TEMPLATE_FIELD_DIP4: + case RTL931X_TEMPLATE_FIELD_DIP5: + case RTL931X_TEMPLATE_FIELD_DIP6: + case RTL931X_TEMPLATE_FIELD_DIP7: + *data = pr->dip6.s6_addr16[5 - (field_type - RTL931X_TEMPLATE_FIELD_DIP2)]; + *data_m = pr->dip6_m.s6_addr16[5 - (field_type - RTL931X_TEMPLATE_FIELD_DIP2)]; break; - case TEMPLATE_FIELD_IP_TOS_PROTO: + case RTL931X_TEMPLATE_FIELD_IP_TOS_PROTO: *data = pr->tos_proto; *data_m = pr->tos_proto_m; break; - case TEMPLATE_FIELD_L4_SPORT: + case RTL931X_TEMPLATE_FIELD_L4_SPORT: *data = pr->sport; *data_m = pr->sport_m; break; - case TEMPLATE_FIELD_L4_DPORT: + case RTL931X_TEMPLATE_FIELD_L4_DPORT: *data = pr->dport; *data_m = pr->dport_m; break; - case TEMPLATE_FIELD_DSAP_SSAP: + case RTL931X_TEMPLATE_FIELD_DSAP_SSAP: *data = pr->dsap_ssap; *data_m = pr->dsap_ssap_m; break; - case TEMPLATE_FIELD_TCP_INFO: + case RTL931X_TEMPLATE_FIELD_TCP_INFO: *data = pr->tcp_info; *data_m = pr->tcp_info_m; break; - case TEMPLATE_FIELD_RANGE_CHK: - pr_debug("TEMPLATE_FIELD_RANGE_CHK: not configured\n"); + case RTL931X_TEMPLATE_FIELD_RANGE_CHK: + pr_debug("RTL931X_TEMPLATE_FIELD_RANGE_CHK: not configured\n"); break; default: pr_debug("%s: unknown field %d\n", __func__, field_type); @@ -940,7 +940,7 @@ static int rtl931x_pie_data_fill(enum template_field_id field_type, struct pie_r * on all SoCs * On the RTL9300 the mask fields are not word-aligend! */ -static void rtl931x_write_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[]) +static void rtl931x_write_pie_templated(u32 r[], struct pie_rule *pr, enum rtl931x_template_field_id t[]) { for (int i = 0; i < N_FIXED_FIELDS; i++) { u16 data, data_m; @@ -1118,7 +1118,7 @@ static int rtl931x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, str rtl931x_write_pie_fixed_fields(r, pr); pr_debug("%s: template %d\n", __func__, (t_select >> (pr->tid * 4)) & 0xf); - rtl931x_write_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 4)) & 0xf]); + rtl931x_write_pie_templated(r, pr, rtl931x_fixed_templates[(t_select >> (pr->tid * 4)) & 0xf]); rtl931x_write_pie_action(r, pr); @@ -1130,10 +1130,10 @@ static int rtl931x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, str return 0; } -static bool rtl931x_pie_templ_has(int t, enum template_field_id field_type) +static bool rtl931x_pie_templ_has(int t, enum rtl931x_template_field_id field_type) { for (int i = 0; i < N_FIXED_FIELDS_RTL931X; i++) { - enum template_field_id ft = fixed_templates[t][i]; + enum rtl931x_template_field_id ft = rtl931x_fixed_templates[t][i]; if (field_type == ft) return true; @@ -1143,7 +1143,7 @@ static bool rtl931x_pie_templ_has(int t, enum template_field_id field_type) } /* Verify that the rule pr is compatible with a given template t in block - * Note that this function is SoC specific since the values of e.g. TEMPLATE_FIELD_SIP0 + * Note that this function is SoC specific since the values of e.g. RTL931X_TEMPLATE_FIELD_SIP0 * depend on the SoC */ static int rtl931x_pie_verify_template(struct rtl838x_switch_priv *priv, @@ -1151,10 +1151,10 @@ static int rtl931x_pie_verify_template(struct rtl838x_switch_priv *priv, { int i; - if (!pr->is_ipv6 && pr->sip_m && !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_SIP0)) + if (!pr->is_ipv6 && pr->sip_m && !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_SIP0)) return -1; - if (!pr->is_ipv6 && pr->dip_m && !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_DIP0)) + if (!pr->is_ipv6 && pr->dip_m && !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_DIP0)) return -1; if (pr->is_ipv6) { @@ -1162,29 +1162,29 @@ static int rtl931x_pie_verify_template(struct rtl838x_switch_priv *priv, pr->sip6_m.s6_addr32[1] || pr->sip6_m.s6_addr32[2] || pr->sip6_m.s6_addr32[3]) && - !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_SIP2)) + !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_SIP2)) return -1; if ((pr->dip6_m.s6_addr32[0] || pr->dip6_m.s6_addr32[1] || pr->dip6_m.s6_addr32[2] || pr->dip6_m.s6_addr32[3]) && - !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_DIP2)) + !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_DIP2)) return -1; } - if (ether_addr_to_u64(pr->smac_m) && !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_SMAC0)) + if (ether_addr_to_u64(pr->smac_m) && !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_SMAC0)) return -1; - if (ether_addr_to_u64(pr->dmac_m) && !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_DMAC0)) + if (ether_addr_to_u64(pr->dmac_m) && !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_DMAC0)) return -1; - if (pr->itag_m && !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_VLAN)) + if (pr->itag_m && !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_VLAN)) return -1; - if (pr->sport_m && !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_L4_SPORT)) + if (pr->sport_m && !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_L4_SPORT)) return -1; - if (pr->dport_m && !rtl931x_pie_templ_has(t, TEMPLATE_FIELD_L4_DPORT)) + if (pr->dport_m && !rtl931x_pie_templ_has(t, RTL931X_TEMPLATE_FIELD_L4_DPORT)) return -1; /* TODO: Check more */