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realtek: dts: rearrange mdio-bus below mdio-controller

Browse Source 
The mdio controller got its own dts node with a dedicated bus node.
Until now it still searches the phy nodes in the ethernet node.

Change the driver so it searches the nodes at the right location.
For this to work move the phy nodes in all dts/dtsi over to the new
bus node. Use the following replacement rule:

Replace old full declaration

&ethernet0 {
  mdio-bus {
    ...
  };
};

and old abbreviated declaration

&mdio {
  ...
};

simply with the new declaration

&mdio_bus0 {
  ...
};

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19986
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Markus Stockhausen
2025-09-08 05:53:16 -04:00
committed by Hauke Mehrtens
parent 616559b6d3
commit 57b2706845
50 changed files with 908 additions and 1139 deletions
Download Patch File Download Diff File Expand all files Collapse all files
target/linux/realtek/dts/rtl8380_d-link_dgs-1210-10mp-f.dts
+11 -18
View File
@@ -75,25 +75,18 @@
status = "okay"; status = "okay";
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(8) INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY(9) INTERNAL_PHY_SDS(26, 5)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8380_engenius_ews2910p.dtsi
+11 -18
View File
@@ -174,25 +174,18 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(8) INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY(9) INTERNAL_PHY_SDS(26, 5)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi
+11 -18
View File
@@ -57,25 +57,18 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(8) INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY(9) INTERNAL_PHY_SDS(26, 5)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts
+11 -18
View File
@@ -148,24 +148,17 @@
status = "okay"; status = "okay";
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(8) INTERNAL_PHY(14)
INTERNAL_PHY(9) INTERNAL_PHY(15)
INTERNAL_PHY(10) INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY(11) INTERNAL_PHY_SDS(26, 5)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
+9 -16
View File
@@ -51,22 +51,15 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(8) INTERNAL_PHY(14)
INTERNAL_PHY(9) INTERNAL_PHY(15)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
};
}; };
&spi0 { &spi0 {
target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts
+1 -1
View File
@@ -54,7 +54,7 @@
status = "okay"; status = "okay";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(16) EXTERNAL_PHY(16)
EXTERNAL_PHY(17) EXTERNAL_PHY(17)
}; };
target/linux/realtek/dts/rtl8380_netgear_gs110tup-v1.dts
+1 -1
View File
@@ -45,7 +45,7 @@
status = "okay"; status = "okay";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(16) EXTERNAL_PHY(16)
EXTERNAL_PHY(24) EXTERNAL_PHY(24)
}; };
target/linux/realtek/dts/rtl8380_netgear_gs310tp-v1.dts
+1 -1
View File
@@ -49,7 +49,7 @@
status = "okay"; status = "okay";
}; };
&mdio { &mdio_bus0 {
INTERNAL_PHY_SDS(24, 4) INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5) INTERNAL_PHY_SDS(26, 5)
}; };
target/linux/realtek/dts/rtl8380_panasonic_m8eg-pn28080k.dts
+10 -17
View File
@@ -74,24 +74,17 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(8) INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY(9)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY_SDS(24, 4)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
+1 -1
View File
@@ -52,7 +52,7 @@
status = "okay"; status = "okay";
}; };
&mdio { &mdio_bus0 {
INTERNAL_PHY_SDS(24, 4) INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5) INTERNAL_PHY_SDS(26, 5)
}; };
target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+9 -16
View File
@@ -87,22 +87,15 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(8) INTERNAL_PHY(14)
INTERNAL_PHY(9) INTERNAL_PHY(15)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts
+9 -16
View File
@@ -96,22 +96,15 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(8) INTERNAL_PHY(14)
INTERNAL_PHY(9) INTERNAL_PHY(15)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts
+21 -28
View File
@@ -199,36 +199,29 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
regmap = <&ethernet0>; EXTERNAL_PHY(2)
#address-cells = <1>; EXTERNAL_PHY(3)
#size-cells = <0>; EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) INTERNAL_PHY(8)
EXTERNAL_PHY(1) INTERNAL_PHY(9)
EXTERNAL_PHY(2) INTERNAL_PHY(10)
EXTERNAL_PHY(3) INTERNAL_PHY(11)
EXTERNAL_PHY(4) INTERNAL_PHY(12)
EXTERNAL_PHY(5) INTERNAL_PHY(13)
EXTERNAL_PHY(6) INTERNAL_PHY(14)
EXTERNAL_PHY(7) INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_SFP_PHY_FULL(24, 0)
INTERNAL_PHY(9) EXTERNAL_SFP_PHY_FULL(25, 1)
INTERNAL_PHY(10) EXTERNAL_SFP_PHY_FULL(26, 2)
INTERNAL_PHY(11) EXTERNAL_SFP_PHY_FULL(27, 3)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
EXTERNAL_SFP_PHY_FULL(24, 0)
EXTERNAL_SFP_PHY_FULL(25, 1)
EXTERNAL_SFP_PHY_FULL(26, 2)
EXTERNAL_SFP_PHY_FULL(27, 3)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
+11 -18
View File
@@ -74,25 +74,18 @@
status = "okay"; status = "okay";
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(8) INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY(9) INTERNAL_PHY_SDS(26, 5)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_d-link_dgs-1210-16.dts
+21 -28
View File
@@ -9,36 +9,29 @@
model = "D-Link DGS-1210-16"; model = "D-Link DGS-1210-16";
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
regmap = <&ethernet0>; EXTERNAL_PHY(2)
#address-cells = <1>; EXTERNAL_PHY(3)
#size-cells = <0>; EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) INTERNAL_PHY(8)
EXTERNAL_PHY(1) INTERNAL_PHY(9)
EXTERNAL_PHY(2) INTERNAL_PHY(10)
EXTERNAL_PHY(3) INTERNAL_PHY(11)
EXTERNAL_PHY(4) INTERNAL_PHY(12)
EXTERNAL_PHY(5) INTERNAL_PHY(13)
EXTERNAL_PHY(6) INTERNAL_PHY(14)
EXTERNAL_PHY(7) INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_SFP_PHY(24)
INTERNAL_PHY(9) EXTERNAL_SFP_PHY(25)
INTERNAL_PHY(10) EXTERNAL_SFP_PHY(26)
INTERNAL_PHY(11) EXTERNAL_SFP_PHY(27)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
EXTERNAL_SFP_PHY(24)
EXTERNAL_SFP_PHY(25)
EXTERNAL_SFP_PHY(26)
EXTERNAL_SFP_PHY(27)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_d-link_dgs-1210-20.dts
+21 -28
View File
@@ -9,36 +9,29 @@
model = "D-Link DGS-1210-20"; model = "D-Link DGS-1210-20";
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
regmap = <&ethernet0>; EXTERNAL_PHY(2)
#address-cells = <1>; EXTERNAL_PHY(3)
#size-cells = <0>; EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) INTERNAL_PHY(8)
EXTERNAL_PHY(1) INTERNAL_PHY(9)
EXTERNAL_PHY(2) INTERNAL_PHY(10)
EXTERNAL_PHY(3) INTERNAL_PHY(11)
EXTERNAL_PHY(4) INTERNAL_PHY(12)
EXTERNAL_PHY(5) INTERNAL_PHY(13)
EXTERNAL_PHY(6) INTERNAL_PHY(14)
EXTERNAL_PHY(7) INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_SFP_PHY(24)
INTERNAL_PHY(9) EXTERNAL_SFP_PHY(25)
INTERNAL_PHY(10) EXTERNAL_SFP_PHY(26)
INTERNAL_PHY(11) EXTERNAL_SFP_PHY(27)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
EXTERNAL_SFP_PHY(24)
EXTERNAL_SFP_PHY(25)
EXTERNAL_SFP_PHY(26)
EXTERNAL_SFP_PHY(27)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_d-link_dgs-1210-26.dts
+27 -34
View File
@@ -45,43 +45,36 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
regmap = <&ethernet0>; EXTERNAL_PHY(2)
#address-cells = <1>; EXTERNAL_PHY(3)
#size-cells = <0>; EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) INTERNAL_PHY(8)
EXTERNAL_PHY(1) INTERNAL_PHY(9)
EXTERNAL_PHY(2) INTERNAL_PHY(10)
EXTERNAL_PHY(3) INTERNAL_PHY(11)
EXTERNAL_PHY(4) INTERNAL_PHY(12)
EXTERNAL_PHY(5) INTERNAL_PHY(13)
EXTERNAL_PHY(6) INTERNAL_PHY(14)
EXTERNAL_PHY(7) INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_PHY(16)
INTERNAL_PHY(9) EXTERNAL_PHY(17)
INTERNAL_PHY(10) EXTERNAL_PHY(18)
INTERNAL_PHY(11) EXTERNAL_PHY(19)
INTERNAL_PHY(12) EXTERNAL_PHY(20)
INTERNAL_PHY(13) EXTERNAL_PHY(21)
INTERNAL_PHY(14) EXTERNAL_PHY(22)
INTERNAL_PHY(15) EXTERNAL_PHY(23)
EXTERNAL_PHY(16) INTERNAL_PHY_SDS(24, 4)
EXTERNAL_PHY(17) INTERNAL_PHY_SDS(26, 5)
EXTERNAL_PHY(18)
EXTERNAL_PHY(19)
EXTERNAL_PHY(20)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_d-link_dgs-1210-28_common.dtsi
+30 -37
View File
@@ -1,45 +1,38 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
regmap = <&ethernet0>; EXTERNAL_PHY(2)
#address-cells = <1>; EXTERNAL_PHY(3)
#size-cells = <0>; EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) INTERNAL_PHY(8)
EXTERNAL_PHY(1) INTERNAL_PHY(9)
EXTERNAL_PHY(2) INTERNAL_PHY(10)
EXTERNAL_PHY(3) INTERNAL_PHY(11)
EXTERNAL_PHY(4) INTERNAL_PHY(12)
EXTERNAL_PHY(5) INTERNAL_PHY(13)
EXTERNAL_PHY(6) INTERNAL_PHY(14)
EXTERNAL_PHY(7) INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_PHY(16)
INTERNAL_PHY(9) EXTERNAL_PHY(17)
INTERNAL_PHY(10) EXTERNAL_PHY(18)
INTERNAL_PHY(11) EXTERNAL_PHY(19)
INTERNAL_PHY(12) EXTERNAL_PHY(20)
INTERNAL_PHY(13) EXTERNAL_PHY(21)
INTERNAL_PHY(14) EXTERNAL_PHY(22)
INTERNAL_PHY(15) EXTERNAL_PHY(23)
EXTERNAL_PHY(16) /* External phy RTL8214FC */
EXTERNAL_PHY(17) EXTERNAL_SFP_PHY_FULL(24, 0)
EXTERNAL_PHY(18) EXTERNAL_SFP_PHY_FULL(25, 1)
EXTERNAL_PHY(19) EXTERNAL_SFP_PHY_FULL(26, 2)
EXTERNAL_PHY(20) EXTERNAL_SFP_PHY_FULL(27, 3)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
/* External phy RTL8214FC */
EXTERNAL_SFP_PHY_FULL(24, 0)
EXTERNAL_SFP_PHY_FULL(25, 1)
EXTERNAL_SFP_PHY_FULL(26, 2)
EXTERNAL_SFP_PHY_FULL(27, 3)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_hpe_1920-24g.dtsi
+1 -1
View File
@@ -7,7 +7,7 @@
model = "HPE 1920-24G (JG924A)"; model = "HPE 1920-24G (JG924A)";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(0) EXTERNAL_PHY(0)
EXTERNAL_PHY(1) EXTERNAL_PHY(1)
EXTERNAL_PHY(2) EXTERNAL_PHY(2)
target/linux/realtek/dts/rtl8382_hpe_1920.dtsi
+21 -28
View File
@@ -96,34 +96,27 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_PHY(16)
INTERNAL_PHY(9) EXTERNAL_PHY(17)
INTERNAL_PHY(10) EXTERNAL_PHY(18)
INTERNAL_PHY(11) EXTERNAL_PHY(19)
INTERNAL_PHY(12) EXTERNAL_PHY(20)
INTERNAL_PHY(13) EXTERNAL_PHY(21)
INTERNAL_PHY(14) EXTERNAL_PHY(22)
INTERNAL_PHY(15) EXTERNAL_PHY(23)
EXTERNAL_PHY(16) EXTERNAL_SFP_PHY_FULL(24, 0)
EXTERNAL_PHY(17) EXTERNAL_SFP_PHY_FULL(25, 1)
EXTERNAL_PHY(18) EXTERNAL_SFP_PHY_FULL(26, 2)
EXTERNAL_PHY(19) EXTERNAL_SFP_PHY_FULL(27, 3)
EXTERNAL_PHY(20)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
EXTERNAL_SFP_PHY_FULL(24, 0)
EXTERNAL_SFP_PHY_FULL(25, 1)
EXTERNAL_SFP_PHY_FULL(26, 2)
EXTERNAL_SFP_PHY_FULL(27, 3)
};
}; };
target/linux/realtek/dts/rtl8382_inaba_aml2-17gp.dts
+18 -25
View File
@@ -85,33 +85,26 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
regmap = <&ethernet0>; INTERNAL_PHY(10)
#address-cells = <1>; INTERNAL_PHY(11)
#size-cells = <0>; INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_PHY(16)
INTERNAL_PHY(9) EXTERNAL_PHY(17)
INTERNAL_PHY(10) EXTERNAL_PHY(18)
INTERNAL_PHY(11) EXTERNAL_PHY(19)
INTERNAL_PHY(12) EXTERNAL_PHY(20)
INTERNAL_PHY(13) EXTERNAL_PHY(21)
INTERNAL_PHY(14) EXTERNAL_PHY(22)
INTERNAL_PHY(15) EXTERNAL_PHY(23)
EXTERNAL_PHY(16) EXTERNAL_PHY(24)
EXTERNAL_PHY(17)
EXTERNAL_PHY(18)
EXTERNAL_PHY(19)
EXTERNAL_PHY(20)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
EXTERNAL_PHY(24)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts
+25 -32
View File
@@ -121,40 +121,33 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
regmap = <&ethernet0>; EXTERNAL_PHY(2)
#address-cells = <1>; EXTERNAL_PHY(3)
#size-cells = <0>; EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) INTERNAL_PHY(8)
EXTERNAL_PHY(1) INTERNAL_PHY(9)
EXTERNAL_PHY(2) INTERNAL_PHY(10)
EXTERNAL_PHY(3) INTERNAL_PHY(11)
EXTERNAL_PHY(4) INTERNAL_PHY(12)
EXTERNAL_PHY(5) INTERNAL_PHY(13)
EXTERNAL_PHY(6) INTERNAL_PHY(14)
EXTERNAL_PHY(7) INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_PHY(16)
INTERNAL_PHY(9) EXTERNAL_PHY(17)
INTERNAL_PHY(10) EXTERNAL_PHY(18)
INTERNAL_PHY(11) EXTERNAL_PHY(19)
INTERNAL_PHY(12) EXTERNAL_PHY(20)
INTERNAL_PHY(13) EXTERNAL_PHY(21)
INTERNAL_PHY(14) EXTERNAL_PHY(22)
INTERNAL_PHY(15) EXTERNAL_PHY(23)
EXTERNAL_PHY(16)
EXTERNAL_PHY(17)
EXTERNAL_PHY(18)
EXTERNAL_PHY(19)
EXTERNAL_PHY(20)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_panasonic_m16eg-pn28160k.dts
+18 -24
View File
@@ -105,31 +105,25 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio-bus { INTERNAL_PHY(8)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY(9)
#address-cells = <1>; INTERNAL_PHY(10)
#size-cells = <0>; INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(8) /* RTL8218FB */
INTERNAL_PHY(9) EXTERNAL_PHY(16)
INTERNAL_PHY(10) EXTERNAL_PHY(17)
INTERNAL_PHY(11) EXTERNAL_PHY(18)
INTERNAL_PHY(12) EXTERNAL_PHY(19)
INTERNAL_PHY(13) EXTERNAL_PHY(20)
INTERNAL_PHY(14) EXTERNAL_PHY(21)
INTERNAL_PHY(15) EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
/* RTL8218FB */
EXTERNAL_PHY(16)
EXTERNAL_PHY(17)
EXTERNAL_PHY(18)
EXTERNAL_PHY(19)
EXTERNAL_PHY(20)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_panasonic_m24eg-pn28240k.dts
+26 -32
View File
@@ -106,40 +106,34 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
#address-cells = <1>; EXTERNAL_PHY(2)
#size-cells = <0>; EXTERNAL_PHY(3)
EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) INTERNAL_PHY(8)
EXTERNAL_PHY(1) INTERNAL_PHY(9)
EXTERNAL_PHY(2) INTERNAL_PHY(10)
EXTERNAL_PHY(3) INTERNAL_PHY(11)
EXTERNAL_PHY(4) INTERNAL_PHY(12)
EXTERNAL_PHY(5) INTERNAL_PHY(13)
EXTERNAL_PHY(6) INTERNAL_PHY(14)
EXTERNAL_PHY(7) INTERNAL_PHY(15)
INTERNAL_PHY(8) /* RTL8218FB */
INTERNAL_PHY(9) EXTERNAL_PHY(16)
INTERNAL_PHY(10) EXTERNAL_PHY(17)
INTERNAL_PHY(11) EXTERNAL_PHY(18)
INTERNAL_PHY(12) EXTERNAL_PHY(19)
INTERNAL_PHY(13) EXTERNAL_PHY(20)
INTERNAL_PHY(14) EXTERNAL_PHY(21)
INTERNAL_PHY(15) EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
/* RTL8218FB */
EXTERNAL_PHY(16)
EXTERNAL_PHY(17)
EXTERNAL_PHY(18)
EXTERNAL_PHY(19)
EXTERNAL_PHY(20)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_tplink_t1600g-28ts-v3.dts
+26 -31
View File
@@ -92,40 +92,35 @@
&ethernet0 { &ethernet0 {
nvmem-cells = <&factory_macaddr>; nvmem-cells = <&factory_macaddr>;
nvmem-cell-names = "mac-address"; nvmem-cell-names = "mac-address";
};
mdio-bus { &mdio_bus0 {
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(0)
regmap = <&ethernet0>; EXTERNAL_PHY(1)
#address-cells = <1>; EXTERNAL_PHY(2)
#size-cells = <0>; EXTERNAL_PHY(3)
EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) INTERNAL_PHY(8)
EXTERNAL_PHY(1) INTERNAL_PHY(9)
EXTERNAL_PHY(2) INTERNAL_PHY(10)
EXTERNAL_PHY(3) INTERNAL_PHY(11)
EXTERNAL_PHY(4) INTERNAL_PHY(12)
EXTERNAL_PHY(5) INTERNAL_PHY(13)
EXTERNAL_PHY(6) INTERNAL_PHY(14)
EXTERNAL_PHY(7) INTERNAL_PHY(15)
INTERNAL_PHY(8) EXTERNAL_PHY(16)
INTERNAL_PHY(9) EXTERNAL_PHY(17)
INTERNAL_PHY(10) EXTERNAL_PHY(18)
INTERNAL_PHY(11) EXTERNAL_PHY(19)
INTERNAL_PHY(12) EXTERNAL_PHY(20)
INTERNAL_PHY(13) EXTERNAL_PHY(21)
INTERNAL_PHY(14) EXTERNAL_PHY(22)
INTERNAL_PHY(15) EXTERNAL_PHY(23)
EXTERNAL_PHY(16)
EXTERNAL_PHY(17)
EXTERNAL_PHY(18)
EXTERNAL_PHY(19)
EXTERNAL_PHY(20)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
+1 -1
View File
@@ -8,7 +8,7 @@
model = "Zyxel GS1900-16"; model = "Zyxel GS1900-16";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(16) EXTERNAL_PHY(16)
EXTERNAL_PHY(17) EXTERNAL_PHY(17)
EXTERNAL_PHY(18) EXTERNAL_PHY(18)
target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
+1 -1
View File
@@ -54,7 +54,7 @@
status = "okay"; status = "okay";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(0) EXTERNAL_PHY(0)
EXTERNAL_PHY(1) EXTERNAL_PHY(1)
EXTERNAL_PHY(2) EXTERNAL_PHY(2)
target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
+1 -1
View File
@@ -8,7 +8,7 @@
model = "Zyxel GS1900-24E"; model = "Zyxel GS1900-24E";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(0) EXTERNAL_PHY(0)
EXTERNAL_PHY(1) EXTERNAL_PHY(1)
EXTERNAL_PHY(2) EXTERNAL_PHY(2)
target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
+1 -1
View File
@@ -12,7 +12,7 @@
status = "okay"; status = "okay";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(0) EXTERNAL_PHY(0)
EXTERNAL_PHY(1) EXTERNAL_PHY(1)
EXTERNAL_PHY(2) EXTERNAL_PHY(2)
target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
+1 -1
View File
@@ -54,7 +54,7 @@
status = "okay"; status = "okay";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(0) EXTERNAL_PHY(0)
EXTERNAL_PHY(1) EXTERNAL_PHY(1)
EXTERNAL_PHY(2) EXTERNAL_PHY(2)
target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
+1 -1
View File
@@ -50,7 +50,7 @@
status = "okay"; status = "okay";
}; };
&mdio { &mdio_bus0 {
EXTERNAL_PHY(0) EXTERNAL_PHY(0)
EXTERNAL_PHY(1) EXTERNAL_PHY(1)
EXTERNAL_PHY(2) EXTERNAL_PHY(2)
target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
+60 -67
View File
@@ -10,79 +10,72 @@
model = "D-Link DGS-1210-52"; model = "D-Link DGS-1210-52";
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { /* External phy RTL8218B #1 */
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(0)
regmap = <&ethernet0>; EXTERNAL_PHY(1)
#address-cells = <1>; EXTERNAL_PHY(2)
#size-cells = <0>; EXTERNAL_PHY(3)
EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
/* External phy RTL8218B #1 */ /* External phy RTL8218B #2 */
EXTERNAL_PHY(0) EXTERNAL_PHY(8)
EXTERNAL_PHY(1) EXTERNAL_PHY(9)
EXTERNAL_PHY(2) EXTERNAL_PHY(10)
EXTERNAL_PHY(3) EXTERNAL_PHY(11)
EXTERNAL_PHY(4) EXTERNAL_PHY(12)
EXTERNAL_PHY(5) EXTERNAL_PHY(13)
EXTERNAL_PHY(6) EXTERNAL_PHY(14)
EXTERNAL_PHY(7) EXTERNAL_PHY(15)
/* External phy RTL8218B #2 */ /* External phy RTL8218B #3 */
EXTERNAL_PHY(8) EXTERNAL_PHY(16)
EXTERNAL_PHY(9) EXTERNAL_PHY(17)
EXTERNAL_PHY(10) EXTERNAL_PHY(18)
EXTERNAL_PHY(11) EXTERNAL_PHY(19)
EXTERNAL_PHY(12) EXTERNAL_PHY(20)
EXTERNAL_PHY(13) EXTERNAL_PHY(21)
EXTERNAL_PHY(14) EXTERNAL_PHY(22)
EXTERNAL_PHY(15) EXTERNAL_PHY(23)
/* External phy RTL8218B #3 */ /* External phy RTL8218B #4 */
EXTERNAL_PHY(16) EXTERNAL_PHY(24)
EXTERNAL_PHY(17) EXTERNAL_PHY(25)
EXTERNAL_PHY(18) EXTERNAL_PHY(26)
EXTERNAL_PHY(19) EXTERNAL_PHY(27)
EXTERNAL_PHY(20) EXTERNAL_PHY(28)
EXTERNAL_PHY(21) EXTERNAL_PHY(29)
EXTERNAL_PHY(22) EXTERNAL_PHY(30)
EXTERNAL_PHY(23) EXTERNAL_PHY(31)
/* External phy RTL8218B #4 */ /* External phy RTL8218B #5 */
EXTERNAL_PHY(24) EXTERNAL_PHY(32)
EXTERNAL_PHY(25) EXTERNAL_PHY(33)
EXTERNAL_PHY(26) EXTERNAL_PHY(34)
EXTERNAL_PHY(27) EXTERNAL_PHY(35)
EXTERNAL_PHY(28) EXTERNAL_PHY(36)
EXTERNAL_PHY(29) EXTERNAL_PHY(37)
EXTERNAL_PHY(30) EXTERNAL_PHY(38)
EXTERNAL_PHY(31) EXTERNAL_PHY(39)
/* External phy RTL8218B #5 */ /* External phy RTL8218B #6 */
EXTERNAL_PHY(32) EXTERNAL_PHY(40)
EXTERNAL_PHY(33) EXTERNAL_PHY(41)
EXTERNAL_PHY(34) EXTERNAL_PHY(42)
EXTERNAL_PHY(35) EXTERNAL_PHY(43)
EXTERNAL_PHY(36) EXTERNAL_PHY(44)
EXTERNAL_PHY(37) EXTERNAL_PHY(45)
EXTERNAL_PHY(38) EXTERNAL_PHY(46)
EXTERNAL_PHY(39) EXTERNAL_PHY(47)
/* External phy RTL8218B #6 */ /* External phy RTL8214FC */
EXTERNAL_PHY(40) EXTERNAL_SFP_PHY_FULL(48, 0)
EXTERNAL_PHY(41) EXTERNAL_SFP_PHY_FULL(49, 1)
EXTERNAL_PHY(42) EXTERNAL_SFP_PHY_FULL(50, 2)
EXTERNAL_PHY(43) EXTERNAL_SFP_PHY_FULL(51, 3)
EXTERNAL_PHY(44)
EXTERNAL_PHY(45)
EXTERNAL_PHY(46)
EXTERNAL_PHY(47)
/* External phy RTL8214FC */
EXTERNAL_SFP_PHY_FULL(48, 0)
EXTERNAL_SFP_PHY_FULL(49, 1)
EXTERNAL_SFP_PHY_FULL(50, 2)
EXTERNAL_SFP_PHY_FULL(51, 3)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
+5 -8
View File
@@ -90,16 +90,13 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { EXTERNAL_SFP_PHY_FULL(48, 0)
EXTERNAL_SFP_PHY_FULL(48, 0) EXTERNAL_SFP_PHY_FULL(49, 1)
EXTERNAL_SFP_PHY_FULL(49, 1) EXTERNAL_SFP_PHY_FULL(50, 2)
EXTERNAL_SFP_PHY_FULL(50, 2) EXTERNAL_SFP_PHY_FULL(51, 3)
EXTERNAL_SFP_PHY_FULL(51, 3)
};
}; };
&switch0 { &switch0 {
ports { ports {
SWITCH_PORT(48, 49, qsgmii) SWITCH_PORT(48, 49, qsgmii)
target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
+5 -7
View File
@@ -80,13 +80,11 @@
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { EXTERNAL_SFP_PHY_FULL(48, 1)
EXTERNAL_SFP_PHY_FULL(48, 1) EXTERNAL_SFP_PHY_FULL(49, 3)
EXTERNAL_SFP_PHY_FULL(49, 3) EXTERNAL_SFP_PHY_FULL(50, 0)
EXTERNAL_SFP_PHY_FULL(50, 0) EXTERNAL_SFP_PHY_FULL(51, 2)
EXTERNAL_SFP_PHY_FULL(51, 2)
};
}; };
target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
+49 -56
View File
@@ -24,67 +24,60 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
regmap = <&ethernet0>; EXTERNAL_PHY(2)
#address-cells = <1>; EXTERNAL_PHY(3)
#size-cells = <0>; EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) EXTERNAL_PHY(8)
EXTERNAL_PHY(1) EXTERNAL_PHY(9)
EXTERNAL_PHY(2) EXTERNAL_PHY(10)
EXTERNAL_PHY(3) EXTERNAL_PHY(11)
EXTERNAL_PHY(4) EXTERNAL_PHY(12)
EXTERNAL_PHY(5) EXTERNAL_PHY(13)
EXTERNAL_PHY(6) EXTERNAL_PHY(14)
EXTERNAL_PHY(7) EXTERNAL_PHY(15)
EXTERNAL_PHY(8) EXTERNAL_PHY(16)
EXTERNAL_PHY(9) EXTERNAL_PHY(17)
EXTERNAL_PHY(10) EXTERNAL_PHY(18)
EXTERNAL_PHY(11) EXTERNAL_PHY(19)
EXTERNAL_PHY(12) EXTERNAL_PHY(20)
EXTERNAL_PHY(13) EXTERNAL_PHY(21)
EXTERNAL_PHY(14) EXTERNAL_PHY(22)
EXTERNAL_PHY(15) EXTERNAL_PHY(23)
EXTERNAL_PHY(16) EXTERNAL_PHY(24)
EXTERNAL_PHY(17) EXTERNAL_PHY(25)
EXTERNAL_PHY(18) EXTERNAL_PHY(26)
EXTERNAL_PHY(19) EXTERNAL_PHY(27)
EXTERNAL_PHY(20) EXTERNAL_PHY(28)
EXTERNAL_PHY(21) EXTERNAL_PHY(29)
EXTERNAL_PHY(22) EXTERNAL_PHY(30)
EXTERNAL_PHY(23) EXTERNAL_PHY(31)
EXTERNAL_PHY(24) EXTERNAL_PHY(32)
EXTERNAL_PHY(25) EXTERNAL_PHY(33)
EXTERNAL_PHY(26) EXTERNAL_PHY(34)
EXTERNAL_PHY(27) EXTERNAL_PHY(35)
EXTERNAL_PHY(28) EXTERNAL_PHY(36)
EXTERNAL_PHY(29) EXTERNAL_PHY(37)
EXTERNAL_PHY(30) EXTERNAL_PHY(38)
EXTERNAL_PHY(31) EXTERNAL_PHY(39)
EXTERNAL_PHY(32) EXTERNAL_PHY(40)
EXTERNAL_PHY(33) EXTERNAL_PHY(41)
EXTERNAL_PHY(34) EXTERNAL_PHY(42)
EXTERNAL_PHY(35) EXTERNAL_PHY(43)
EXTERNAL_PHY(36) EXTERNAL_PHY(44)
EXTERNAL_PHY(37) EXTERNAL_PHY(45)
EXTERNAL_PHY(38) EXTERNAL_PHY(46)
EXTERNAL_PHY(39) EXTERNAL_PHY(47)
EXTERNAL_PHY(40)
EXTERNAL_PHY(41)
EXTERNAL_PHY(42)
EXTERNAL_PHY(43)
EXTERNAL_PHY(44)
EXTERNAL_PHY(45)
EXTERNAL_PHY(46)
EXTERNAL_PHY(47)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
+60 -65
View File
@@ -102,78 +102,73 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { // Switch doesn't come back properly after a reset so don't.
compatible = "realtek,rtl838x-mdio"; // reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;
// Switch doesn't come back properly after a reset so don't.
// reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
/* External phy RTL8218B #1 */ /* External phy RTL8218B #1 */
EXTERNAL_PHY(0) EXTERNAL_PHY(0)
EXTERNAL_PHY(1) EXTERNAL_PHY(1)
EXTERNAL_PHY(2) EXTERNAL_PHY(2)
EXTERNAL_PHY(3) EXTERNAL_PHY(3)
EXTERNAL_PHY(4) EXTERNAL_PHY(4)
EXTERNAL_PHY(5) EXTERNAL_PHY(5)
EXTERNAL_PHY(6) EXTERNAL_PHY(6)
EXTERNAL_PHY(7) EXTERNAL_PHY(7)
/* External phy RTL8218B #2 */ /* External phy RTL8218B #2 */
EXTERNAL_PHY(8) EXTERNAL_PHY(8)
EXTERNAL_PHY(9) EXTERNAL_PHY(9)
EXTERNAL_PHY(10) EXTERNAL_PHY(10)
EXTERNAL_PHY(11) EXTERNAL_PHY(11)
EXTERNAL_PHY(12) EXTERNAL_PHY(12)
EXTERNAL_PHY(13) EXTERNAL_PHY(13)
EXTERNAL_PHY(14) EXTERNAL_PHY(14)
EXTERNAL_PHY(15) EXTERNAL_PHY(15)
/* External phy RTL8218B #3 */ /* External phy RTL8218B #3 */
EXTERNAL_PHY(16) EXTERNAL_PHY(16)
EXTERNAL_PHY(17) EXTERNAL_PHY(17)
EXTERNAL_PHY(18) EXTERNAL_PHY(18)
EXTERNAL_PHY(19) EXTERNAL_PHY(19)
EXTERNAL_PHY(20) EXTERNAL_PHY(20)
EXTERNAL_PHY(21) EXTERNAL_PHY(21)
EXTERNAL_PHY(22) EXTERNAL_PHY(22)
EXTERNAL_PHY(23) EXTERNAL_PHY(23)
/* External phy RTL8218B #4 */ /* External phy RTL8218B #4 */
EXTERNAL_PHY(24) EXTERNAL_PHY(24)
EXTERNAL_PHY(25) EXTERNAL_PHY(25)
EXTERNAL_PHY(26) EXTERNAL_PHY(26)
EXTERNAL_PHY(27) EXTERNAL_PHY(27)
EXTERNAL_PHY(28) EXTERNAL_PHY(28)
EXTERNAL_PHY(29) EXTERNAL_PHY(29)
EXTERNAL_PHY(30) EXTERNAL_PHY(30)
EXTERNAL_PHY(31) EXTERNAL_PHY(31)
/* External phy RTL8218B #5 */ /* External phy RTL8218B #5 */
EXTERNAL_PHY(32) EXTERNAL_PHY(32)
EXTERNAL_PHY(33) EXTERNAL_PHY(33)
EXTERNAL_PHY(34) EXTERNAL_PHY(34)
EXTERNAL_PHY(35) EXTERNAL_PHY(35)
EXTERNAL_PHY(36) EXTERNAL_PHY(36)
EXTERNAL_PHY(37) EXTERNAL_PHY(37)
EXTERNAL_PHY(38) EXTERNAL_PHY(38)
EXTERNAL_PHY(39) EXTERNAL_PHY(39)
/* External phy RTL8218B #6 */ /* External phy RTL8218B #6 */
EXTERNAL_PHY(40) EXTERNAL_PHY(40)
EXTERNAL_PHY(41) EXTERNAL_PHY(41)
EXTERNAL_PHY(42) EXTERNAL_PHY(42)
EXTERNAL_PHY(43) EXTERNAL_PHY(43)
EXTERNAL_PHY(44) EXTERNAL_PHY(44)
EXTERNAL_PHY(45) EXTERNAL_PHY(45)
EXTERNAL_PHY(46) EXTERNAL_PHY(46)
EXTERNAL_PHY(47) EXTERNAL_PHY(47)
/* RTL8393 Internal SerDes */ /* RTL8393 Internal SerDes */
INTERNAL_PHY(48) INTERNAL_PHY(48)
INTERNAL_PHY(49) INTERNAL_PHY(49)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
+50 -56
View File
@@ -242,67 +242,61 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio-bus { EXTERNAL_PHY(0)
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(1)
#address-cells = <1>; EXTERNAL_PHY(2)
#size-cells = <0>; EXTERNAL_PHY(3)
EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(0) EXTERNAL_PHY(8)
EXTERNAL_PHY(1) EXTERNAL_PHY(9)
EXTERNAL_PHY(2) EXTERNAL_PHY(10)
EXTERNAL_PHY(3) EXTERNAL_PHY(11)
EXTERNAL_PHY(4) EXTERNAL_PHY(12)
EXTERNAL_PHY(5) EXTERNAL_PHY(13)
EXTERNAL_PHY(6) EXTERNAL_PHY(14)
EXTERNAL_PHY(7) EXTERNAL_PHY(15)
EXTERNAL_PHY(8) EXTERNAL_PHY(16)
EXTERNAL_PHY(9) EXTERNAL_PHY(17)
EXTERNAL_PHY(10) EXTERNAL_PHY(18)
EXTERNAL_PHY(11) EXTERNAL_PHY(19)
EXTERNAL_PHY(12) EXTERNAL_PHY(20)
EXTERNAL_PHY(13) EXTERNAL_PHY(21)
EXTERNAL_PHY(14) EXTERNAL_PHY(22)
EXTERNAL_PHY(15) EXTERNAL_PHY(23)
EXTERNAL_PHY(16) EXTERNAL_PHY(24)
EXTERNAL_PHY(17) EXTERNAL_PHY(25)
EXTERNAL_PHY(18) EXTERNAL_PHY(26)
EXTERNAL_PHY(19) EXTERNAL_PHY(27)
EXTERNAL_PHY(20) EXTERNAL_PHY(28)
EXTERNAL_PHY(21) EXTERNAL_PHY(29)
EXTERNAL_PHY(22) EXTERNAL_PHY(30)
EXTERNAL_PHY(23) EXTERNAL_PHY(31)
EXTERNAL_PHY(24) EXTERNAL_PHY(32)
EXTERNAL_PHY(25) EXTERNAL_PHY(33)
EXTERNAL_PHY(26) EXTERNAL_PHY(34)
EXTERNAL_PHY(27) EXTERNAL_PHY(35)
EXTERNAL_PHY(28) EXTERNAL_PHY(36)
EXTERNAL_PHY(29) EXTERNAL_PHY(37)
EXTERNAL_PHY(30) EXTERNAL_PHY(38)
EXTERNAL_PHY(31) EXTERNAL_PHY(39)
EXTERNAL_PHY(32) /* RTL8218FB */
EXTERNAL_PHY(33) EXTERNAL_PHY(40)
EXTERNAL_PHY(34) EXTERNAL_PHY(41)
EXTERNAL_PHY(35) EXTERNAL_PHY(42)
EXTERNAL_PHY(36) EXTERNAL_PHY(43)
EXTERNAL_PHY(37) EXTERNAL_PHY(44)
EXTERNAL_PHY(38) EXTERNAL_PHY(45)
EXTERNAL_PHY(39) EXTERNAL_PHY(46)
EXTERNAL_PHY(47)
/* RTL8218FB */
EXTERNAL_PHY(40)
EXTERNAL_PHY(41)
EXTERNAL_PHY(42)
EXTERNAL_PHY(43)
EXTERNAL_PHY(44)
EXTERNAL_PHY(45)
EXTERNAL_PHY(46)
EXTERNAL_PHY(47)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
+58 -65
View File
@@ -144,77 +144,70 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { /* External phy RTL8218B #1 */
compatible = "realtek,rtl838x-mdio"; EXTERNAL_PHY(0)
regmap = <&ethernet0>; EXTERNAL_PHY(1)
#address-cells = <1>; EXTERNAL_PHY(2)
#size-cells = <0>; EXTERNAL_PHY(3)
EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
/* External phy RTL8218B #1 */ /* External phy RTL8218B #2 */
EXTERNAL_PHY(0) EXTERNAL_PHY(8)
EXTERNAL_PHY(1) EXTERNAL_PHY(9)
EXTERNAL_PHY(2) EXTERNAL_PHY(10)
EXTERNAL_PHY(3) EXTERNAL_PHY(11)
EXTERNAL_PHY(4) EXTERNAL_PHY(12)
EXTERNAL_PHY(5) EXTERNAL_PHY(13)
EXTERNAL_PHY(6) EXTERNAL_PHY(14)
EXTERNAL_PHY(7) EXTERNAL_PHY(15)
/* External phy RTL8218B #2 */ /* External phy RTL8218B #3 */
EXTERNAL_PHY(8) EXTERNAL_PHY(16)
EXTERNAL_PHY(9) EXTERNAL_PHY(17)
EXTERNAL_PHY(10) EXTERNAL_PHY(18)
EXTERNAL_PHY(11) EXTERNAL_PHY(19)
EXTERNAL_PHY(12) EXTERNAL_PHY(20)
EXTERNAL_PHY(13) EXTERNAL_PHY(21)
EXTERNAL_PHY(14) EXTERNAL_PHY(22)
EXTERNAL_PHY(15) EXTERNAL_PHY(23)
/* External phy RTL8218B #3 */ /* External phy RTL8218B #4 */
EXTERNAL_PHY(16) EXTERNAL_PHY(24)
EXTERNAL_PHY(17) EXTERNAL_PHY(25)
EXTERNAL_PHY(18) EXTERNAL_PHY(26)
EXTERNAL_PHY(19) EXTERNAL_PHY(27)
EXTERNAL_PHY(20) EXTERNAL_PHY(28)
EXTERNAL_PHY(21) EXTERNAL_PHY(29)
EXTERNAL_PHY(22) EXTERNAL_PHY(30)
EXTERNAL_PHY(23) EXTERNAL_PHY(31)
/* External phy RTL8218B #4 */ /* External phy RTL8218B #5 */
EXTERNAL_PHY(24) EXTERNAL_PHY(32)
EXTERNAL_PHY(25) EXTERNAL_PHY(33)
EXTERNAL_PHY(26) EXTERNAL_PHY(34)
EXTERNAL_PHY(27) EXTERNAL_PHY(35)
EXTERNAL_PHY(28) EXTERNAL_PHY(36)
EXTERNAL_PHY(29) EXTERNAL_PHY(37)
EXTERNAL_PHY(30) EXTERNAL_PHY(38)
EXTERNAL_PHY(31) EXTERNAL_PHY(39)
/* External phy RTL8218B #5 */ /* External phy RTL8218B #6 */
EXTERNAL_PHY(32) EXTERNAL_PHY(40)
EXTERNAL_PHY(33) EXTERNAL_PHY(41)
EXTERNAL_PHY(34) EXTERNAL_PHY(42)
EXTERNAL_PHY(35) EXTERNAL_PHY(43)
EXTERNAL_PHY(36) EXTERNAL_PHY(44)
EXTERNAL_PHY(37) EXTERNAL_PHY(45)
EXTERNAL_PHY(38) EXTERNAL_PHY(46)
EXTERNAL_PHY(39) EXTERNAL_PHY(47)
/* External phy RTL8218B #6 */ /* RTL8393 Internal SerDes */
EXTERNAL_PHY(40) INTERNAL_PHY_SDS(48, 12)
EXTERNAL_PHY(41) INTERNAL_PHY_SDS(49, 13)
EXTERNAL_PHY(42)
EXTERNAL_PHY(43)
EXTERNAL_PHY(44)
EXTERNAL_PHY(45)
EXTERNAL_PHY(46)
EXTERNAL_PHY(47)
/* RTL8393 Internal SerDes */
INTERNAL_PHY_SDS(48, 12)
INTERNAL_PHY_SDS(49, 13)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi
+50 -55
View File
@@ -131,69 +131,64 @@
&ethernet0 { &ethernet0 {
nvmem-cells = <&macaddr_ubootenv_ethaddr 0>; nvmem-cells = <&macaddr_ubootenv_ethaddr 0>;
nvmem-cell-names = "mac-address"; nvmem-cell-names = "mac-address";
};
mdio: mdio-bus { &mdio_bus0 {
compatible = "realtek,rtl838x-mdio"; /* External RTL8224 PHY */
regmap = <&ethernet0>; phy0: ethernet-phy@0 {
#address-cells = <1>; reg = <0>;
#size-cells = <0>; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 0>;
sds = < 2 >;
};
/* External RTL8224 PHY */ phy1: ethernet-phy@1 {
phy0: ethernet-phy@0 { reg = <1>;
reg = <0>; compatible = "ethernet-phy-ieee802.3-c45";
compatible = "ethernet-phy-ieee802.3-c45"; rtl9300,smi-address = <0 1>;
rtl9300,smi-address = <0 0>; sds = < 2 >;
sds = < 2 >; };
};
phy1: ethernet-phy@1 { phy2: ethernet-phy@2 {
reg = <1>; reg = <2>;
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 1>; rtl9300,smi-address = <0 2>;
sds = < 2 >; sds = < 2 >;
}; };
phy2: ethernet-phy@2 { phy3: ethernet-phy@3 {
reg = <2>; reg = <3>;
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 2>; rtl9300,smi-address = <0 3>;
sds = < 2 >; sds = < 2 >;
}; };
phy3: ethernet-phy@3 { phy8: ethernet-phy@8 {
reg = <3>; reg = <8>;
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 3>; rtl9300,smi-address = <0 4>;
sds = < 2 >; sds = < 3 >;
}; };
phy8: ethernet-phy@8 { phy9: ethernet-phy@9 {
reg = <8>; reg = <9>;
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 4>; rtl9300,smi-address = <0 5>;
sds = < 3 >; sds = < 3 >;
}; };
phy9: ethernet-phy@9 { phy10: ethernet-phy@10 {
reg = <9>; reg = <10>;
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 5>; rtl9300,smi-address = <0 6>;
sds = < 3 >; sds = < 3 >;
}; };
phy10: ethernet-phy@10 { phy11: ethernet-phy@11 {
reg = <10>; reg = <11>;
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 6>; rtl9300,smi-address = <0 7>;
sds = < 3 >; sds = < 3 >;
};
phy11: ethernet-phy@11 {
reg = <11>;
compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 7>;
sds = < 3 >;
};
}; };
}; };
target/linux/realtek/dts/rtl9302_plasmacloud_psx10.dts
+1 -1
View File
@@ -35,7 +35,7 @@
}; };
}; };
&mdio { &mdio_bus0 {
INTERNAL_PHY_SDS(26, 8) INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9) INTERNAL_PHY_SDS(27, 9)
}; };
target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts
+1 -1
View File
@@ -8,7 +8,7 @@
model = "Zyxel XGS1210-12 A1 Switch"; model = "Zyxel XGS1210-12 A1 Switch";
}; };
&mdio { &mdio_bus0 {
phy24: ethernet-phy@24 { phy24: ethernet-phy@24 {
reg = <24>; reg = <24>;
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-common.dtsi
+47 -54
View File
@@ -146,61 +146,54 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { /* External RTL8218D PHY */
compatible = "realtek,rtl838x-mdio"; phy0: ethernet-phy@0 {
regmap = <&ethernet0>; reg = <0>;
#address-cells = <1>; compatible = "ethernet-phy-ieee802.3-c22";
#size-cells = <0>; rtl9300,smi-address = <0 0>;
sds = < 2 >;
/* External RTL8218D PHY */ // Disabled because we do not know how to bring up again
phy0: ethernet-phy@0 { // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 0>;
sds = < 2 >;
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
};
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 4>;
};
phy5: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 5>;
};
phy6: ethernet-phy@6 {
reg = <6>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 7>;
};
INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9)
}; };
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 4>;
};
phy5: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 5>;
};
phy6: ethernet-phy@6 {
reg = <6>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 7>;
};
INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9)
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12.dts
+77 -84
View File
@@ -220,91 +220,84 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { /* External RTL8218D PHY */
compatible = "realtek,rtl838x-mdio"; phy0: ethernet-phy@0 {
regmap = <&ethernet0>; reg = <0>;
#address-cells = <1>; compatible = "ethernet-phy-ieee802.3-c22";
#size-cells = <0>; rtl9300,smi-address = <0 0>;
sds = < 2 >;
/* External RTL8218D PHY */ // Disabled because we do not know how to bring up again
phy0: ethernet-phy@0 { // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 0>;
sds = < 2 >;
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
};
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 4>;
};
phy5: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 5>;
};
phy6: ethernet-phy@6 {
reg = <6>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 7>;
};
/* External Aquantia 113C PHYs */
phy24: ethernet-phy@24 {
reg = <24>;
compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <1 8>;
sds = < 6 >;
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
phy25: ethernet-phy@25 {
reg = <25>;
compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <2 8>;
sds = < 7 >;
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
phy26: ethernet-phy@26 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <3 8>;
sds = < 8 >;
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
INTERNAL_PHY_SDS(27, 9)
}; };
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 4>;
};
phy5: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 5>;
};
phy6: ethernet-phy@6 {
reg = <6>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 7>;
};
/* External Aquantia 113C PHYs */
phy24: ethernet-phy@24 {
reg = <24>;
compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <1 8>;
sds = < 6 >;
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
phy25: ethernet-phy@25 {
reg = <25>;
compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <2 8>;
sds = < 7 >;
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
phy26: ethernet-phy@26 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <3 8>;
sds = < 8 >;
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
INTERNAL_PHY_SDS(27, 9)
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts
+48 -55
View File
@@ -126,68 +126,61 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { phy0: ethernet-phy@0 {
compatible = "realtek,rtl838x-mdio"; compatible = "ethernet-phy-ieee802.3-c45";
regmap = <&ethernet0>; rtl9300,smi-address = <0 0>;
#address-cells = <1>; reg = <0>;
#size-cells = <0>; sds = <2>;
};
phy0: ethernet-phy@0 { phy8: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 0>; rtl9300,smi-address = <0 1>;
reg = <0>; reg = <8>;
sds = <2>; sds = <3>;
}; };
phy8: ethernet-phy@8 { phy16: ethernet-phy@16 {
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 1>; rtl9300,smi-address = <0 2>;
reg = <8>; reg = <16>;
sds = <3>; sds = <4>;
}; };
phy16: ethernet-phy@16 { phy20: ethernet-phy@20 {
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 2>; rtl9300,smi-address = <0 3>;
reg = <16>; reg = <20>;
sds = <4>; sds = <5>;
}; };
phy20: ethernet-phy@20 { phy24: ethernet-phy@24 {
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <0 3>; rtl9300,smi-address = <3 16>;
reg = <20>; reg = <24>;
sds = <5>; sds = <6>;
}; };
phy24: ethernet-phy@24 { phy25: ethernet-phy@25 {
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <3 16>; rtl9300,smi-address = <3 17>;
reg = <24>; reg = <25>;
sds = <6>; sds = <7>;
}; };
phy25: ethernet-phy@25 { phy26: ethernet-phy@26 {
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <3 17>; rtl9300,smi-address = <3 18>;
reg = <25>; reg = <26>;
sds = <7>; sds = <8>;
}; };
phy26: ethernet-phy@26 { phy27: ethernet-phy@27 {
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <3 18>; rtl9300,smi-address = <3 19>;
reg = <26>; reg = <27>;
sds = <8>; sds = <9>;
};
phy27: ethernet-phy@27 {
compatible = "ethernet-phy-ieee802.3-c45";
rtl9300,smi-address = <3 19>;
reg = <27>;
sds = <9>;
};
}; };
}; };
target/linux/realtek/dts/rtl9303_tplink_tl-st1008f-v2.dts
+9 -16
View File
@@ -232,22 +232,15 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY_SDS(0, 2)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY_SDS(8, 3)
regmap = <&ethernet0>; INTERNAL_PHY_SDS(16, 4)
#address-cells = <1>; INTERNAL_PHY_SDS(20, 5)
#size-cells = <0>; INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(0, 2) INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(8, 3) INTERNAL_PHY_SDS(27, 9)
INTERNAL_PHY_SDS(16, 4)
INTERNAL_PHY_SDS(20, 5)
INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl9303_vimin_vm-s100-0800ms.dts
+9 -16
View File
@@ -221,22 +221,15 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY_SDS(0, 2)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY_SDS(8, 3)
regmap = <&ethernet0>; INTERNAL_PHY_SDS(16, 4)
#address-cells = <1>; INTERNAL_PHY_SDS(20, 5)
#size-cells = <0>; INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(0, 2) INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(8, 3) INTERNAL_PHY_SDS(27, 9)
INTERNAL_PHY_SDS(16, 4)
INTERNAL_PHY_SDS(20, 5)
INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts
+9 -16
View File
@@ -243,22 +243,15 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY_SDS(0, 2)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY_SDS(8, 3)
regmap = <&ethernet0>; INTERNAL_PHY_SDS(16, 4)
#address-cells = <1>; INTERNAL_PHY_SDS(20, 5)
#size-cells = <0>; INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(0, 2) INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(8, 3) INTERNAL_PHY_SDS(27, 9)
INTERNAL_PHY_SDS(16, 4)
INTERNAL_PHY_SDS(20, 5)
INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/dts/rtl9303_xikestor_sks8310-8x.dts
+9 -16
View File
@@ -240,22 +240,15 @@
}; };
}; };
&ethernet0 { &mdio_bus0 {
mdio: mdio-bus { INTERNAL_PHY_SDS(0, 2)
compatible = "realtek,rtl838x-mdio"; INTERNAL_PHY_SDS(8, 3)
regmap = <&ethernet0>; INTERNAL_PHY_SDS(16, 4)
#address-cells = <1>; INTERNAL_PHY_SDS(20, 5)
#size-cells = <0>; INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(0, 2) INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(8, 3) INTERNAL_PHY_SDS(27, 9)
INTERNAL_PHY_SDS(16, 4)
INTERNAL_PHY_SDS(20, 5)
INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9)
};
}; };
&switch0 { &switch0 {
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
+2 -2
View File
@@ -274,9 +274,9 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
int ret; int ret;
u32 pn; u32 pn;
np = of_find_compatible_node(NULL, NULL, "realtek,rtl838x-eth"); np = of_find_compatible_node(NULL, NULL, "realtek,otto-mdio");
if (!np) { if (!np) {
dev_err(priv->dev, "ethernet node not found"); dev_err(priv->dev, "mdio controller node not found");
return -ENODEV; return -ENODEV;
} }
target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
+2 -6
View File
@@ -1397,7 +1397,7 @@ static int rtmdio_get_family(void)
static int rtmdio_probe(struct platform_device *pdev) static int rtmdio_probe(struct platform_device *pdev)
{ {
struct device_node *dn, *np, *mii_np; struct device_node *dn, *mii_np;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct rtmdio_bus_priv *priv; struct rtmdio_bus_priv *priv;
struct mii_bus *bus; struct mii_bus *bus;
@@ -1407,11 +1407,7 @@ static int rtmdio_probe(struct platform_device *pdev)
family = rtmdio_get_family(); family = rtmdio_get_family();
dev_info(dev, "probing RTL%04x family mdio bus\n", family); dev_info(dev, "probing RTL%04x family mdio bus\n", family);
np = of_find_compatible_node(NULL, NULL, "realtek,rtl838x-eth"); mii_np = of_get_child_by_name(dev->of_node, "mdio-bus");
if (!np)
return -ENODEV;
mii_np = of_get_child_by_name(np, "mdio-bus");
if (!mii_np) if (!mii_np)
return -ENODEV; return -ENODEV;