From 60a5f423b0a257ae76a9ca682e7092e2b0d962d3 Mon Sep 17 00:00:00 2001 From: Til Kaiser Date: Mon, 13 Apr 2026 10:50:56 +0200 Subject: [PATCH] ipq40xx: add gpio pin function patch Add a qcom pinctrl fix for ipq4019 that marks the gpio function as a GPIO pin function. With Linux 6.18 strict pinmuxing, ipq40xx can otherwise hit conflicts when pins muxed to "gpio" are later requested by GPIO consumers. [1] This patch fixes that at the driver level and avoids DTS-side workarounds, same as it is done for other Qualcomm boards. [2] [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=cc85cb96e2e4 [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=480dc1952404 Signed-off-by: Til Kaiser Link: https://github.com/openwrt/openwrt/pull/22930 Signed-off-by: Nick Hainke --- ...019-mark-gpio-as-a-GPIO-pin-function.patch | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 target/linux/ipq40xx/patches-6.18/708-pinctrl-qcom-ipq4019-mark-gpio-as-a-GPIO-pin-function.patch diff --git a/target/linux/ipq40xx/patches-6.18/708-pinctrl-qcom-ipq4019-mark-gpio-as-a-GPIO-pin-function.patch b/target/linux/ipq40xx/patches-6.18/708-pinctrl-qcom-ipq4019-mark-gpio-as-a-GPIO-pin-function.patch new file mode 100644 index 00000000000..762aa46ac22 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.18/708-pinctrl-qcom-ipq4019-mark-gpio-as-a-GPIO-pin-function.patch @@ -0,0 +1,51 @@ +From 437579ad9804055132ad40ccc1ba0cc64dbd828b Mon Sep 17 00:00:00 2001 +From: Til Kaiser +Date: Mon, 13 Apr 2026 10:29:20 +0200 +Subject: [PATCH] pinctrl: qcom: ipq4019: mark gpio as a GPIO pin function + +The qcom pinctrl core supports marking functions that represent GPIO mode +via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject +GPIO requests for pins that are muxed to the GPIO function. + +ipq4019 still describes its gpio function with QCA_PIN_FUNCTION(gpio), +so it is not treated as a GPIO pin function. As a result, GPIO consumers +can still conflict with pinctrl states that select the "gpio" function. + +Add a QCA_GPIO_PIN_FUNCTION() helper and use it for the ipq4019 gpio +function, matching how the msm-based qcom drivers handle this. + +This allows ipq4019 to keep the GPIO-related pin configuration in DTS +without tripping over strict pinmux ownership checks. + +Fixes: cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict") +Signed-off-by: Til Kaiser +--- + drivers/pinctrl/qcom/pinctrl-ipq4019.c | 2 +- + drivers/pinctrl/qcom/pinctrl-msm.h | 5 +++++ + 2 files changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c ++++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c +@@ -480,7 +480,7 @@ static const struct pinfunction ipq4019_ + QCA_PIN_FUNCTION(blsp_uart0), + QCA_PIN_FUNCTION(blsp_uart1), + QCA_PIN_FUNCTION(chip_rst), +- QCA_PIN_FUNCTION(gpio), ++ QCA_GPIO_PIN_FUNCTION(gpio), + QCA_PIN_FUNCTION(i2s_rx), + QCA_PIN_FUNCTION(i2s_spdif_in), + QCA_PIN_FUNCTION(i2s_spdif_out), +--- a/drivers/pinctrl/qcom/pinctrl-msm.h ++++ b/drivers/pinctrl/qcom/pinctrl-msm.h +@@ -39,6 +39,11 @@ struct pinctrl_pin_desc; + fname##_groups, \ + ARRAY_SIZE(fname##_groups)) + ++#define QCA_GPIO_PIN_FUNCTION(fname) \ ++ [qca_mux_##fname] = PINCTRL_GPIO_PINFUNCTION(#fname, \ ++ fname##_groups, \ ++ ARRAY_SIZE(fname##_groups)) ++ + /** + * struct msm_pingroup - Qualcomm pingroup definition + * @grp: Generic data of the pin group (name and pins)