From 6727587d2439cca176aa948392ba34f04515f3d4 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 22 Sep 2026 14:47:45 +0200 Subject: [PATCH] microchipsw: use latest MMC patches Use the latest version of MMC patches pending upstream. Signed-off-by: Robert Marko --- ...1-disable-selectively-clocks-on-pm-r.patch | 138 ++++++++++++++++++ ...ts-microchip-lan969x-add-SDMMC-nodes.patch | 45 ------ ...tmel-sama5d2-sdhci-add-LAN969x-comp.patch} | 9 +- ...mc-sdhci-of-at91-add-LAN969x-support.patch | 38 +++++ ...ts-microchip-lan969x-add-SDMMC-nodes.patch | 62 ++++++++ ...-dts-microchip-ev23x71a-enable-QSPI.patch} | 12 +- ...-dts-microchip-ev23x71a-enable-eMMC.patch} | 16 +- 7 files changed, 258 insertions(+), 62 deletions(-) create mode 100644 target/linux/microchipsw/patches-6.18/100-mmc-sdhci-of-at91-disable-selectively-clocks-on-pm-r.patch delete mode 100644 target/linux/microchipsw/patches-6.18/101-arm64-dts-microchip-lan969x-add-SDMMC-nodes.patch rename target/linux/microchipsw/patches-6.18/{100-dt-bindings-mmc-atmel-sama5d2-sdhci-add-LAN969x-comp.patch => 101-dt-bindings-mmc-atmel-sama5d2-sdhci-add-LAN969x-comp.patch} (68%) create mode 100644 target/linux/microchipsw/patches-6.18/102-mmc-sdhci-of-at91-add-LAN969x-support.patch create mode 100644 target/linux/microchipsw/patches-6.18/103-arm64-dts-microchip-lan969x-add-SDMMC-nodes.patch rename target/linux/microchipsw/patches-6.18/{102-arm64-dts-microchip-ev23x71a-enable-QSPI.patch => 104-arm64-dts-microchip-ev23x71a-enable-QSPI.patch} (66%) rename target/linux/microchipsw/patches-6.18/{103-arm64-dts-microchip-ev23x71a-enable-eMMC.patch => 105-arm64-dts-microchip-ev23x71a-enable-eMMC.patch} (52%) diff --git a/target/linux/microchipsw/patches-6.18/100-mmc-sdhci-of-at91-disable-selectively-clocks-on-pm-r.patch b/target/linux/microchipsw/patches-6.18/100-mmc-sdhci-of-at91-disable-selectively-clocks-on-pm-r.patch new file mode 100644 index 00000000000..b5949aeae9f --- /dev/null +++ b/target/linux/microchipsw/patches-6.18/100-mmc-sdhci-of-at91-disable-selectively-clocks-on-pm-r.patch @@ -0,0 +1,138 @@ +From 51cb94182e75c5a485feb7fc5ca788b434a99bc8 Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea +Date: Fri, 18 Sep 2026 17:34:14 +0200 +Subject: [PATCH 100/105] mmc: sdhci-of-at91: disable selectively clocks on pm + runtime + +SAMA7G5's SDMMC run-time clock disabling is not supported. +Add support to avoid this scenario for SAMA7G5. + +[Amended with a fix from Romain Sioen below this line] + +Sama7 boards are impacted by an unbalanced prepare/unprepare +and enable/disable clock management in sdhci driver due to +the lack of support for SDMMC clock runtime disabling, +managed instead by the PMC driver. + +Add conditions in the preset function to manage clock +depending on if the board support runtime clock disabling +and if we come from the probing or restoring procedure. + +Add boolean start_clks variable to manage condition +in preset function. + +Signed-off-by: Claudiu Beznea +Co-developed-by: Romain Sioen +Signed-off-by: Romain Sioen +Signed-off-by: Aubin Constans +--- + drivers/mmc/host/sdhci-of-at91.c | 36 ++++++++++++++++++++++++-------- + 1 file changed, 27 insertions(+), 9 deletions(-) + +--- a/drivers/mmc/host/sdhci-of-at91.c ++++ b/drivers/mmc/host/sdhci-of-at91.c +@@ -39,6 +39,7 @@ struct sdhci_at91_soc_data { + const struct sdhci_pltfm_data *pdata; + bool baseclk_is_generated_internally; + unsigned int divider_for_baseclk; ++ bool pm_runtime_disable_clks; + }; + + struct sdhci_at91_priv { +@@ -149,12 +150,14 @@ static const struct sdhci_pltfm_data sdh + static const struct sdhci_at91_soc_data soc_data_sama5d2 = { + .pdata = &sdhci_sama5d2_pdata, + .baseclk_is_generated_internally = false, ++ .pm_runtime_disable_clks = true, + }; + + static const struct sdhci_at91_soc_data soc_data_sam9x60 = { + .pdata = &sdhci_sama5d2_pdata, + .baseclk_is_generated_internally = true, + .divider_for_baseclk = 2, ++ .pm_runtime_disable_clks = true, + }; + + static const struct of_device_id sdhci_at91_dt_match[] = { +@@ -164,7 +167,7 @@ static const struct of_device_id sdhci_a + }; + MODULE_DEVICE_TABLE(of, sdhci_at91_dt_match); + +-static int sdhci_at91_set_clks_presets(struct device *dev) ++static int sdhci_at91_set_clks_presets(struct device *dev, bool start_clks) + { + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); +@@ -174,7 +177,14 @@ static int sdhci_at91_set_clks_presets(s + unsigned int gck_rate, clk_base_rate; + unsigned int preset_div; + +- clk_prepare_enable(priv->hclock); ++ /* ++ * Manage clock prepare/enable procedure depending on if the board ++ * support runtime clock disabling and if we come from the probing ++ * or restoring procedure (for backup+self refresh). ++ */ ++ if (start_clks) ++ clk_prepare_enable(priv->hclock); ++ + caps0 = readl(host->ioaddr + SDHCI_CAPABILITIES); + caps1 = readl(host->ioaddr + SDHCI_CAPABILITIES_1); + +@@ -223,8 +233,11 @@ static int sdhci_at91_set_clks_presets(s + writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div, + host->ioaddr + SDHCI_PRESET_FOR_DDR50); + +- clk_prepare_enable(priv->mainck); +- clk_prepare_enable(priv->gck); ++ /* Same clock management as for hclock */ ++ if (start_clks) { ++ clk_prepare_enable(priv->mainck); ++ clk_prepare_enable(priv->gck); ++ } + + return 0; + } +@@ -254,9 +267,11 @@ static int sdhci_at91_runtime_suspend(st + if (host->tuning_mode != SDHCI_TUNING_MODE_3) + mmc_retune_needed(host->mmc); + +- clk_disable_unprepare(priv->gck); +- clk_disable_unprepare(priv->hclock); +- clk_disable_unprepare(priv->mainck); ++ if (priv->soc_data->pm_runtime_disable_clks) { ++ clk_disable_unprepare(priv->gck); ++ clk_disable_unprepare(priv->hclock); ++ clk_disable_unprepare(priv->mainck); ++ } + + return 0; + } +@@ -269,7 +284,7 @@ static int sdhci_at91_runtime_resume(str + int ret; + + if (priv->restore_needed) { +- ret = sdhci_at91_set_clks_presets(dev); ++ ret = sdhci_at91_set_clks_presets(dev, priv->soc_data->pm_runtime_disable_clks); + if (ret) + return ret; + +@@ -277,6 +292,9 @@ static int sdhci_at91_runtime_resume(str + goto out; + } + ++ if (!priv->soc_data->pm_runtime_disable_clks) ++ goto out; ++ + ret = clk_prepare_enable(priv->mainck); + if (ret) { + dev_err(dev, "can't enable mainck\n"); +@@ -344,7 +362,7 @@ static int sdhci_at91_probe(struct platf + return dev_err_probe(&pdev->dev, PTR_ERR(priv->gck), + "failed to get multclk\n"); + +- ret = sdhci_at91_set_clks_presets(&pdev->dev); ++ ret = sdhci_at91_set_clks_presets(&pdev->dev, true); + if (ret) + return ret; + diff --git a/target/linux/microchipsw/patches-6.18/101-arm64-dts-microchip-lan969x-add-SDMMC-nodes.patch b/target/linux/microchipsw/patches-6.18/101-arm64-dts-microchip-lan969x-add-SDMMC-nodes.patch deleted file mode 100644 index 93d8b33f961..00000000000 --- a/target/linux/microchipsw/patches-6.18/101-arm64-dts-microchip-lan969x-add-SDMMC-nodes.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 9c914a7c639a96f52b0bc197db0805fe10d53082 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Thu, 25 Sep 2025 22:26:58 +0200 -Subject: [PATCH 101/101] arm64: dts: microchip: lan969x: add SDMMC nodes - -Add nodes for both SDMMC controllers. - -Signed-off-by: Robert Marko ---- - arch/arm64/boot/dts/microchip/lan9691.dtsi | 24 ++++++++++++++++++++++ - 1 file changed, 24 insertions(+) - ---- a/arch/arm64/boot/dts/microchip/lan9691.dtsi -+++ b/arch/arm64/boot/dts/microchip/lan9691.dtsi -@@ -414,6 +414,30 @@ - status = "disabled"; - }; - -+ sdmmc0: mmc@e0830000 { -+ compatible = "microchip,lan9691-sdhci", -+ "microchip,sam9x60-sdhci"; -+ reg = <0xe0830000 0x00000300>; -+ interrupts = ; -+ clocks = <&clks GCK_ID_SDMMC0>, <&clks GCK_ID_SDMMC0>; -+ clock-names = "hclock", "multclk"; -+ assigned-clocks = <&clks GCK_ID_SDMMC0>; -+ assigned-clock-rates = <100000000>; -+ status = "disabled"; -+ }; -+ -+ sdmmc1: mmc@e0838000 { -+ compatible = "microchip,lan9691-sdhci", -+ "microchip,sam9x60-sdhci"; -+ reg = <0xe0838000 0x00000300>; -+ interrupts = ; -+ clocks = <&clks GCK_ID_SDMMC1>, <&clks GCK_ID_SDMMC1>; -+ clock-names = "hclock", "multclk"; -+ assigned-clocks = <&clks GCK_ID_SDMMC1>; -+ assigned-clock-rates = <45000000>; -+ status = "disabled"; -+ }; -+ - qspi2: spi@e0834000 { - compatible = "microchip,lan9691-qspi"; - reg = <0xe0834000 0x00000100>, diff --git a/target/linux/microchipsw/patches-6.18/100-dt-bindings-mmc-atmel-sama5d2-sdhci-add-LAN969x-comp.patch b/target/linux/microchipsw/patches-6.18/101-dt-bindings-mmc-atmel-sama5d2-sdhci-add-LAN969x-comp.patch similarity index 68% rename from target/linux/microchipsw/patches-6.18/100-dt-bindings-mmc-atmel-sama5d2-sdhci-add-LAN969x-comp.patch rename to target/linux/microchipsw/patches-6.18/101-dt-bindings-mmc-atmel-sama5d2-sdhci-add-LAN969x-comp.patch index 1e510ce9ddf..b6a6f0e396b 100644 --- a/target/linux/microchipsw/patches-6.18/100-dt-bindings-mmc-atmel-sama5d2-sdhci-add-LAN969x-comp.patch +++ b/target/linux/microchipsw/patches-6.18/101-dt-bindings-mmc-atmel-sama5d2-sdhci-add-LAN969x-comp.patch @@ -1,14 +1,15 @@ -From 4c5674bb953dbc3f1c5230a97fd1658d2ab34a3e Mon Sep 17 00:00:00 2001 +From 86e2fccea97d0c57e005dbb2a974fa32d31b9d35 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Thu, 25 Sep 2025 22:23:20 +0200 -Subject: [PATCH 100/101] dt-bindings: mmc: atmel,sama5d2-sdhci: add LAN969x +Subject: [PATCH 101/105] dt-bindings: mmc: atmel,sama5d2-sdhci: add LAN969x compatible -The SDHCI controller in the LAN969x family is compatible with the -SAM9X60 implementation. Add the microchip,lan9691-sdhci compatible +The SDHCI controller in the LAN969x family uses the same register layout +as the SAM9X60 implementation. Add the microchip,lan9691-sdhci compatible with microchip,sam9x60-sdhci as its fallback. Signed-off-by: Robert Marko +Acked-by: Conor Dooley --- Documentation/devicetree/bindings/mmc/atmel,sama5d2-sdhci.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/microchipsw/patches-6.18/102-mmc-sdhci-of-at91-add-LAN969x-support.patch b/target/linux/microchipsw/patches-6.18/102-mmc-sdhci-of-at91-add-LAN969x-support.patch new file mode 100644 index 00000000000..453009bb895 --- /dev/null +++ b/target/linux/microchipsw/patches-6.18/102-mmc-sdhci-of-at91-add-LAN969x-support.patch @@ -0,0 +1,38 @@ +From d1a4ee26535e8a2282dce0890bd78e5f43e86613 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Mon, 7 Sep 2026 13:56:39 +0200 +Subject: [PATCH 102/105] mmc: sdhci-of-at91: add LAN969x support + +LAN969x uses the same internally generated base clock layout as SAM9X60, +but its SDMMC controller stops responding when runtime PM gates its clocks. +Software resets then fail to complete and the internal SDHCI clock never +stabilises, causing subsequent I/O requests to time out. + +Add LAN969x-specific SoC data using the SAM9X60 clock layout and select the +option to leave its clocks enabled across runtime suspend. + +Signed-off-by: Robert Marko +--- + drivers/mmc/host/sdhci-of-at91.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/mmc/host/sdhci-of-at91.c ++++ b/drivers/mmc/host/sdhci-of-at91.c +@@ -160,9 +160,17 @@ static const struct sdhci_at91_soc_data + .pm_runtime_disable_clks = true, + }; + ++static const struct sdhci_at91_soc_data soc_data_lan969x = { ++ .pdata = &sdhci_sama5d2_pdata, ++ .baseclk_is_generated_internally = true, ++ .pm_runtime_disable_clks = false, ++ .divider_for_baseclk = 2, ++}; ++ + static const struct of_device_id sdhci_at91_dt_match[] = { + { .compatible = "atmel,sama5d2-sdhci", .data = &soc_data_sama5d2 }, + { .compatible = "microchip,sam9x60-sdhci", .data = &soc_data_sam9x60 }, ++ { .compatible = "microchip,lan9691-sdhci", .data = &soc_data_lan969x }, + {} + }; + MODULE_DEVICE_TABLE(of, sdhci_at91_dt_match); diff --git a/target/linux/microchipsw/patches-6.18/103-arm64-dts-microchip-lan969x-add-SDMMC-nodes.patch b/target/linux/microchipsw/patches-6.18/103-arm64-dts-microchip-lan969x-add-SDMMC-nodes.patch new file mode 100644 index 00000000000..62dfdbc3232 --- /dev/null +++ b/target/linux/microchipsw/patches-6.18/103-arm64-dts-microchip-lan969x-add-SDMMC-nodes.patch @@ -0,0 +1,62 @@ +From b8868424d15ef9be14e32f45f40a5b5b3640c57b Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Thu, 25 Sep 2025 22:26:58 +0200 +Subject: [PATCH 103/105] arm64: dts: microchip: lan969x: add SDMMC nodes + +Add nodes for both SDMMC controllers. Connect their bus interface clock to +the fabric clock and their core clock to the corresponding generated clock. + +Configure SDMMC0 with a 100 MHz generated clock for 50 MHz eMMC DDR +operation. Configure SDMMC1 with an exact 50 MHz generated clock so the +integer base clock encoded in the SDHCI capabilities remains accurate and +the identification clock does not exceed 400 kHz. + +Keep both nodes ordered by unit address. + +Signed-off-by: Robert Marko +Reviewed-by: Aubin Constans +Reviewed-by: Claudiu Beznea +--- + arch/arm64/boot/dts/microchip/lan9691.dtsi | 24 ++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +--- a/arch/arm64/boot/dts/microchip/lan9691.dtsi ++++ b/arch/arm64/boot/dts/microchip/lan9691.dtsi +@@ -414,6 +414,18 @@ + status = "disabled"; + }; + ++ sdmmc0: mmc@e0830000 { ++ compatible = "microchip,lan9691-sdhci", ++ "microchip,sam9x60-sdhci"; ++ reg = <0xe0830000 0x300>; ++ interrupts = ; ++ clocks = <&fabric_clk>, <&clks GCK_ID_SDMMC0>; ++ clock-names = "hclock", "multclk"; ++ assigned-clocks = <&clks GCK_ID_SDMMC0>; ++ assigned-clock-rates = <100000000>; ++ status = "disabled"; ++ }; ++ + qspi2: spi@e0834000 { + compatible = "microchip,lan9691-qspi"; + reg = <0xe0834000 0x00000100>, +@@ -429,6 +441,18 @@ + status = "disabled"; + }; + ++ sdmmc1: mmc@e0838000 { ++ compatible = "microchip,lan9691-sdhci", ++ "microchip,sam9x60-sdhci"; ++ reg = <0xe0838000 0x300>; ++ interrupts = ; ++ clocks = <&fabric_clk>, <&clks GCK_ID_SDMMC1>; ++ clock-names = "hclock", "multclk"; ++ assigned-clocks = <&clks GCK_ID_SDMMC1>; ++ assigned-clock-rates = <50000000>; ++ status = "disabled"; ++ }; ++ + reset: reset-controller@e201000c { + compatible = "microchip,lan9691-switch-reset", + "microchip,lan966x-switch-reset"; diff --git a/target/linux/microchipsw/patches-6.18/102-arm64-dts-microchip-ev23x71a-enable-QSPI.patch b/target/linux/microchipsw/patches-6.18/104-arm64-dts-microchip-ev23x71a-enable-QSPI.patch similarity index 66% rename from target/linux/microchipsw/patches-6.18/102-arm64-dts-microchip-ev23x71a-enable-QSPI.patch rename to target/linux/microchipsw/patches-6.18/104-arm64-dts-microchip-ev23x71a-enable-QSPI.patch index dbac9b08d23..f813da0b42c 100644 --- a/target/linux/microchipsw/patches-6.18/102-arm64-dts-microchip-ev23x71a-enable-QSPI.patch +++ b/target/linux/microchipsw/patches-6.18/104-arm64-dts-microchip-ev23x71a-enable-QSPI.patch @@ -1,18 +1,18 @@ -From cce4e3e80004f65fc55c70056e3e693cdfdcccea Mon Sep 17 00:00:00 2001 +From d0344e02fd7d08eb525a8a31a6657790380b2095 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 24 Aug 2026 12:51:53 +0200 -Subject: [PATCH 102/103] arm64: dts: microchip: ev23x71a: enable QSPI +Subject: [PATCH 104/105] arm64: dts: microchip: ev23x71a: enable QSPI Enable the QSPI controller and describe the onboard SPI NOR flash. Signed-off-by: Robert Marko --- - .../arm64/boot/dts/microchip/lan9696-ev23x71a.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) + arch/arm64/boot/dts/microchip/lan9696-ev23x71a.dts | 13 +++++++++++++ + 1 file changed, 13 insertions(+) --- a/arch/arm64/boot/dts/microchip/lan9696-ev23x71a.dts +++ b/arch/arm64/boot/dts/microchip/lan9696-ev23x71a.dts -@@ -463,6 +463,21 @@ +@@ -463,6 +463,19 @@ }; }; @@ -23,8 +23,6 @@ Signed-off-by: Robert Marko + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <100000000>; -+ #address-cells = <1>; -+ #size-cells = <1>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + m25p,fast-read; diff --git a/target/linux/microchipsw/patches-6.18/103-arm64-dts-microchip-ev23x71a-enable-eMMC.patch b/target/linux/microchipsw/patches-6.18/105-arm64-dts-microchip-ev23x71a-enable-eMMC.patch similarity index 52% rename from target/linux/microchipsw/patches-6.18/103-arm64-dts-microchip-ev23x71a-enable-eMMC.patch rename to target/linux/microchipsw/patches-6.18/105-arm64-dts-microchip-ev23x71a-enable-eMMC.patch index 43fb7dfb611..370ee31d331 100644 --- a/target/linux/microchipsw/patches-6.18/103-arm64-dts-microchip-ev23x71a-enable-eMMC.patch +++ b/target/linux/microchipsw/patches-6.18/105-arm64-dts-microchip-ev23x71a-enable-eMMC.patch @@ -1,18 +1,20 @@ -From b36ae1844cc47de82a1866538756c9dffa787e94 Mon Sep 17 00:00:00 2001 +From 6e4f685e6d97033d5fc0e3d4325a94ce430c5306 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 24 Aug 2026 12:52:09 +0200 -Subject: [PATCH 103/103] arm64: dts: microchip: ev23x71a: enable eMMC +Subject: [PATCH 105/105] arm64: dts: microchip: ev23x71a: enable eMMC -Enable the eMMC connected to SDMMC0 in 8-bit DDR mode. +Enable the non-removable eMMC connected to SDMMC0. Signed-off-by: Robert Marko +Reviewed-by: Aubin Constans +Reviewed-by: Claudiu Beznea --- - arch/arm64/boot/dts/microchip/lan9696-ev23x71a.dts | 10 ++++++++++ - 1 file changed, 10 insertions(+) + arch/arm64/boot/dts/microchip/lan9696-ev23x71a.dts | 12 ++++++++++++ + 1 file changed, 12 insertions(+) --- a/arch/arm64/boot/dts/microchip/lan9696-ev23x71a.dts +++ b/arch/arm64/boot/dts/microchip/lan9696-ev23x71a.dts -@@ -478,6 +478,16 @@ +@@ -476,6 +476,18 @@ }; }; @@ -22,6 +24,8 @@ Signed-off-by: Robert Marko + bus-width = <8>; + mmc-ddr-1_8v; + non-removable; ++ no-sd; ++ no-sdio; + disable-wp; + status = "okay"; +};