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qualcommax: pcs-qca-uniphy: report a USXGMII speed only once the link is up

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qca_uniphy_pcs_get_state_usxgmii() reads the speed out of the USXGMII code
word without consulting the link bit beside it, so a word the partner has
not filled in yet is decoded as a speed and handed to phylink as a resolved
link. The field is read into state->an_complete and never used again.

Report no link until that bit is set, which is the shape mainline's
xpcs_get_state_c73() has for the same word:

	drivers/net/pcs/pcs-xpcs.c, xpcs_get_state_c73():
		state->an_complete = xpcs_aneg_done_c73(xpcs, state, ...);
		if (!state->an_complete) {
			state->link = false;
			return 0;
		}

This arm needs a USXGMII partner and the bench has no 10G port, so it is
not runtime tested here.

Fixes: 05c180511d ("qualcommax: add UNIPHY PCS driver")
Assisted-by: Claude:claude-opus-5
Signed-off-by: Julius Bairaktaris <julius@bairaktaris.de>
Link: https://github.com/openwrt/openwrt/pull/25084
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Julius Bairaktaris authored and Robert Marko committed 2026-09-09 21:00:03 +02:00
1 parent 8cdd105d31
commit 8939d5654a
1 file changed
+8
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target/linux/qualcommax/files/drivers/net/pcs/pcs-qca-uniphy.c
+8
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@@ -374,7 +374,15 @@ static void qca_uniphy_pcs_get_state_usxgmii(struct qca_uniphy *uniphy,
return;
}
/* The speed field of this word only means anything once USXGMII
* autonegotiation has resolved it, so reporting the link before then
* would hand phylink whatever the field happens to hold.
*/
state->an_complete = !!(val & XPCS_USXG_AN_LINK_STS);
if (!state->an_complete) {
state->link = false;
return;
}
switch (FIELD_GET(XPCS_USXG_AN_SPEED_MASK, val)) {
case XPCS_USXG_AN_SPEED_10000: