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ramips: ethernet: ralink: mt7620 enable jumbo frames
mt7620 can forward jumbo frames up to 2048. The fe_change_mtu() was already compatible except for the GDM_FWD_CFG address. An MTU greater than 1500 is required to use DSA tags with a stacked switch chip. This patch enables jumbo frame support by default. Signed-off-by: Andrey Melnikov <temnota.am@gmail.com> Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Link: https://github.com/openwrt/openwrt/pull/23933 Signed-off-by: Robert Marko <robimarko@gmail.com>
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@@ -178,6 +178,8 @@ static void mt7620_ephy_init(struct mt7620_gsw *gsw)
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static void mt7620_mac_init(struct mt7620_gsw *gsw)
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{
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u32 val;
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/* Internal ethernet requires PCIe RC mode */
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rt_sysc_w32(rt_sysc_r32(SYSC_REG_CFG1) | PCIE_RC_MODE, SYSC_REG_CFG1);
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@@ -190,6 +192,12 @@ static void mt7620_mac_init(struct mt7620_gsw *gsw)
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/* Set Port 6 as CPU Port */
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mtk_switch_w32(gsw, 0x7f7f7fe0, 0x0010);
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val = mtk_switch_r32(gsw, GSW_REG_GMACCR);
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val &= ~((GMACCR_JMB_LEN_MASK << GMACCR_JMB_LEN_SHIFT) | GMACCR_MAX_RX_PKT_LEN_MASK);
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/* Set 2k max frame size and set MAX_RX_PKT_LEN to jumbo mode */
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val |= (2 << GMACCR_JMB_LEN_SHIFT) | GMACCR_MAX_RX_PKT_LEN_JUMBO;
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mtk_switch_w32(gsw, val, GSW_REG_GMACCR);
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/* Enable MIB stats */
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mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_MIB_CNT_EN) | (1 << 1), GSW_REG_MIB_CNT_EN);
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}
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@@ -53,7 +53,12 @@
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#define GSW_REG_MAC_P1_MCR 0x200
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// Global MAC control register
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#define GSW_REG_GMACCR 0x30E0
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#define GSW_REG_GMACCR 0x3FE0 /* correct address per MT7620A datasheet */
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#define GMACCR_JMB_LEN_MASK 0x0F
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#define GMACCR_JMB_LEN_SHIFT 2
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// MAX_RX_PKT_LEN field (bits 0:1): 0=1518, 1=1536, 2=jumbo
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#define GMACCR_MAX_RX_PKT_LEN_MASK 0x3
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#define GMACCR_MAX_RX_PKT_LEN_JUMBO 0x2
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#define SYSC_REG_CHIP_REV_ID 0x0c
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#define SYSC_REG_CFG1 0x14
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@@ -41,7 +41,14 @@
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#include "mdio.h"
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#include "ethtool.h"
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#if defined(CONFIG_SOC_MT7620)
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#define DMA_FWD_REG MT7620A_GDMA1_FWD_CFG
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#define MAX_RX_LENGTH 2048
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#else
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#define DMA_FWD_REG FE_GDMA1_FWD_CFG
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#define MAX_RX_LENGTH 1536
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#endif
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#define FE_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
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#define FE_RX_HLEN (NET_SKB_PAD + FE_RX_ETH_HLEN + NET_IP_ALIGN)
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#define DMA_DUMMY_DESC 0xffffffff
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@@ -1169,7 +1176,7 @@ void fe_fwd_config(struct fe_priv *priv)
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{
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u32 fwd_cfg;
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fwd_cfg = fe_r32(FE_GDMA1_FWD_CFG);
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fwd_cfg = fe_r32(DMA_FWD_REG);
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/* disable jumbo frame */
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if (priv->flags & FE_FLAG_JUMBO_FRAME)
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@@ -1178,19 +1185,19 @@ void fe_fwd_config(struct fe_priv *priv)
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/* set unicast/multicast/broadcast frame to cpu */
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fwd_cfg &= ~0xffff;
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fe_w32(fwd_cfg, FE_GDMA1_FWD_CFG);
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fe_w32(fwd_cfg, DMA_FWD_REG);
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}
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static void fe_rxcsum_config(bool enable)
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{
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if (enable)
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fe_w32(fe_r32(FE_GDMA1_FWD_CFG) | (FE_GDM1_ICS_EN |
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fe_w32(fe_r32(DMA_FWD_REG) | (FE_GDM1_ICS_EN |
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FE_GDM1_TCS_EN | FE_GDM1_UCS_EN),
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FE_GDMA1_FWD_CFG);
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DMA_FWD_REG);
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else
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fe_w32(fe_r32(FE_GDMA1_FWD_CFG) & ~(FE_GDM1_ICS_EN |
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fe_w32(fe_r32(DMA_FWD_REG) & ~(FE_GDM1_ICS_EN |
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FE_GDM1_TCS_EN | FE_GDM1_UCS_EN),
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FE_GDMA1_FWD_CFG);
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DMA_FWD_REG);
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}
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static void fe_txcsum_config(bool enable)
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@@ -1450,7 +1457,7 @@ static int fe_change_mtu(struct net_device *dev, int new_mtu)
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fe_stop(dev);
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if (!IS_ENABLED(CONFIG_SOC_MT7621)) {
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fwd_cfg = fe_r32(FE_GDMA1_FWD_CFG);
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fwd_cfg = fe_r32(DMA_FWD_REG);
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if (new_mtu <= ETH_DATA_LEN) {
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fwd_cfg &= ~FE_GDM1_JMB_EN;
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} else {
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@@ -1459,7 +1466,7 @@ static int fe_change_mtu(struct net_device *dev, int new_mtu)
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fwd_cfg |= (DIV_ROUND_UP(frag_size, 1024) <<
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FE_GDM1_JMB_LEN_SHIFT) | FE_GDM1_JMB_EN;
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}
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fe_w32(fwd_cfg, FE_GDMA1_FWD_CFG);
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fe_w32(fwd_cfg, DMA_FWD_REG);
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}
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return fe_open(dev);
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@@ -1581,7 +1588,7 @@ static int fe_probe(struct platform_device *pdev)
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NETIF_F_HW_VLAN_CTAG_RX);
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netdev->features |= netdev->hw_features;
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if (IS_ENABLED(CONFIG_SOC_MT7621))
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if (IS_ENABLED(CONFIG_SOC_MT7620) || IS_ENABLED(CONFIG_SOC_MT7621))
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netdev->max_mtu = 2048;
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/* fake rx vlan filter func. to support tx vlan offload func */
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@@ -332,7 +332,8 @@ static void mt7620_init_data(struct fe_soc_data *data,
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struct fe_priv *priv = netdev_priv(netdev);
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priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_RX_2B_OFFSET |
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FE_FLAG_RX_SG_DMA | FE_FLAG_HAS_SWITCH;
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FE_FLAG_RX_SG_DMA | FE_FLAG_HAS_SWITCH |
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FE_FLAG_JUMBO_FRAME;
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netdev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
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NETIF_F_HW_VLAN_CTAG_TX;
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