From d592680cc501cd7decdffb50b80c964d128c22ef Mon Sep 17 00:00:00 2001 From: Mark Jia Date: Mon, 20 Jul 2026 01:33:26 +0800 Subject: [PATCH] qualcommax: ipq50xx: add support for CMCC RAX3000Q/QY Add support for the CMCC RAX3000Q/QY platform based on Qualcomm IPQ5000. Both hardware variants are identical and share the same device tree. Hardware Specifications: - SoC: Qualcomm IPQ5000 - RAM: 256 MiB, integrated in SoC - Flash: GigaDevice GD5F1GQ5REYIG (Dosilicon variant is not supported) - 2.4 GHz Wi-Fi: SoC integrated, with 2 FEMs - 5 GHz Wi-Fi: QCN6102, with 2 FEMs - Switch: QCA8337, 1 WAN + 3 LAN - LEDs: 3 RGB LEDs - Keys: reset and mesh pairing - UART: 3-pin, 115200n8 The vendor flash layout is documented and the ART partition contains calibration data, which must be preserved carefully. Due to the limited 256 MiB RAM, ath11k is disabled in the DTS to avoid OOM issues on this device. The MAC address location in flash could not be identified reliably. As a temporary workaround, the MAC addresses (WAN LAN 2.4G 5G WiFi) are derived from the ART partition start, with vendor/default values being invalid and falling back to random generation if left unchanged (FF). Flash Guide Requirements - UART access (3-pin, 115200n8) - Ethernet cable - TFTP server running on your computer - OpenWrt `.ubi` firmware image Step 0: Backup all partitions (strongly recommended) Step 1: Connect UART and interrupt U-Boot Step 2: Configure PC network Step 3: Start TFTP server Step 4: Load firmware via U-Boot tftpboot 192.168.10.19:.ubi Step 5: Flash firmware flash rootfs Step 6: Reboot device reset Signed-off-by: Mark Jia --- .../uboot-envtools/files/qualcommax_ipq50xx | 1 + .../linux/qualcommax/dts/ipq5018-rax3000q.dts | 356 ++++++++++++++++++ target/linux/qualcommax/image/ipq50xx.mk | 14 + .../ipq50xx/base-files/etc/board.d/01_leds | 1 + .../ipq50xx/base-files/etc/board.d/02_network | 1 + .../base-files/lib/upgrade/platform.sh | 1 + 6 files changed, 374 insertions(+) create mode 100644 target/linux/qualcommax/dts/ipq5018-rax3000q.dts diff --git a/package/boot/uboot-tools/uboot-envtools/files/qualcommax_ipq50xx b/package/boot/uboot-tools/uboot-envtools/files/qualcommax_ipq50xx index 116b3cccb49..1f032fd9379 100644 --- a/package/boot/uboot-tools/uboot-envtools/files/qualcommax_ipq50xx +++ b/package/boot/uboot-tools/uboot-envtools/files/qualcommax_ipq50xx @@ -10,6 +10,7 @@ board=$(board_name) case "$board" in cmcc,mr3000d-ci|\ cmcc,pz-l8|\ +cmcc,rax3000q|\ elecom,wrc-x3000gs2|\ elecom,wrc-x3000gst2|\ iodata,wn-dax3000gr|\ diff --git a/target/linux/qualcommax/dts/ipq5018-rax3000q.dts b/target/linux/qualcommax/dts/ipq5018-rax3000q.dts new file mode 100644 index 00000000000..23a1637ee0c --- /dev/null +++ b/target/linux/qualcommax/dts/ipq5018-rax3000q.dts @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "ipq5018.dtsi" +#include "ipq5018-ess.dtsi" +#include "ipq5018-qcn6122.dtsi" + +#include +#include +#include + +/ { + model = "CMCC RAX3000Q"; + compatible = "cmcc,rax3000q", "qcom,ipq5018"; + + aliases { + label-mac-device = <&gmac1>; + + led-boot = &led_status_red; + led-failsafe = &led_status_blue; + led-running = &led_status_green; + led-upgrade = &led_status_blue; + + serial0 = &blsp1_uart1; + }; + + chosen { + bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M"; + stdout-path = "serial0:115200n8"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset-button { + label = "reset"; + gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps-button { + label = "wps"; + gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_status_red: led-0 { + gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_STATUS; + default-state = "off"; + }; + + led_status_green: led-1 { + gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "off"; + }; + + led_status_blue: led-2 { + gpios = <&tlmm 17 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_STATUS; + default-state = "off"; + }; + }; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&xo_board_clk { + clock-div = <4>; + clock-mult = <1>; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; +}; + +&prng { + status = "okay"; +}; + +&qfprom { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&qpic_nand { + pinctrl-0 = <&qpic_pins>; + pinctrl-names = "default"; + status = "okay"; + + //GigaDevice GD5F1GQ5REYIG + nand@0 { + compatible = "spi-nand"; + reg = <0>; + nand-ecc-engine = <&qpic_nand>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-bus-width = <8>; + + partitions { + compatible = "qcom,smem-part"; + + partition-art { + label = "0:art"; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + // WAN MAC address + macaddr_art_0: mac-address@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + + // LAN MAC address + macaddr_art_6: mac-address@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; + + }; + }; + }; + }; +}; + +&uniphy0 { + status = "okay"; + + assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>; + assigned-clock-rates = ; +}; + +// MAC1 -> SGMII +&gmac1 { + status = "okay"; + + phy-mode = "sgmii"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_art_6 (0)>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&mdio0 { + status = "okay"; +}; + +&mdio1 { + status = "okay"; + + pinctrl-0 = <&mdio1_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; + + // QCA8337 Phy0 -> WAN + qca8337_0: ethernet-phy@0 { + reg = <0>; + }; + + // QCA8337 Phy1 -> LAN1 + qca8337_1: ethernet-phy@1 { + reg = <1>; + }; + + // QCA8337 Phy3 -> LAN2 + qca8337_3: ethernet-phy@3 { + reg = <3>; + }; + + // QCA8337 Phy4 -> LAN3 + qca8337_4: ethernet-phy@4 { + reg = <4>; + }; + + // QCA8337 switch + switch1: ethernet-switch@11 { + compatible = "qca,qca8337"; + reg = <0x11>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-port@0 { + reg = <0>; + phy-mode = "sgmii"; + ethernet = <&gmac1>; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + ethernet-port@1 { + reg = <1>; + label = "wan"; + phy-handle = <&qca8337_0>; + + nvmem-cells = <&macaddr_art_0 (0)>; + nvmem-cell-names = "mac-address"; + }; + + ethernet-port@2 { + reg = <2>; + label = "lan1"; + phy-handle = <&qca8337_1>; + }; + + ethernet-port@4 { + reg = <4>; + label = "lan2"; + phy-handle = <&qca8337_3>; + }; + + ethernet-port@5 { + reg = <5>; + label = "lan3"; + phy-handle = <&qca8337_4>; + }; + }; + }; +}; + +&tlmm { + button_pins: button-state { + pins = "gpio23", "gpio38"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + led_pins: led-state { + pins = "gpio24", "gpio19", "gpio17"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + mdio1_pins: mdio-state { + mdc-pins { + pins = "gpio36"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio-pins { + pins = "gpio37"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + qpic_pins: qpic-state { + clock-pins { + pins = "gpio9"; + function = "qspi_clk"; + drive-strength = <8>; + bias-disable; + }; + + cs-pins { + pins = "gpio8"; + function = "qspi_cs"; + drive-strength = <8>; + bias-disable; + }; + + data-pins { + pins = "gpio4", "gpio5", "gpio6", "gpio7"; + function = "qspi_data"; + drive-strength = <8>; + bias-disable; + }; + }; + + serial_0_pins: uart0-state { + pins = "gpio28", "gpio29"; + function = "blsp0_uart1"; + drive-strength = <8>; + bias-disable; + }; +}; + +//256M RAM is too small for ath11k, so WiFi is disabled to prevent OOM. + +&q6v5_wcss { + status = "disabled"; + /* The QCN6102 radio should map to UPD ID 2. Without */ + /* bootargs, the firmware will expect it to be on UPD ID 3 */ + + boot-args = ; + +}; + +&wifi { + // IPQ5018 + status = "disabled"; + + qcom,rproc = <&q6_wcss_pd1>; + qcom,ath11k-calibration-variant = "CMCC-RAX3000Q"; + qcom,ath11k-fw-memory-mode = <1>; + qcom,bdf-addr = <0x4c400000>; +}; + +&wifi1 { + // QCN6102 5G + status = "disabled"; + + qcom,rproc = <&q6_wcss_pd2>; + qcom,userpd-subsys-name = "q6v5_wcss_userpd2"; + qcom,ath11k-calibration-variant = "CMCC-RAX3000Q"; + qcom,ath11k-fw-memory-mode = <1>; + qcom,bdf-addr = <0x4d100000>; + qcom,m3-dump-addr = <0x4df00000>; +}; diff --git a/target/linux/qualcommax/image/ipq50xx.mk b/target/linux/qualcommax/image/ipq50xx.mk index 34a99fde170..05d1be6782a 100644 --- a/target/linux/qualcommax/image/ipq50xx.mk +++ b/target/linux/qualcommax/image/ipq50xx.mk @@ -49,6 +49,20 @@ define Device/cmcc_pz-l8 endef TARGET_DEVICES += cmcc_pz-l8 +define Device/cmcc_rax3000q + $(call Device/FitImage) + $(call Device/UbiFit) + DEVICE_VENDOR := CMCC + DEVICE_MODEL := RAX3000Q + DEVICE_DTS_CONFIG := config@mp02.1 + SOC := ipq5018 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 59392k + NAND_SIZE := 128m +endef +TARGET_DEVICES += cmcc_rax3000q + define Device/elecom_wrc-x3000gs2 $(call Device/FitImageLzma) DEVICE_VENDOR := ELECOM diff --git a/target/linux/qualcommax/ipq50xx/base-files/etc/board.d/01_leds b/target/linux/qualcommax/ipq50xx/base-files/etc/board.d/01_leds index 0d30aa35c38..4237c6ff516 100644 --- a/target/linux/qualcommax/ipq50xx/base-files/etc/board.d/01_leds +++ b/target/linux/qualcommax/ipq50xx/base-files/etc/board.d/01_leds @@ -10,6 +10,7 @@ board=$(board_name) case "$board" in cmcc,pz-l8|\ +cmcc,rax3000q|\ elecom,wrc-x3000gs2|\ elecom,wrc-x3000gst2|\ iodata,wn-dax3000gr) diff --git a/target/linux/qualcommax/ipq50xx/base-files/etc/board.d/02_network b/target/linux/qualcommax/ipq50xx/base-files/etc/board.d/02_network index 6659c37ae69..76b77b0d663 100644 --- a/target/linux/qualcommax/ipq50xx/base-files/etc/board.d/02_network +++ b/target/linux/qualcommax/ipq50xx/base-files/etc/board.d/02_network @@ -19,6 +19,7 @@ ipq50xx_setup_interfaces() ucidef_set_interfaces_lan_wan "lan1 lan2" "wan" ;; cmcc,mr3000d-ci|\ + cmcc,rax3000q|\ linksys,mx2000|\ linksys,mx5500|\ linksys,spnmx56|\ diff --git a/target/linux/qualcommax/ipq50xx/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq50xx/base-files/lib/upgrade/platform.sh index a93980f57dd..a49a64089fb 100644 --- a/target/linux/qualcommax/ipq50xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/qualcommax/ipq50xx/base-files/lib/upgrade/platform.sh @@ -181,6 +181,7 @@ platform_do_upgrade() { case "$(board_name)" in cmcc,mr3000d-ci|\ cmcc,pz-l8|\ + cmcc,rax3000q|\ elecom,wrc-x3000gs2|\ elecom,wrc-x3000gst2|\ iodata,wn-dax3000gr)