From f9dd7690520b120a0c3a0ea9cdf8113828bea8d0 Mon Sep 17 00:00:00 2001 From: Ryan Leung Date: Sat, 9 May 2026 10:42:59 +1000 Subject: [PATCH] rockchip: add support for FriendlyELEC NanoPi M5 Ethernet LAN port is set to `eth1` (silkscreen "ETH2" and case label "2") next to the 2x USB Type-A ports and WAN is set to `eth0` (silkscreen "ETH1" and case label "1") next to the USB Type-C port. The USER ("reset") button serves as the reset button. A short press will reboot and a long press will reset to factory settings (deleting all data) if using squashfs image. MASK ("maskrom") and RCRY ("recovery") buttons are enabled but are not set to any specific function Pressing the POWER button will `poweroff` the device and it will stay off until a power cycle. Hardware --------------- * SoC: RockChip RK3576 64-bit ARMv8-A 8 cores big.LITTLE (4x A72 and 4x A53) * RAM: 3/4GB LPDDR4X or 8/16GB LPDDR5 * Ethernet: 2x GbE (SoC RGMII MAC, RTL8211F PHY) * 3x LEDs (SYS - red / 1 (WAN) - green / 2 (LAN) - green) * 4x Buttons (MASK ("maskrom"), RCRY ("recovery"), USER ("reset" - OpenWrt reset), POWER) * 1x 16MiB SPI NOR on board * 1x UFS slot for optional UFS 2.0 module (currently not supported) * 1x microSD card slot (UHS-I) * 1x HDMI OUT * 1x Headphone OUT 3.5mm * 1x M.2 M-key 2280 PCIe slot (PCIe 2.1 x1 supports NVMe SSD) * 1x M.2 E-key *SDIO* slot for optional RTL8822CS Wi-Fi 5 * the case has integrated antennae as well as 2x knockouts * the device tree is missing the nodes relevant to Wi-Fi operations so it's not supported for now. * 2x USB 3.2 Gen 1 Type-A Ports * Power: 1x USB Type-C 6V-20V with both DC and USB PD supported * Serial: 1500000 8N1 3.3V - 2.54mm 3-pin header next to HDMI MAC addresses --------------- WAN (`eth0` case label "1"): generated from /sys/.../mmcblk0/cid (CID of SD card) LAN (`eth1` case label "2"): WAN + 1 Installation --------------- Decompress the archive of the OpenWrt sysupgrade image and write it to a microSD card using `dd` or use Balena Etcher (no need to decompress). Boot --------------- Insert microSD card, set boot switch to "UFS/SD" and then supply power. Signed-off-by: Ryan Leung Link: https://github.com/openwrt/openwrt/pull/23008 Signed-off-by: Hauke Mehrtens --- package/boot/uboot-rockchip/Makefile | 8 + .../armv8/base-files/etc/board.d/01_leds | 1 + .../armv8/base-files/etc/board.d/02_network | 2 + .../etc/hotplug.d/net/40-net-smp-affinity | 1 + target/linux/rockchip/image/armv8.mk | 8 + ...p-Add-FriendlyElec-NanoPi-M5-support.patch | 987 ++++++++++++++++++ ...ip-add-and-set-buttons-for-NanoPi-M5.patch | 56 + ...-Update-LED-properties-for-NanoPi-M5.patch | 55 + ...ip-add-and-set-buttons-for-NanoPi-M5.patch | 56 + ...-Update-LED-properties-for-NanoPi-M5.patch | 55 + 10 files changed, 1229 insertions(+) create mode 100644 target/linux/rockchip/patches-6.12/053-v6.17-arm64-dts-rockchip-Add-FriendlyElec-NanoPi-M5-support.patch create mode 100644 target/linux/rockchip/patches-6.12/140-arm64-dts-rockchip-add-and-set-buttons-for-NanoPi-M5.patch create mode 100644 target/linux/rockchip/patches-6.12/141-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-M5.patch create mode 100644 target/linux/rockchip/patches-6.18/140-arm64-dts-rockchip-add-and-set-buttons-for-NanoPi-M5.patch create mode 100644 target/linux/rockchip/patches-6.18/141-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-M5.patch diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index e94f058998d..d174e8c98aa 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -335,6 +335,13 @@ define U-Boot/generic-rk3576 friendlyarm_nanopi-r76s endef +define U-Boot/nanopi-m5-rk3576 + $(U-Boot/rk3576/Default) + NAME:=NanoPi M5 + BUILD_DEVICES:= \ + friendlyarm_nanopi-m5 +endef + define U-Boot/rock-4d-rk3576 $(U-Boot/rk3576/Default) NAME:=ROCK 4D @@ -459,6 +466,7 @@ UBOOT_TARGETS := \ rock-3a-rk3568 \ rock-3b-rk3568 \ generic-rk3576 \ + nanopi-m5-rk3576 \ rock-4d-rk3576 \ generic-rk3588 \ nanopc-t6-rk3588 \ diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index 4504948034e..4a166ad46e9 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -8,6 +8,7 @@ boardname="${board##*,}" board_config_update case $board in +friendlyarm,nanopi-m5|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index 57f45aab7b0..8ce236b8e27 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -8,6 +8,7 @@ rockchip_setup_interfaces() case "$board" in armsom,sige7|\ + friendlyarm,nanopi-m5|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ @@ -79,6 +80,7 @@ rockchip_setup_macs() case "$board" in armsom,sige7|\ friendlyarm,nanopc-t6|\ + friendlyarm,nanopi-m5|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r76s|\ diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index ce563c24ddc..1bd35b1e3ba 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -51,6 +51,7 @@ xunlong,orangepi-r1-plus-lts) set_interface_core 2 "eth0" set_interface_core 4 "eth1" "xhci-hcd:usb[0-9]+" ;; +friendlyarm,nanopi-m5|\ friendlyarm,nanopi-r4s|\ friendlyarm,nanopi-r4s-enterprise|\ friendlyarm,nanopi-r6c|\ diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index b105f6de0cb..a9d8551b31d 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -88,6 +88,14 @@ define Device/friendlyarm_nanopc-t6 endef TARGET_DEVICES += friendlyarm_nanopc-t6 +define Device/friendlyarm_nanopi-m5 + $(Device/rk3576) + DEVICE_VENDOR := FriendlyARM + DEVICE_MODEL := NanoPi M5 + DEVICE_PACKAGES := blkdiscard block-mount kmod-button-hotplug kmod-input-adc-keys kmod-nvme +endef +TARGET_DEVICES += friendlyarm_nanopi-m5 + define Device/friendlyarm_nanopi-r2c $(Device/rk3328) DEVICE_VENDOR := FriendlyARM diff --git a/target/linux/rockchip/patches-6.12/053-v6.17-arm64-dts-rockchip-Add-FriendlyElec-NanoPi-M5-support.patch b/target/linux/rockchip/patches-6.12/053-v6.17-arm64-dts-rockchip-Add-FriendlyElec-NanoPi-M5-support.patch new file mode 100644 index 00000000000..b0fdfbfdf7e --- /dev/null +++ b/target/linux/rockchip/patches-6.12/053-v6.17-arm64-dts-rockchip-Add-FriendlyElec-NanoPi-M5-support.patch @@ -0,0 +1,987 @@ +From 96cbdfdd3ac20700b9b1c251fb15c944f33a424a Mon Sep 17 00:00:00 2001 +From: John Clark +Date: Sat, 28 Jun 2025 10:32:29 -0400 +Subject: [PATCH] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support + +Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC +(4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables +basic booting and connectivity. + +Supported features: +- RK3576 SoC +- 4GB LPDDR4X or 8GB/16GB LPDDR5 +- 16MB SPI Nor Flash +- 2x 1Gbps Ethernet +- 2x USB 3.2 Gen 1 Type-A ports +- M.2 M-Key PCIe 2.1 x1 NVMe support +- M.2 E-Key SDIO connector +- microSD UHS-I +- HDMI 1.4/2.0 (up to 4096x2304@60Hz) +- 30-pin GPIO (2x SPI, 4x UART, 3x I2C, 5x PWM, 20x GPIO) +- Debug UART +- RTC with HYM8563TS +- Power via USB-C (PD, 6V~20V) + +Signed-off-by: John Clark +Link: https://lore.kernel.org/r/20250628143229.74460-3-inindev@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts | 941 ++++++++++++++++++ + 2 files changed, 942 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts + +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -126,6 +126,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ro + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-m5.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-r76s.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +@@ -0,0 +1,941 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd. ++ * Copyright (c) 2025 John Clark ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3576.dtsi" ++ ++/ { ++ model = "FriendlyElec NanoPi M5"; ++ compatible = "friendlyarm,nanopi-m5", "rockchip,rk3576"; ++ ++ aliases { ++ ethernet0 = &gmac0; ++ ethernet1 = &gmac1; ++ mmc0 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:1500000n8"; ++ }; ++ ++ hdmi-con { ++ compatible = "hdmi-connector"; ++ hdmi-pwr-supply = <&vcc5v_hdmi_tx>; ++ type = "a"; ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ ++ usr_button: key-1 { ++ debounce-interval = <50>; ++ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>; ++ label = "user"; ++ linux,code = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usr_button_l>; ++ wakeup-source; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led_sys: led-0 { ++ color = ; ++ function = LED_FUNCTION_HEARTBEAT; ++ gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; ++ label = "sys"; ++ linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_sys_h>; ++ }; ++ ++ led1: led-1 { ++ color = ; ++ function = LED_FUNCTION_LAN; ++ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "led1"; ++ linux,default-trigger = "netdev"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led1_h>; ++ }; ++ ++ led2: led-2 { ++ color = ; ++ function = LED_FUNCTION_LAN; ++ gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>; ++ label = "led2"; ++ linux,default-trigger = "netdev"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led2_h>; ++ }; ++ }; ++ ++ usb3_port2_5v: regulator-usb3-port2-5v { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb3_host_pwren_h>; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "usb3_port2_5v"; ++ vin-supply = <&vcc5v0_sys_s5>; ++ }; ++ ++ vcc12v_dcin: regulator-vcc12v-dcin { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ regulator-name = "vcc12v_dcin"; ++ }; ++ ++ vcc3v3_m2_keym: regulator-vcc3v3-m2-keym { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie0_pwren_h>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_m2_keym"; ++ vin-supply = <&vcc5v0_sys_s5>; ++ }; ++ ++ vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_pwren_h>; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_sd_s0"; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc5v0_sys_s5"; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb_otg0_pwren_h>; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc5v0_usb_otg0"; ++ vin-supply = <&vcc5v0_sys_s5>; ++ }; ++ ++ vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc5v_hdmi_tx"; ++ vin-supply = <&vcc5v0_sys_s5>; ++ }; ++ ++ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ vin-supply = <&vcc5v0_sys_s5>; ++ }; ++ ++ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2000000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-name = "vcc_2v0_pldo_s3"; ++ vin-supply = <&vcc5v0_sys_s5>; ++ }; ++ ++ vcc_3v3_s0: regulator-vcc-3v3-s0 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_s0"; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det_l>; ++ ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "realtek,rt5616-codec"; ++ ++ simple-audio-card,routing = ++ "Headphones", "HPOL", ++ "Headphones", "HPOR", ++ "IN1P", "Microphone Jack"; ++ simple-audio-card,widgets = ++ "Headphone", "Headphone Jack", ++ "Microphone", "Microphone Jack"; ++ ++ simple-audio-card,codec { ++ sound-dai = <&rt5616>; ++ }; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&sai2>; ++ }; ++ }; ++}; ++ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy1_psu { ++ status = "okay"; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big_s0>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_big_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big_s0>; ++}; ++ ++&cpu_b3 { ++ cpu-supply = <&vdd_cpu_big_s0>; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&fspi1m1_pins { ++ /* gpio1_d5, gpio1_c4-c7 (clk, d0-d4) are for spi nor flash */ ++ /* gpio1_d0-d4 muxed to sai2 audio functions */ ++ rockchip,pins = ++ <1 RK_PD5 3 &pcfg_pull_none>, ++ <1 RK_PC4 3 &pcfg_pull_none>, ++ <1 RK_PC5 3 &pcfg_pull_none>, ++ <1 RK_PC6 3 &pcfg_pull_none>, ++ <1 RK_PC7 3 &pcfg_pull_none>; ++}; ++ ++&gmac0 { ++ clock_in_out = "output"; ++ phy-handle = <&rgmii_phy0>; ++ phy-mode = "rgmii-id"; ++ phy-supply = <&vcc_3v3_s3>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <ð0m0_miim>, ++ <ð0m0_tx_bus2>, ++ <ð0m0_rx_bus2>, ++ <ð0m0_rgmii_clk>, ++ <ð0m0_rgmii_bus>; ++ status = "okay"; ++}; ++ ++&gmac1 { ++ clock_in_out = "output"; ++ phy-handle = <&rgmii_phy1>; ++ phy-mode = "rgmii-id"; ++ phy-supply = <&vcc_3v3_s3>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <ð1m0_miim>, ++ <ð1m0_tx_bus2>, ++ <ð1m0_rx_bus2>, ++ <ð1m0_rgmii_clk>, ++ <ð1m0_rgmii_bus>; ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu_s0>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++}; ++ ++&hdmi_in { ++ hdmi_in_vp0: endpoint { ++ remote-endpoint = <&vp0_out_hdmi>; ++ }; ++}; ++ ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ ++&hdptxphy { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ pmic@23 { ++ compatible = "rockchip,rk806"; ++ reg = <0x23>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ interrupt-parent = <&gpio0>; ++ interrupts = <6 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, ++ <&rk806_dvs2_null>, <&rk806_dvs3_null>; ++ system-power-controller; ++ ++ vcc1-supply = <&vcc5v0_sys_s5>; ++ vcc2-supply = <&vcc5v0_sys_s5>; ++ vcc3-supply = <&vcc5v0_sys_s5>; ++ vcc4-supply = <&vcc5v0_sys_s5>; ++ vcc5-supply = <&vcc5v0_sys_s5>; ++ vcc6-supply = <&vcc5v0_sys_s5>; ++ vcc7-supply = <&vcc5v0_sys_s5>; ++ vcc8-supply = <&vcc5v0_sys_s5>; ++ vcc9-supply = <&vcc5v0_sys_s5>; ++ vcc10-supply = <&vcc5v0_sys_s5>; ++ vcc11-supply = <&vcc_2v0_pldo_s3>; ++ vcc12-supply = <&vcc5v0_sys_s5>; ++ vcc13-supply = <&vcc_1v1_nldo_s3>; ++ vcc14-supply = <&vcc_1v1_nldo_s3>; ++ vcca-supply = <&vcc5v0_sys_s5>; ++ ++ rk806_dvs1_null: dvs1-null-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs1_slp: dvs1-slp-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun1"; ++ }; ++ ++ rk806_dvs1_pwrdn: dvs1-pwrdn-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun2"; ++ }; ++ ++ rk806_dvs1_rst: dvs1-rst-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun3"; ++ }; ++ ++ rk806_dvs2_null: dvs2-null-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs2_slp: dvs2-slp-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun1"; ++ }; ++ ++ rk806_dvs2_pwrdn: dvs2-pwrdn-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun2"; ++ }; ++ ++ rk806_dvs2_rst: dvs2-rst-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun3"; ++ }; ++ ++ rk806_dvs2_dvs: dvs2-dvs-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun4"; ++ }; ++ ++ rk806_dvs2_gpio: dvs2-gpio-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun5"; ++ }; ++ ++ rk806_dvs3_null: dvs3-null-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs3_slp: dvs3-slp-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun1"; ++ }; ++ ++ rk806_dvs3_pwrdn: dvs3-pwrdn-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun2"; ++ }; ++ ++ rk806_dvs3_rst: dvs3-rst-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun3"; ++ }; ++ ++ rk806_dvs3_dvs: dvs3-dvs-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun4"; ++ }; ++ ++ rk806_dvs3_gpio: dvs3-gpio-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun5"; ++ }; ++ ++ regulators { ++ vdd_cpu_big_s0: dcdc-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-enable-ramp-delay = <400>; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-name = "vdd_cpu_big_s0"; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_npu_s0: dcdc-reg2 { ++ regulator-boot-on; ++ regulator-enable-ramp-delay = <400>; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-name = "vdd_npu_s0"; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_lit_s0: dcdc-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-name = "vdd_cpu_lit_s0"; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vcc_3v3_s3: dcdc-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vdd_gpu_s0: dcdc-reg5 { ++ regulator-boot-on; ++ regulator-enable-ramp-delay = <400>; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdd_gpu_s0"; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ vddq_ddr_s0: dcdc-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vddq_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_logic_s0: dcdc-reg7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <800000>; ++ regulator-name = "vdd_logic_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s3: dcdc-reg8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd2_ddr_s3: dcdc-reg9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vdd2_ddr_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_ddr_s0: dcdc-reg10 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vdd_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca_1v8_s0: pldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pldo2_s0: pldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pldo2_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_1v2_s0: pldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vdda_1v2_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca_3v3_s0: pldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcca_3v3_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd_s0: pldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pldo6_s3: pldo-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pldo6_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_0v75_s3: nldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdda_ddr_pll_s0: nldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdda_ddr_pll_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v75_hdmi_s0: nldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <837500>; ++ regulator-max-microvolt = <837500>; ++ regulator-name = "vdda0v75_hdmi_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v85_s0: nldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdda_0v85_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v75_s0: nldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdda_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ ++ hym8563: rtc@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-output-names = "hym8563"; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hym8563_int>; ++ wakeup-source; ++ }; ++}; ++ ++&i2c5 { ++ clock-frequency = <200000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c5m3_xfer>; ++ status = "okay"; ++ ++ rt5616: audio-codec@1b { ++ compatible = "realtek,rt5616"; ++ reg = <0x1b>; ++ assigned-clocks = <&cru CLK_SAI2_MCLKOUT>; ++ assigned-clock-rates = <12288000>; ++ clocks = <&cru CLK_SAI2_MCLKOUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ }; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ clocks = <&cru REFCLKO25M_GMAC0_OUT>; ++ interrupt-parent = <&gpio2>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_int>, <&gmac0_rst>; ++ reset-assert-us = <20000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ clocks = <&cru REFCLKO25M_GMAC1_OUT>; ++ interrupt-parent = <&gpio3>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1_int>, <&gmac1_rst>; ++ reset-assert-us = <20000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&pcie0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie0_perstn>; ++ reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_m2_keym>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac { ++ gmac0_int: gmac0-int { ++ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ gmac0_rst: gmac0-rst { ++ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ gmac1_int: gmac1-int { ++ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ gmac1_rst: gmac1-rst { ++ rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ keys { ++ usr_button_l: usr-button-l { ++ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ led_sys_h: led-sys-h { ++ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ led1_h: led1-h { ++ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ led2_h: led2-h { ++ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pcie { ++ pcie0_pwren_h: pcie0-pwren-h { ++ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ pcie0_perstn: pcie0-perstn { ++ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdmmc { ++ sdmmc0_pwren_h: sdmmc0-pwren-h { ++ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sound { ++ hp_det_l: hp-det-l { ++ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ usb3_host_pwren_h: usb3-host-pwren-h { ++ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ usb_otg0_pwren_h: usb-otg0-pwren-h { ++ rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&sai2 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcca_1v8_s0>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ no-mmc; ++ no-sdio; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_det>, <&sdmmc0_bus4>; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_3v3_s3>; ++ vqmmc-supply = <&vcc3v3_sd_s0>; ++ status = "okay"; ++}; ++ ++&sfc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fspi1m1_csn0>, <&fspi1m1_pins>; ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ m25p,fast-read; ++ spi-max-frequency = <50000000>; ++ spi-rx-bus-width = <4>; ++ spi-tx-bus-width = <1>; ++ vcc-supply = <&vcc_1v8_s3>; ++ }; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ phy-supply = <&vcc5v0_usb_otg0>; ++ status = "okay"; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ phy-supply = <&usb3_port2_5v>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&usbdp_phy { ++ status = "okay"; ++}; ++ ++&usb_drd0_dwc3 { ++ dr_mode = "otg"; ++ extcon = <&u2phy0>; ++ status = "okay"; ++}; ++ ++&usb_drd1_dwc3 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vp0 { ++ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { ++ reg = ; ++ remote-endpoint = <&hdmi_in_vp0>; ++ }; ++}; ++ ++&wdt { ++ status = "okay"; ++}; diff --git a/target/linux/rockchip/patches-6.12/140-arm64-dts-rockchip-add-and-set-buttons-for-NanoPi-M5.patch b/target/linux/rockchip/patches-6.12/140-arm64-dts-rockchip-add-and-set-buttons-for-NanoPi-M5.patch new file mode 100644 index 00000000000..0cffa5c3dc1 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/140-arm64-dts-rockchip-add-and-set-buttons-for-NanoPi-M5.patch @@ -0,0 +1,56 @@ +From: Ryan Leung +Date: Fri, 17 Apr 2026 13:37:40 +1000 +Subject: [PATCH] arm64: dts: rockchip: add and set buttons for NanoPi M5 + +Set user button to reset button (`KEY_RESTART`) with +maskrom and recovery buttons as generic `BTN_2` and `BTN_3` respectively. + +Signed-off-by: Ryan Leung + +--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +@@ -41,14 +41,42 @@ + }; + }; + ++ key-adc-mask { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ button-mask { ++ label = "maskrom"; ++ linux,code = ; ++ press-threshold-microvolt = <0>; ++ }; ++ }; ++ ++ key-adc-rcry { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 1>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ button-rcry { ++ label = "recovery"; ++ linux,code = ; ++ press-threshold-microvolt = <0>; ++ }; ++ }; ++ + keys { + compatible = "gpio-keys"; + + usr_button: key-1 { + debounce-interval = <50>; + gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>; +- label = "user"; +- linux,code = ; ++ label = "reset"; ++ linux,code = ; + pinctrl-names = "default"; + pinctrl-0 = <&usr_button_l>; + wakeup-source; diff --git a/target/linux/rockchip/patches-6.12/141-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-M5.patch b/target/linux/rockchip/patches-6.12/141-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-M5.patch new file mode 100644 index 00000000000..11b781774c7 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/141-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-M5.patch @@ -0,0 +1,55 @@ +From: Ryan Leung +Date: Fri, 17 Apr 2026 13:37:40 +1000 +Subject: [PATCH] arm64: dts: rockchip: Update LED properties for NanoPi M5 + +Reassign `led_sys` from `HEARTBEAT` to `POWER` and `led1` from LAN to WAN +to match the OpenWrt boot/network indicator convention; drop the temporary +label strings now that color/function provide the sysfs name; +and add led-{boot,failsafe,running,upgrade} aliases pointing at led_sys. + +Signed-off-by: Ryan Leung + +--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +@@ -23,6 +23,11 @@ + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdmmc; ++ ++ led-boot = &led_sys; ++ led-failsafe = &led_sys; ++ led-running = &led_sys; ++ led-upgrade = &led_sys; + }; + + chosen { +@@ -88,19 +93,16 @@ + + led_sys: led-0 { + color = ; +- function = LED_FUNCTION_HEARTBEAT; ++ function = LED_FUNCTION_POWER; + gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; +- label = "sys"; +- linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; + pinctrl-0 = <&led_sys_h>; + }; + + led1: led-1 { + color = ; +- function = LED_FUNCTION_LAN; ++ function = LED_FUNCTION_WAN; + gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; +- label = "led1"; + linux,default-trigger = "netdev"; + pinctrl-names = "default"; + pinctrl-0 = <&led1_h>; +@@ -110,7 +112,6 @@ + color = ; + function = LED_FUNCTION_LAN; + gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>; +- label = "led2"; + linux,default-trigger = "netdev"; + pinctrl-names = "default"; + pinctrl-0 = <&led2_h>; diff --git a/target/linux/rockchip/patches-6.18/140-arm64-dts-rockchip-add-and-set-buttons-for-NanoPi-M5.patch b/target/linux/rockchip/patches-6.18/140-arm64-dts-rockchip-add-and-set-buttons-for-NanoPi-M5.patch new file mode 100644 index 00000000000..0cffa5c3dc1 --- /dev/null +++ b/target/linux/rockchip/patches-6.18/140-arm64-dts-rockchip-add-and-set-buttons-for-NanoPi-M5.patch @@ -0,0 +1,56 @@ +From: Ryan Leung +Date: Fri, 17 Apr 2026 13:37:40 +1000 +Subject: [PATCH] arm64: dts: rockchip: add and set buttons for NanoPi M5 + +Set user button to reset button (`KEY_RESTART`) with +maskrom and recovery buttons as generic `BTN_2` and `BTN_3` respectively. + +Signed-off-by: Ryan Leung + +--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +@@ -41,14 +41,42 @@ + }; + }; + ++ key-adc-mask { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ button-mask { ++ label = "maskrom"; ++ linux,code = ; ++ press-threshold-microvolt = <0>; ++ }; ++ }; ++ ++ key-adc-rcry { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 1>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ button-rcry { ++ label = "recovery"; ++ linux,code = ; ++ press-threshold-microvolt = <0>; ++ }; ++ }; ++ + keys { + compatible = "gpio-keys"; + + usr_button: key-1 { + debounce-interval = <50>; + gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>; +- label = "user"; +- linux,code = ; ++ label = "reset"; ++ linux,code = ; + pinctrl-names = "default"; + pinctrl-0 = <&usr_button_l>; + wakeup-source; diff --git a/target/linux/rockchip/patches-6.18/141-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-M5.patch b/target/linux/rockchip/patches-6.18/141-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-M5.patch new file mode 100644 index 00000000000..11b781774c7 --- /dev/null +++ b/target/linux/rockchip/patches-6.18/141-arm64-dts-rockchip-Update-LED-properties-for-NanoPi-M5.patch @@ -0,0 +1,55 @@ +From: Ryan Leung +Date: Fri, 17 Apr 2026 13:37:40 +1000 +Subject: [PATCH] arm64: dts: rockchip: Update LED properties for NanoPi M5 + +Reassign `led_sys` from `HEARTBEAT` to `POWER` and `led1` from LAN to WAN +to match the OpenWrt boot/network indicator convention; drop the temporary +label strings now that color/function provide the sysfs name; +and add led-{boot,failsafe,running,upgrade} aliases pointing at led_sys. + +Signed-off-by: Ryan Leung + +--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +@@ -23,6 +23,11 @@ + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdmmc; ++ ++ led-boot = &led_sys; ++ led-failsafe = &led_sys; ++ led-running = &led_sys; ++ led-upgrade = &led_sys; + }; + + chosen { +@@ -88,19 +93,16 @@ + + led_sys: led-0 { + color = ; +- function = LED_FUNCTION_HEARTBEAT; ++ function = LED_FUNCTION_POWER; + gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; +- label = "sys"; +- linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; + pinctrl-0 = <&led_sys_h>; + }; + + led1: led-1 { + color = ; +- function = LED_FUNCTION_LAN; ++ function = LED_FUNCTION_WAN; + gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; +- label = "led1"; + linux,default-trigger = "netdev"; + pinctrl-names = "default"; + pinctrl-0 = <&led1_h>; +@@ -110,7 +112,6 @@ + color = ; + function = LED_FUNCTION_LAN; + gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>; +- label = "led2"; + linux,default-trigger = "netdev"; + pinctrl-names = "default"; + pinctrl-0 = <&led2_h>;