ASUS RT-AC3200 and ASUS RT-AC5300 are AC3200 and AC5300 routers,
respectively, featuring 5 Ethernet ports over the integrated Broadcom
switch.
ASUS RT-AC3200 hardware info:
* Processor: Broadcom BCM4709A0 dual-core @ 1.0 GHz
* Switch: BCM53012 in BCM4709A0
* DDR3 RAM: 256 MB
* Flash: 128 MB
* 2.4GHz: BCM43602 3x3 single chip 802.11b/g/n SoC
* 5GHz: BCM43602 3x3 two chips 802.11a/n/ac SoC
* Ports: 4 LAN Ports, 1 WAN Port
ASUS RT-AC5300 hardware info:
* Processor: Broadcom BCM4709C0 dual-core @ 1.4 GHz
* Switch: BCM53012 in BCM4709C0
* DDR3 RAM: 512 MB
* Flash: 128 MB
* 2.4GHz: BCM4366 4x4 single chip 802.11b/g/n SoC
* 5GHz: BCM4366 4x4 two chips 802.11a/n/ac SoC
* Ports: 4 LAN Ports, 1 WAN Port
Flashing instructions:
* Boot to CFE Recovery Mode by holding the reset button while power-on.
* Connect to the router with an ethernet cable.
* Set IPv4 address of the computer to 192.168.1.2 subnet 255.255.255.0.
* Head to http://192.168.1.1.
* Reset NVRAM.
* Upload the OpenWrt image.
CFE bootloader may reject flashing the image due to image integrity check.
In that case, follow the instructions below.
* Rename the OpenWrt image as firmware.trx.
* Run a TFTP server and make it serve the firmware.trx file.
* Run the URL below on a browser or curl.
http://192.168.1.1/do.htm?cmd=flash+-noheader+192.168.1.2:firmware.trx+flash0.trx
Signed-off-by: Chester A. Unal <chester.a.unal@arinc9.com>
As a first real usage of the new SerDes struct, move the polarity
configuration there. It was previously located in the global rtpcs_ctrl
struct as an array, indexed by SerDes id. Because this is per-SerDes
information, the new SerDes struct is the correct place to live in.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
By using references to pre-initiated SerDes instances instead of plain
SerDes number, there is no need to check for the range anymore in
various places. During driver/pcs init it is ensured that only valid
SerDes will reach the configuration functions.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
Also switch set_autoneg (and related helper rtpcs_sds_modify) to the
SerDes struct instead of the plain SerDes id by using just the reference
to the SerDes instance instead of (ctrl, sds_id) tuple. This completes
the transition.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make use of the previously added SerDes struct in SerDes setup and all
functions in its call path by removing (ctrl, sds_num) being passed to
every function call and instead just pass the reference to the
corresponding SerDes instance.
Various SerDes calculations for even, odd and neighbor are unified by
switching to previously introduced helpers.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upon creation of a phylink_pcs instance by calling rtpcs_create, assign
a reference to the corresponding SerDes to the link structure. In the
next step, this should be used everywhere instead of the plain SerDes
number.
Rename the field used to hold the SerDes number from 'sds' to 'sds_num'
and name the new field 'sds' to make clear what is what.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add dedicated helpers to get references to even, odd and neigbor SerDes
if needed. This should replace the various calculations scattered
throughout the code, providing a unified way to work with adjacent
SerDes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a separate structure for a SerDes. This is needed to appropriately
store per-SerDes information, which in turn is needed for future work.
Additionally, it's intended to reduce boilerplate and several
inconsistencies.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use a separate configuration field for the number of SerDes for each
variant of the Realtek Otto family. Add this field to the config
structure, assign it and use it during driver probe. This narrows
possible error cases and is needed for upcoming extensions.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Realtek SerDes mode capabilities do not map 1:1 to the
PHY_INTERFACE_MODE_* modes used in the kernel and passed to the PCS.
For example, some PHY chips use the proprietary XSGMII mode for which
there isn't an equivalent in the kernel, or HSGMII.
In the past, this led to problems and confusion using kernel's XGMII to
handle the XSGMII mode, and needed a downstream patch for HSGMII. They
have been solved/worked around for now, but XSGMII is currently not
implemented at all. And who knows what might come in the future.
To make our life easier, introduce a dedicated internal representation
of SerDes modes which differs from kernel's PHY_INTERFACE_MODE_*. This
allows us to map "external" modes to different internal modes as needed
instead of carrying the PHY_INTERFACE_MODE_* through the whole SerDes
configuration code. The PCS driver needs to map PHY_INTERFACE_MODE_* to
RTPCS_SDS_MODE_* in pcs_config, and the latter should be used as the
only one.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
Since the beginning, the PCS driver had the ability to call its
rtpcs_create without a reference to a valid PCS node. A comment in the
code mentions that this is done for RTL838X and its built-in octa-PHY
which is connected directly instead of via a SerDes. Further
explanations are not provided.
Drop this ability and make the rtpcs_create call in the dsa driver
conditional. As the built-in PHY of RTL838X isn't attached to a SerDes,
there is no obvious point of having the PCS driver in that chain. The
ports are marked as internal and have no pcs-handle, thus no phylink_pcs
instance should be created.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 3c073b5cb2 cleaned up the debugfs creation in
mdio-realtek-otto-serdes driver to not explicitly check if the root
directory already exists. This is fine because kernel handles the case
properly so there's no need to check anymore.
However, this pollutes the boot log with:
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
[..] debugfs: 'realtek_otto_serdes' already exists in '/'
Now, the root directory creation is attempted multiple times, causing
the kernel to print an error message because the directory already
exists.
Fix this by moving the SerDes loop into rtsds_debug_init and only try
to create the root debugfs directory once.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21179
Signed-off-by: Robert Marko <robimarko@gmail.com>
The eight leds controlled by the LED controller are RGB leds themselves
but are flashing white by default. The color part is controlled by GPIOs
53 (green), 54 (red), 57 (blue) and 60 (white).
Therefore define the led nodes of the controller as white instead of RBG
as well as backlight as their function.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20877
Signed-off-by: Robert Marko <robimarko@gmail.com>
When support was added for the RBR40 and RBS40 it was assumed that they
also share the same second 5ghz wifi chip as their bigger siblings.
Turns out that instead of QCA9984 (RBx50, SRx60) these devices use
QCA9886 like the RBx20 devices to.
They also load different boardfiles for the IPQ4019 chip.
This moves the wifi nodes from the orbi.dtsi to each device dts file and
change the RBx40 boardfile variants.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20877
Signed-off-by: Robert Marko <robimarko@gmail.com>
Netgear Orbi devices are split into router and satellite units. Even
though the hardware is mostly the same, the network configuration is
different. Router units have a designated WAN port while satellite units
have all available ports labeled as "Ethernet".
This splits the device trees into both unit types and adjusts the port
labels.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20877
Signed-off-by: Robert Marko <robimarko@gmail.com>
Following up with errors reported in the ASU repo, these bananapi cases
do not match the DT compatible "bpi", sync with dts sources.
Also some profiles were overwriting SUPPORTED_DEVICES.
Sysupgrade would be failing in SUPPORTED_DEVICES check since
the DT compatible(/tmp/sysinfo/board_name) is not in SUPPORTED_DEVICES.
This should also fix errors when using ASU sysupgrade clients.
- Sync profile makefile target names with DT compatibles.
- Fix overwrites of SUPPORTED_DEVICES instead of appending.
- Adapt the uboot-sunxi profiles accordingly.
*bpi-p2-zero dts is still not upstream.
V2:
- Include fixes for arm926ejs(ARM926EJ-S) subtarget (LicheePi Nano and
PopStick v1.1) (profile rename for correct default SUPPORTED_DEVICES)
Fixes: https://forum.openwrt.org/t/luci-attended-sysupgrade-support-thread/230552/246
Fixes: https://github.com/openwrt/asu/issues/486
Fixes: https://github.com/openwrt/asu/issues/524
Fixes: 9aa66b8ce7 "sunxi: add support for Banana Pi M2 Berry"
Fixes: d5f615bf2a "sunxi: add support for Sinovoip Banana Pi M2 Plus"
Fixes: 3819c1638a "sunxi: Add support for Banana Pi M2 Ultra"
Fixes: 6bf8193b25 "sunxi: add support for Bananapi P2 Zero"
Fixes: 80edfaf675 "sunxi: add support for Banana Pi M3"
Fixes: 3c24a1d423 "sunxi: add support for NanoPi NEO Plus2 board"
Fixes: a689307c97 "sunxi: build image/uboot for the NanoPi NEO2"
Fixes: fde68cb809 "sunxi: add support for FriendlyARM NanoPi R1S H5"
Fixes: 3ec468ff4f "sunxi: add F1C100 (arm926ej-s) support"
Signed-off-by: Mario Andrés Pérez <mapb_@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21095
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for the Watchguard Firebox models
T10-W, T15 and T15-W.
CPU: Freescale P1010
RAM: 512MB (T10) / 1024MB (T15)
Flash: 1MB SPI-NOR, 512MB NAND (T10) / 1024MB NAND (T15)
WiFi: 802.11abgn 2T2R AR9582 based Mini-PCIe card (-W models only)
Ethernet: 3x GBE (via AR8033 PHY)
LEDs: 7x hard-wired (6x LAN, 1x Power)
4x GPIO single-colored (Attn/Status/Mode/Failover)
1x GPIO dual-colored (2.4/5G WiFi, -W models only)
Serial: RJ45, Cisco pinout, 115200/8N1
Other: Battery backed RTC
Atmel TPM 1.2 chip (unsupported)
Based on 35f6d79, which introduced Watchguard Firebox T10 support.
The T10 and T15 are identical hardware, with the exception of the T15
having twice the flash and RAM size.
The T10-W and T15-W models have their Mini-PCIe slot populated with an ath9
(AR9582) based WiFi card. The slot is either unpopulated or empty for
non-WiFi models. All required drivers are present by default on the mpc85xx
target, so T10/T10-W resp. T15/T15-W can use the same OpenWrt image.
This commit also introduces the zImage loader from 7d768a9 to boot the
kernel. This is required, since the U-Boot version used in these devices
appears to have a hard limit of 16MB for the kernel size it can handle. The
current kernel size is around 17MB, though, due to kernel page alignment
required for memory protection.
Installation (replaces previous instructions for T10):
1. If the U-Boot password is known, proceed with step 2.
If the U-Boot password is unknown, dump the NOR flash using a SPI
programmer and patch the unknown password to a known one. You can use
blocktrron's Python script:
https://github.com/blocktrron/t10-uboot-patcher/
This script will patch the password to '1234' (without quotes).
Alternatively, you can search for the hashed password in the NOR dump
yourself and overwrite it with a known one. The SHA1 hash is:
E597301A1D89FF3F6D318DBF4DBA0A5ABC5ECBEA
Write the patched NOR dump back to the device.
2. Connect the device via serial cable, power it on and interrupt
the boot process by pressing Ctrl+C. Enter the U-Boot password to access
the CLI.
3. (Optional) Populate the uboot-env partition by entering:
saveenv
This will allow you to use uboot-envtools from within OpenWrt later,
e.g. to increase the loadable kernel size.
The default loadable kernel size is 5MB, the compressed kernel size at
the time of this commit is 3.1MB.
4. Serve the initramfs OpenWrt image from a TFTP server at 10.0.1.13/24,
connected to eth0 (WAN) of the device. File name must be 'uImage'. Boot
with:
tftpboot; bootm;
Make sure to use the correct image for your device (T10 resp. T15)!
5. After booting, connect to OpenWrt on eth1 (LAN) via SSH. Verify
that the UBI partiton is mtd7, format it and install the sysupgrade
image.
$ cat /proc/mtd
$ ubiformat /dev/mtd7 -y
$ sysupgrade -n <path to sysupgrade.bin>
6. The device should now boot OpenWrt from NAND flash. Enjoy.
Back to stock:
Use the vendor recovery procedure.
Stock recovery might also be necessary in case you have accidentally used
the fw_setenv command from within OpenWrt without using saveenv in U-Boot
first.
In order to use the vendor firmware recovery procedure, the NAND partitions
mtd3 to mtd6 must remain intact. Make sure not to overwrite them, or keep
dumps of them for later recovery.
Signed-off-by: Shine <4c.fce2@proton.me>
Link: https://github.com/openwrt/openwrt/pull/16776
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
CONFIG_ARCH_STRICT_ALIGN=y (default in config-6.12) causes BPF programs
(XDP, TC, tracing, etc.) to fail verification with misaligned packet
and memory access errors, breaking essential kernel functionality.
Hardware support status:
- Supported (modern CPUs): 2K2000, 2K3000, 3A5000, 3A6000, 3C5000,
3C6000, 3D5000
- Unsupported (legacy): 2K500, 2K1000
The current default prioritizes legacy compatibility over:
1. BPF program functionality across multiple subsystems
2. Performance on widely deployed modern hardware
3. Modern kernel features relying on unaligned accesses
Since BPF programs require unaligned access capabilities and most
LoongArch deployments use modern CPUs with hardware support, disable
CONFIG_ARCH_STRICT_ALIGN. Legacy system users can manually enable
it if needed.
Link: https://github.com/vincentmli/BPFire/issues/69
Reference: https://elixir.bootlin.com/linux/v6.12/source/arch/loongarch/Kconfig#L534
Signed-off-by: Vincent Li <vincent.mc.li@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21121
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
On the smartrg sr505n the bootloader only sets registers to enable the
PHYs if it's interrupted. When Linux boots this results in a -EINVAL
error when trying to read from the EPHYs and the GPHY doesn't work.
This patch disables low power mode in the GPHY/EPHYs and properly resets
the EPHYs.
Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17648
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Hardware specification:
SoC: MediaTek MT7981B
Flash: ESMT F50L1G41LB 128MB
RAM: ESMT M15T2G16128A DDR3 256MB
Ethernet: 3x 1G
Button: Reset, WPS
MAC addresses
LAN: Label MAC (stored in Factory partition offset 0x1fef20)
WAN: LAN + 1
WiFi: LAN
Official LED layout, from left to right:
[power] [internet] [wps] [wifi] [lan3/2/1] [wan]
Redefinition for OpenWrt:
[power]: used for led-boot, led-failsafe, and led-running
[internet]: used for WAN RX/TX indication
[wps]: used for led-upgrade
[wifi] and [lan3/2/1]: unchanged
[wan]: used for WAN link indication
Installing OpenWrt:
- Setup a tftp server on your PC. Copy
xxx-preloader.bin, xxx-bl31-uboot.fip and
xxx-initramfs.itb to tftp root directory.
- Connect to the router via ssh or telnet,
username: useradmin, password is the web
login password of the router.
- Backup all critical flash partitions with
the following commands where x.x.x.x is
the IP of your PC.
IP=x.x.x.x
cd /dev
for d in /sys/class/mtd/mtd?; do
if [ "$(cat $d/name)" = "BL2" ]; then
tftp -l $(basename $d) -r bl2.img -p $IP
elif [ "$(cat $d/name)" = "FIP" ]; then
tftp -l $(basename $d) -r fip.bin -p $IP
elif [ "$(cat $d/name)" = "Factory" ]; then
tftp -l $(basename $d) -r factory.bin -p $IP
fi
done
for d in /sys/devices/virtual/ubi/ubi0/ubi0_*; do
[ "$(cat $d/name)" != "customer" ] && continue
tftp -l $(basename $d) -r customer -p $IP
break
done
- Flash with the following commands:
cd /tmp
tftp -r xxx-preloader.bin -g x.x.x.x
tftp -r xxx-bl31-uboot.fip -g x.x.x.x
mtd write xxx-preloader.bin spi0.0
mtd write xxx-bl31-uboot.fip FIP
mtd erase ubi
- Set a static ip(192.168.1.254) for your PC.
And then reboot the router. It will run
initramfs image automatically.
- After openwrt boots up, perform sysupgrade
via web UI.
Reverting to the vendor firmware:
- Setup a tftp server on your PC with ip
address 192.168.1.254. And make sure
bl2.img, fip.bin, factory.bin and customer
are located in tftp root directory.
- Power off the router.
- Press and hold WPS key, then power on
the router.
- Release WPS key, when internet/wifi/wps
leds are blinking.
- Wait until internet/wifi/wps leds light
up, power off the router.
- Press and hold reset key, power up the
router, release reset key 15s later.
- Connect to http://192.168.1.1, now you
can upload vendor .bin firmware.
Uboot netconsole:
Uboot netconsole can be enabled by WPS
or reset key.
- Setup a linux PC with ip 192.168.1.254.
Open a new terminal and execute
'stty -isig -echo cbreak; nc -lup 6666'
- Press and hold WPS(or reset) key, then
power on the router.
- Release key once internet/wifi/wps leds
are all on.
NOTE: don't hold the key more than 5s
after internet/wifi/wps leds on, or it
will try to revert to vendor firmware.
- 5s later, uboot bootmenu will show on
the terminal.
Signed-off-by: Zhiwei Cao <bfdeh@126.com>
Link: https://github.com/openwrt/openwrt/pull/18631
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Kebidumei AX3000-U22 is one of many clones of the same range extender
that can be found on Aliexpress or other Chinese portals.
The easiest way to identify this model is by searching for "AX3000
Repeater" and picking the device that looks like mine [0].
Specification:
- SoC: MediaTek MT7981B (1.3 GHz)
- RAM: 256 MB
- Flash: 16 MB SPI NOR
- Ports: 1 x 1 GbE
- Antenna: 6 (2 fake)
- WiFi: MediaTek dual-band WiFi 6
- 2.4 GHz: b/g/n/ax, MIMO 2x2
- 5 GHz: a/n/ac/ax, MIMO 2x2
- Buttons: Reset & WPS
- LEDs: Ethernet (green), Status (red, green, blue)
- Power: 110–240 V AC (internal PSU, board uses 12 V DC)
- Serial: unmarked connector on PCB
[1: Vcc, 2: RX, 3: TX, 4: GND]
Install via OEM web UI:
1. Use reset button to perform factory reset.
2. Connect PC to LAN port and obtain DHCP address.
3. Upload the sysupgrade image via OEM firmware upgrade page,
e.g. http://192.168.18.1/upgrade.html
4. After reboot, hold reset button to clear leftover vendor config.
Install via serial:
1. Connect serial console (115200 8N1).
2. Enter the console.
3. Backup mtd4 partition if you want to restore OEM FW later.
4. Download image.
5. Run 'sysupgrade -n'.
Revert to stock:
1. Run sysupgrade without keeping config using mtd4 backup.
[0] https://openwrt.org/_media/media/kebidumei_ax3000-u22.png
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20287
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for Keenetic KN-1812/Netcraze NC-1812
Device specification
--------------------
SoC Type: MediaTek MT7988D, Cortex-A73, 64-bit
RAM: 1024MB DDR4 Micron MT40A512M16TB-062E:R
Flash: SPI NAND Winbond W25N02KV (256 MiB)
Ethernet: 4x1GbE (internal MT7988 built-in) + 2.5GbE (internal MT7988 phy) + 10GbE (RTL8261BE)
WLAN: MT7992AV
WLAN 2g: MediaTek MT7975N, b/g/n/ax/be, MIMO 4x4
WLAN 5g: MediaTek MT7977B, a/n/ac/ax/be, MIMO 4x4
LEDs: 5 LEDs, 1 power green, 1 internet green,
2x fn green, 1 wlan green, gpio-controlled
Button: 4 (Reset, WPS, FN1, FN2)
USB port: Yes, 1xUSB3.2 and 1xUSB2.0 (via GL850G)
Power: 12 VDC, 3 A
Notes:
* The device supports dual boot mode
* Fn2 led reassigned to wlan 2.4
Flash instruction:
The only way to flash OpenWrt image is to use tftp recovery mode in U-Boot:
1. Configure PC with static IP 192.168.1.2/24 and tftp server.
2. a) Keenetic
Rename "openwrt-mediatek-filogic-keenetic_kn-1812-squashfs-factory.bin"
to "KN-1812_recovery.bin" and place it in tftp server directory.
b) Netcraze
Rename "openwrt-mediatek-filogic-netcraze_nc-1812-squashfs-factory.bin"
to "NC-1812_recovery.bin" and place it in tftp server directory.
3. Connect PC with ethernet port, press the reset button, power up
the device and keep button pressed until status led start blinking.
4. Device will download file from server, write it to flash and reboot.
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20737
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After having moved the configuration code and sequences from PHY and
DSA drivers to the PCS driver, add the hooks in PCS driver and remove
calls in PHY and DSA drivers to let PCS driver setup the SerDes
entirely on its own.
Also add pcs-handle to device tree definitions for most of the switch
ports because, due to the refactoring of the SerDes configuration, this
is needed now for all SerDes-attached ports.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The previous commit just imported some code as-is and commented it.
It needs heavy adjustments to compile and work within the PCS driver.
Do that now to that extent that it can be used within the driver. More
cosmetics and improvements will be done later.
Split the once-for-all SerDes configuration into the usual flow where
each SerDes is configured separately and on its own, as requested by the
PCS subsystem.
Move mode setting and patching into proper functions which are called
during SerDes configuration. Some configuration sequences are broken up
and moved into the SerDes configuration flow, e.g. reset sequences
because they were usually a single/few values applied to all SerDes at
once before.
Add proper configuration for SerDes 4 QSGMII to be able to setup this
mode properly on our own.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Import functions 'rtl8380_sds_rst', 'rtl8380_sds_power',
'rtl8380_configure_serdes' and 'rtl83xx_config_interface' from DSA and
PHY driver respectively but comment the code for now.
The code needs heavy adjustments to make it compile and work. To make
this as transparent as possible, do that in two stages.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In the PHY driver, firmware files were used to store configuration
values for the SerDes which need to be applied upon initialization.
There are several issues which prevent to just take that over into the
PCS driver:
* SerDes and PHY parts are mixed within a firmware file
* SerDes access in PHY driver is based on writing into the switch's
global register space; PCS driver uses access via MDIO interface
--> destination values do not match
* firmware file format is not SerDes-agnostic
* no documentation or script for the "old" firmware files
Unfortunately, there is no proper firmware format yet where to take over
the required sequences. Thus, extract the sequences needed for RTL838X
SerDes, transform them to work with the MDIO based access and put them
as functions in the PCS driver.
Note that this should just be a temporary solution. In a next step, a
proper firmware format should be established and all configuration
sequences currently in the code should be moved into firmware files.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add a new hook called 'init_serdes_common' to be able to perform
initialisations or anything else subject to all SerDes. This hook is
called in the end of 'rtpcs_probe' after everything else is done.
This is meant primarily to support the transition of RTL83XX from PHY
driver to PCS driver. Thus, it may be removed later again or kept if
there is sufficient need for this.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
