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Fil Dunsky d66966e480 uboot-mediatek: wl-wnt100x3: reduce ram speed to 1866 MT/s 
The vendor BL2 of the Wavlink WL-WNT100X3 initializes DDR3 at
1866 MT/s:

  NOTICE:  BL2: v2.7(release):292bca1-dirty
  NOTICE:  DDR3 1866MHZ
  NOTICE:  EMI: Using DDR3 settings

while the plain spim-nand-ddr3 BL2 used by the ubootmod variant runs
DDR3 at the default 2133 MT/s, which is above what the vendor
qualified on this board.

Switch the ubootmod BL2 to the existing DDR3 1866 MT/s build, in line
with the vendor firmware.

Tested on WL-WNT100X3: BL2 reports the ddr3-1866 build, the memory
test passes, U-Boot and OpenWrt boot from UBI.

Fixes: d2fabb974c ("mediatek: add support for Wavlink WL-WNT100X3 ubootmod")
Signed-off-by: Fil Dunsky <filipp.dunsky@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/25763
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-10-11 09:06:01 +02:00
Aleksei Sviridkin 244d2f67a5 mediatek: filogic: fix Keenetic phy0 MAC collision with LAN 
On the Keenetic MT7981 boards the LAN port takes its MAC from rf-eeprom
0x4, and mt76 reads the same slot for phy0. The 2.4 GHz radio and the
LAN port therefore share one address. Found on a Keenetic KN-1012 while
writing down its MAC map: eth0, br-lan and phy0 all read
d4:9c:53:xx:xx:a1.

This is the phy0 side of the collision fixed for phy1 in commit
cc96ed1e6d ("mediatek: filogic: fix Keenetic phy1 MAC collision"). Give
phy0 the slot with the LA bit set. The userspace VIF allocator keeps bit
7 of the first octet, so the extra phy0 VIFs stay apart from phy1 and
its VIFs, which have bit 7 flipped, and from the ethernet addresses,
which have the LA bit clear. With num_global_macaddr set, the allocator
adds to the base instead, and phy0 + 1 was the WAN address wherever the
0xa slot holds the base + 1, as on the KN-1012; that goes away too. The
2.4 GHz BSSID of these boards changes accordingly. On KAP-630 and
NAP-630 the ethernet port uses the 0xa slot instead, so there it only
changes the BSSID, and the family keeps one 2.4 GHz addressing
convention.

The Buddy 6 and Buddy 6 SE extenders (KN-3411, KN-4410, NC-3411,
NC-4410) have the same collision on their single port: on an NC-4410,
phy0-ap0 came up with d4:9c:53:xx:xx:23, the address its LAN has. They
only need the phy0 part. Their 0xa slot is empty (zeros on that unit),
so mt76 already derives phy1 as the family fixup does, 56:9c:53:xx:xx:23
there.

Tested on the KN-1012: phy0 comes up as d6:9c:53:xx:xx:a1 and phy1 stays
56:9c:53:xx:xx:a1. The VIF allocator hands phy0 d2/de/da and phy1
52/5e/5a in the first octet, none of them equal to the LAN or WAN
address. With two APs on phy0 and one on phy1, all bridged into br-lan,
every bridge port has its own local address.

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/25450
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-10-08 23:50:30 +02:00
Daniel Golle 6b84ce8a51 mediatek: filogic: add Adtran SDG-9000 
The Adtran SDG-9000 is a 10G PoE router in a white steel case with
optional 19" rackmount brackets.

Specifications:
 * MediaTek MT7988A (4x Cortex-A73)
 * 32 GB eMMC
 * 4 GiB DDR4 RAM
 * 1x 10000M/5000M/2500M/1000M/100M combo WAN: RJ45 (Marvell
   CUX3410 PHY) or SFP+ cage, selected at boot
 * 1x 10000M/5000M/2500M/1000M/100M LAN port (Marvell CUX3410 PHY)
 * 8x 2500M/1000M/100M/10M LAN ports with PoE+ (MaxLinear MxL86282
   switch with built-in PHYs), 200 W total PoE budget, two Skyworks
   Si3474 PSE controllers
 * 1x 1000M/100M/10M management port (MT7988 built-in PHY)
 * 240x240 TFT touchscreen (ST7789 SPI LCD with CST816S touch)
 * 1 button (Reset)
 * uC-controlled RGB LED via I2C
 * RGBW LED for each PoE LAN port, 2x LED for the management port,
   3x LED for each 10G port, 2x LED for the SFP+ cage
 * 2x PWM fan (mainboard, power supply)
 * USB 3.0 type A port
 * USB-C console port, 115200 baud, Holtek HT42B534 USB-UART bridge
 * 100-240V AC 50-60Hz power input, IEC 60320 C14 inlet

The WAN port is selected by a GPIO-controlled mux that has no runtime
control, so it is chosen by one of two device tree overlays, wan-phy
and wan-sfp, carried as configurations of the FIT image. The mux is
selected by setting boot_default_config in the U-Boot environment:

 config-1                                       no WAN port
 config-1#mt7988a-smartrg-sdg-9000-wan-phy      RJ45 (CUX3410)
 config-1#mt7988a-smartrg-sdg-9000-wan-sfp      SFP+ cage

MAC addresses (base MFG_MAC from the mfginfo partition; the nvmem
cell index in the DTS is added to the base):

 wan        xx:xx:xx:xx:xx:x0  MFG_MAC
 aux        xx:xx:xx:xx:xx:x0  MFG_MAC
 lan1-lan9  xx:xx:xx:xx:xx:x1  MFG_MAC + 0x1
 br-lan     xx:xx:xx:xx:xx:x1  MFG_MAC + 0x1

The label shows MFG_MAC. aux is the only port present when netifd
starts, as lan1-lan9 appear once the mxl862xx driver has loaded, so
br-lan would take the MAC of aux. board.d sets the MAC of br-lan to
that of lan1-lan9.

Installation:

1. Prepare a TFTP server at 192.168.1.254 and serve the OpenWrt
   initramfs image, renamed to "openwrt.500".
2. Connect to the Management/Auxilary port.
3. Connect to the USB-C console port (USB CDC-ACM, 115200 8n1)
4. Power on the device and type "st" to enter the U-Boot command
   line. The window to do that might be very short, so type it as
   soon as the "U-Boot ..." string appears.
5. Run "setenv boot_mode openwrt; saveenv" to boot from OpenWrt
   partition by default.
6. Run "bootmenu" and select option 6 (TFTP openwrt image and
   boot); "run boot5" is a shortcut for the same. This downloads
   openwrt.500 from the TFTP server and boots it.
7. After OpenWrt finishes booting, download the OpenWrt sysupgrade
   image and write it to eMMC using "sysupgrade".
8. After sysupgrade finishes writing, the device reboots into
   OpenWrt. When the System LED is solid white the device is ready
   for configuration.
9. To use the WAN port, set boot_default_config to one of the values
   above, e.g. from OpenWrt with
   "fw_setenv boot_default_config config-1#mt7988a-smartrg-sdg-9000-wan-sfp".

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 2026-10-07 00:03:51 +01:00
Daniel Golle c244bf6e86 mediatek: filogic: rename netdevs on hotplug 
The preinit hook that applies the label and openwrt,netdev-name DT
properties only sees the netdevs registered before it runs. The ethernet
driver of the SDG-9000 registers its netdevs about two seconds after
preinit has started, so they keep their ethN names.

Move the rename into a shared helper and call it from a hotplug net rule
as well, which handles netdevs registered once userland is up.

Also register the netdev rename for the preinit_netdev boot hook so that
netdevs registered while preinit is running get their DT name before the
preinit interface is configured.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 2026-10-07 00:03:51 +01:00
Daniel Golle 4766cee4b3 mediatek: mt7623: drop fbdev, fbcon and VT 
The Mediatek DRM driver drives the display here; fbdev core, the
framebuffer console, the fonts and the boot logo rode along on DRM fbdev
emulation. Drop them, and the virtual terminal layer that had nothing
left to bind to. kmscon in the video feed provides a terminal on the KMS
device for anyone who wants one back.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 2026-10-06 18:35:40 +01:00
John Audia db9616b9af kernel: bump 6.18 to 6.18.55 
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.18.55

Removed upstreamed:
  linux/generic/backport-6.18/707-v7.3-net-phylink-record-the-PHY-only-once-bringup-cannot-.patch[1]

All other patches automatically rebased via update_kernel.sh

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.55&id=4e7a4af364c2048bafb213bf0ef4a89dcbe1bfd4

Build system: x86/64
Build-tested: x86/64-glibc
Run-tested: x86/64-glibc

Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/25551
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 2026-10-04 15:57:54 +02:00
Edoardo Pinci 411a8112dd kernel: bump 6.18 to 6.18.53 
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.18.53

Removed upstreamed:
  target/linux/airoha/patches-6.18/160-v7.2-net-airoha-Reserve-RX-headroom-to-avoid-skb-realloca.patch [1]
  target/linux/airoha/patches-6.18/220-08-usb-host-add-ARCH_AIROHA-in-XHCI-MTK-dependency.patch [2]
  target/linux/ath79/patches-6.18/341-wifi-ath9k-obtain-system-gpios.patch [3]
  target/linux/bcm27xx/patches-6.18/0850-dmaengine-dw-axi-dmac-Wait-for-runtime-resume.patch [4]
  target/linux/econet/patches-6.18/040-v7.2-PCI-mediatek-Protect-root-bus-removal-with-rescan-lo.patch [5]
  target/linux/econet/patches-6.18/781-v7.3-net-dsa-mt7530-add-en7528-support.patch [6]
  target/linux/generic/backport-6.18/706-v7.2-bus-mhi-host-pci_generic-round-up-nr_irqs-to-a-power-of-two.patch [7]
  target/linux/generic/backport-6.18/751-v7.2-net-dsa-qca8k-add-support-for-force-mode-for-fixed-l.patch [8]
  target/linux/generic/backport-6.18/852-v7.1-rtc-cmos-use-platform_get_irq_optional.patch [9]
  target/linux/generic/backport-6.18/941-v7.2-net-dsa-realtek-rtl8365mb-add-support-for-rtl8367sb.patch [10]
  target/linux/generic/backport-6.18/946-v7.3-net-dsa-mt7530-populate-lpi_interfaces-to-fix-EEE-support.patch [11]
  target/linux/generic/backport-6.18/947-v7.3-net-ethernet-mtk_eth_soc-populate-lpi_interfaces-to-fix-EEE-support.patch [12]
  target/linux/ramips/patches-6.18/102-01-pwm-mediatek-set-mt7628-pwm45_fixup-flag-to-false.patch [13]
  target/linux/generic/hack-6.18/890-serial-8250-add-UPIO_AU-case-to-set_io_from_upio.patch [14]
  target/linux/generic/backport-6.18/895-v7.2-Bluetooth-btusb-Add-Mercusys-MA530-for-Realtek-RTL87.patch [15]

Manually rebased:
  target/linux/generic/pending-6.18/737-10-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch
  target/linux/ath79/patches-6.18/900-unaligned_access_hacks.patch
  target/linux/bcm27xx/patches-6.18/0372-i2c-designware-Add-support-for-bus-clear-feature.patch
  target/linux/econet/patches-6.18/310-usb-enable-econet-usb.patch

Added:
  target/linux/ath79/patches-6.18/341-wifi-ath9k-always-register-system-gpios.patch

All other patches automatically rebased via update_kernel.sh

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=20f46d0077f7a6d2f8078d0ed6a4c5a8062bea01
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=a5ff304195ca4c91425425136435fd2c3bde53ff
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=70d472076ce472b4ea605f06f14893eb17894720
4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=626e080d297db7996d6995620bb4eeebd928067e
5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=a568939487dcbc1a3e341208585e224be897e25e
6. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=fe997254b17dcaa19b7f559bc66730bc8cf1ad6f
7. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=05b9953e40d53acac86144a92724d4fab9ac5ac9
8. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=a726cc53424a6fdbd4e45e53b8e1d60a6ae75411
9. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=9811e2c321f779902a79bb0d9035a8848d8f0d39
10. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=f3e0f9c64a8557370437b961bb7e0425d87875db
11. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=3c367198e2e2825aae445497b3f7195329009aa1
12. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=9edd644864787a8c8ed24f6cdc20a652b4408726
13. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=b3674e8c01b36825879abff2f82697827b007a70
14. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=9f67997353caa29c6a080789a1fb6e01fb50c118
15. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.53&id=0f7f58ea629699c0fcd68fd01e41c2f6ac6c63d1

Build system: x86/64
Build-tested: mediatek/filogic
Run-tested: mediatek/filogic

Signed-off-by: Edoardo Pinci <epinci@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/25331
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 2026-10-01 00:49:54 +02:00
Daniel Golle de2f69bf89 treewide: drop the audio and display target features 
Both features describe an SoC family, which is the wrong granularity: a
mediatek/mt7623 board claims a display while a filogic board with a MIPI
DBI panel cannot, and rockchip claims audio for a NanoPi R2S as much as
for a Rock 5B. The audio-support and video-support packages carry that
information per image, and the modules depend on them.

Drop both features from every target that declares them.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 2026-09-29 15:29:43 +01:00
Daniel Golle e829091f34 video-support: add a package for display device handling 
The display target feature gates every DRM module, but it says nothing
useful: it is set on ten targets, so a mediatek/mt7623 board can have a
display while a filogic board with a MIPI DBI panel cannot, and rockchip
claims it for a NanoPi R2S as much as for a Rock 5B. Whether a board
drives a panel is a per-device choice, not a property of the SoC family.
The DRM and V4L2 nodes also end up 0600 root:root, so a display server
runs as root or not at all.

Add a video-support package which allocates the video and video-capture
groups and installs the hotplug rules for the DRM and V4L2 nodes, and
make the modules depend on it. The dependency is a plain one, not a
select, so the modules are offered once the feature is chosen. Targets
whose display drivers are built into the kernel carry the package in
DEFAULT_PACKAGES, since no module pulls it in for them, and the one
device profile that ships a DRM module on another target lists it
directly. DISPLAY_SUPPORT stays for now, so this changes no existing
selection.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 2026-09-29 15:29:43 +01:00
Frank WunderlichandWilfried Teiken 7a29a6bf6b mediatek: add support for BananaPi BPi-R4 Pro 4E 
The BPi-R4 Pro 4E is a Wi-Fi 7 router board based on the MT7988A SoC.

Difference to 8X is that board has only 4GB RAM and does not contain
the Aeonsemi 10G phys.
Wan port uses MT7988 internal 2.5GBit/s phy with no ethmux chip between
so it need overlays to switch between this wan-phy and SFP-Slot.

Specification
-------------

- SoC:          Mediatek MT7988A (4x Cortex-A73 @1.8GHz)
- RAM:          4GB DDR4
- Flash:        256MB SPI-NAND, 8GB eMMC, microSD Slot
- Switch:       MT7988A built-in switch, MxL86252C
- Ports:        9 ports, 8 usable simultaneously
        * 2x 1G RJ45 LAN
        * 4x 2.5G RJ45 LAN
        * 1x SFP (LAN)
        * 1x 2.5G RJ45/SFP Combo (WAN)
- Buttons:      Reset, WPS
- LEDs:         Power
- USB:          On-board VIA VL822 USB3.2/USB2.0 hub
        * 1x USB-A 2.0 connector
        * 1x USB-A 3.2 connector
        * 3x NGFF-KEYB
- PCIe:
        * 2x mini-PCIe slots with PCIe 3.0 2-lane interface
        * 2x M.2 M-Key slots with PCIe 3.0 1-lane interface (switchable
          PCIe signal with M.2 B-Key)
- Debug:        USB Type-C console port
- Power:        USB Type-C PD 20V or DC barrel connector

Note: This device comes without a MAC address programmed from the
factory. The randomly generated MAC is stored in the U-Boot env on first
boot and used persistently afterwards.

Installation
------------

Uncompress *sdcard.img.gz and write to microSD card, eg. using 'dd'. Use
bootloader menu on the serial console to install SPI-NAND once installed
to SPI-NAND you can used the bootloader menu to install to eMMC. See
instructions for BananaPi R4 for details.

Description is taken from 8X patch and changed to 4E variant.

R4Pro needed a patch for adding aliases to ensure right probe order so add
this here too.

Co-authored-by: Wilfried Teiken <wteiken@teiken.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
 2026-09-28 19:11:17 +01:00
Mikhail Zhilkin 3619b28006 mediatek: add OpenWrt UBI layout for ASUS RT-AX59U 
This commit implements the OpenWrt UBI layout for the ASUS RT-AX59U. The
primary goal is get working Kernel Address Space Layout Randomization
(KASLR). Additionally, this layout frees up ~6MB of extra storage space
for package installation.

Preparation
------------
Make a backup (from OpenWrt for stock bootloader):
* Backup partitions:
   apk update && apk add nand-utils
   nanddump /dev/mtd0 | gzip -1 -c > /tmp/mtd0_u-boot.bin.gz
   nanddump /dev/mtd1 | gzip -1 -c > /tmp/mtd1_UBI_DEV.bin.gz

* Backup nvram, Factory and Factory2 volumes:
   cat /dev/ubi0_0 > /tmp/nvram.bin
   cat /dev/ubi0_1 > /tmp/Factory.bin
   cat /dev/ubi0_2 > /tmp/Factory2.bin

* Copy backup from the /tmp dir on your router to a safe place using scp

Installation
------------
* Attach UART (see 'UART' section for details)

* Run mtkuartboot (see 'mtkuartboot recovery' section for details), exit
  the boot menu, and run:
   mtd erase ubi

* Run mtkuartboot again and write ubi bl2 and fip via the network, then
  reboot.

  Default tftp server ip: 192.168.1.254
  Default router ip:      192.168.1.1

* Load the ubi initramfs image via tftpboot and execute sysupgrade to
  write OpenWrt to spi-nand.

* Copy Factory backup to your router:
   scp -O Factory.bin root@192.168.1.1:/tmp

* Check factory volume index:
   ubinfo -a

* Prepare and write new factory ubi volume (substitute X with your
  factory volume index):
   dd if=/tmp/Factory.bin of=/tmp/factory.bin bs=1 count=$((0x65000))
   ubiupdatevol /dev/ubi0_X /tmp/factory.bin

UART
----
UART pins are silkscreened on PCB. Connection parameters:
115200, 8N1, 3.3V

U-Boot tftp recovery
--------------------
* Place OpenWrt ubi-initramfs-recovery.itb image on the tftp server (IP:
  192.168.1.254)

* Press reset button and power on the router. After ~10 sec release the
  button.

* Use OpenWrt initramfs system for recovery (for example, run sysupgrade)

mtkuartboot recovery
--------------------
Use mtk_uartboot and UART connetion for the installation or if BL2 or FIP
in UBI is destroyed:

Link: https://github.com/981213/mtk_uartboot

Start script:
'''
sudo ./mtk_uartboot \
  -p mt7986-ram-ddr4-bl2.bin \
  --aarch64 \
  -f openwrt-mediatek-filogic-asus_rt-ax59u-ubi-preloader.bin \
  -s /dev/ttyUSB0
picocom -b 115200 /dev/ttyUSB0
'''

Notes
-----
1. A simple installation without serial console is also possible using a
   fork of Daniel's UBI Installer (requires adaptation)
Link: https://github.com/dangowrt/owrt-ubi-installer

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/25278
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-09-28 14:54:09 +02:00
Mikhail Zhilkin 5484b15e87 mediatek: add wireless pre-calibration data for ASUS RT-AX59U 
Define the factory pre-calibration data partition at offset 0x1010 and
pass it to the wifi node via nvmem-cells. This ensures the mt7986
wireless hardware can properly utilize factory-calibrated RF settings.

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/25278
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-09-28 14:54:09 +02:00
Mikhail Zhilkin 9da1e7bee3 mediatek: fix UBI_DEV partition size for ASUS RT-AX59U 
Correct the UBI_DEV partition size from 252MB (0xfc00000) to 124MB
(0x7c00000). The previous value exceeded the physical limits of the
device, which features a 128MB flash chip.

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/25278
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-09-28 14:54:09 +02:00
Mikhail Zhilkin 152eac73c5 mediatek: increase SPI-NAND frequency for ASUS RT-AX59U 
Increase the spi-max-frequency from 20MHz to 52MHz for the SPI-NAND flash
on the ASUS RT-AX59U. The underlying Winbond W25N01KV chip natively
supports up to 104MHz, and the MediaTek MT7986A SoC safely handles 52MHz.

It's also 52 MHz in the stock U-Boot:
...
spi-max-frequency = <0x3197500>;
...

Testing with 'dd' reading 16MB from /dev/mtd1 shows a significant
performance improvement (~48% reduction in read time):

Before (20MHz):
256+0 records in
256+0 records out
real    0m 2.86s

After (52MHz):
256+0 records in
256+0 records out
real    0m 1.50s

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/25278
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-09-28 14:54:09 +02:00
Aleksei Sviridkin 492a0ff6b1 mediatek: filogic: add support for Netcraze NC-1012 
The Netcraze NC-1012 is a rebrand of the Keenetic KN-1012 with identical
hardware. The stock recovery accepts only images signed with the NC-1012
zyimage device id, taken here from the official NC-1012 recovery image.

It shares the KN-1012 device tree through the common dtsi and the copper
and SFP overlays, and the image recipe through the common device define,
following the KN-3411/NC-3411 pattern. The recovery procedure is the
KN-1012 one with the image named NC-1012_recovery.bin.

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24820
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-27 11:12:36 +02:00
Aleksei Sviridkin 87d7b11bd5 mediatek: filogic: add support for Keenetic KN-1012 
Keenetic KN-1012 is a 2.4/5 GHz band 11ax (Wi-Fi 6) router with a
combo SFP/copper port, based on MT7981B.

The copper side of the combo port does not come up on this tree yet. It
needs the pending phylink change that defers the PHY attach for PHYs
marked needs-host-firmware until their driver has bound,
https://lore.kernel.org/r/20260914211137.2760618-1-f@lex.la/, and that
property on the PHY node, which goes in together with the change.
Everything else on the board, the SFP side of the same port included,
works without them.

Specification:

- SoC             : MediaTek MT7981B
- RAM             : 512 MiB
- Flash           : SPI-NAND 256 MiB (chip varies by production run,
                    Fudan Micro FM25G02B seen)
- WLAN            : 2.4/5 GHz 2T2R (MediaTek MT7981B (SoC))
- Ethernet        : 4x 10/100/1000 Mbps + 1x combo port
  - switch        : MediaTek MT7531
  - combo port    : SFP cage and an Airoha EN8811H 2.5G copper PHY
                    share one SerDes, selected by a GPIO mux
- USB             : USB 2.0 through a GL850G-OHY60 hub, two switchable
                    power rails
- LEDs/Keys (GPIO): 6x/4x
- UART            : through-hole on PCB (J500), unconfirmed
  - assignment    : 5V, TX, RX, NC, GND
  - settings      : 115200n8
- Power           : 12 VDC, 2.5 A, center positive

The vendor bootloader stays in place, so U-Boot is chainloaded from it
as the payload it accepts as a kernel. It reads the GPIO reporting
whether an SFP module is present and boots the device tree matching the
medium, so one image serves both the copper PHY and the SFP cage. The
chainloader itself is wrapped into a FIT shaped like the vendor kernel
image, kernel@1 / fdt@1 / config@1 with the "Linux 4.9" description,
because the stock loader accepted a payload generated by mkits.sh with
its default node names and descriptions but never ran it. Both vendor
firmware slots (firmware_1, storage_a, firmware_2, storage_b) are
concatenated into one virtual flash, its first 8 MiB the kernel
partition and the rest UBI, so the second slot no longer holds a vendor-
bootable image; u-state stays read-only. The factory image is bounded to
the first firmware slot, where the stock recovery writes it; whether the
recovery writes past that slot is untested.

Flash instruction using the vendor recovery mode:

1. Connect the TFTP host to one of the LAN ports, address 192.168.1.2
2. Rename the factory image to "KN-1012_recovery.bin" and put it in
   the TFTP directory
3. Power off the device, hold the "Reset" button, power it on and keep
   the button held for ~10 seconds
4. The bootloader downloads the image over TFTP and writes it to flash
5. Wait for the device to reboot, it comes up on 192.168.1.1

Reverting to stock image:

1. Download the official recovery package for the model and take the
   .bin image out of it
2. Follow the same steps as above with that image in place of the
   OpenWrt one

MAC addresses:

  use   source
  LAN   rf-eeprom 0x4
  WAN   rf-eeprom 0xa, also the address on the label
  2g    rf-eeprom 0x4, the first MAC slot of the WiFi EEPROM
  5g    rf-eeprom 0x4 with the locally administered bit set and bit 7
        flipped

Left alone, mt76 would read the second EEPROM slot at 0xa for phy1
and collide with the WAN address, so the board joins the Keenetic
family entry in 11_fix_wifi_mac, which derives phy1 from the 0x4 slot
the way mt76 would on its own: LA bit set, bit 7 flipped.

The P and N of the SerDes lane from the switch to the EN8811H are
swapped on this board, like on the BPI-R3 mini, so the copper PHY node
sets rx-polarity to PHY_POL_INVERT, the current form of the
airoha,pnswap-rx property the BPI-R3 mini still carries. Without it the
copper side links up at any speed but transmits nothing, while receive
works.

The copper PHY's INTB is on pio 0 and the PHY node declares it; the
vendor tree hangs the same line on the switch node and calls it level
low. This uses edge falling, as the BPI-R3 mini does for its EN8811H
PHYs. On this tree the line is not used yet: phylib sets phydev->irq to
PHY_POLL when the port attaches the PHY with the generic driver still
bound at switch probe, and nothing restores it when the EN8811H driver
binds later. With the phylink change named at the top and the phylib
change that keeps the interrupt across the driver swap,
https://lore.kernel.org/r/20260919015326.499479-1-f@lex.la/, forced
renegotiations on this board delivered the link-down and link-up events
over INTB and left no interrupt unhandled.

The copper port stays down on this tree because the switch attaches the
PHY at probe, before the EN8811H driver can load its firmware from the
root filesystem, and phylink refuses 2500base-x against the generic
driver, so DSA drops the port. The copper results above were taken with
the phylink change named at the top applied; SFP, lan1 to lan3, WAN and
wifi do not depend on it. The SFP side was booted with a DAC in the
cage: the loader picked the SFP configuration, the module EEPROM read
over I2C, lan4 came up over the cage without the PHY race and the cage's
indicator LED lit; on copper that LED stays off. Link and traffic over
the SFP path stand on the earlier two-tree form of the image, 1 Gbit/s
against a 1 Gbit/s partner, with the module pulled bringing the board
back on copper.

The board support (pin map, SFP node, copper PHY description, image
recipe parameters and LED assignments) is based on the out-of-tree port
by Maxim Anisimov, branch main_keenetic_kn1012 of Linaro1985/openwrt.
The chainloader and the U-Boot side are new relative to that port, as
is the split into a shared dtsi with a device tree overlay per medium,
which the chainloader applies.

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24820
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-27 11:12:36 +02:00
Chukun Pan 7e2bacd43f mediatek: add TP-Link TL-7DR7250 v1 support 
Hardware specification:
  SoC: MediaTek MT7988D 3x A73
  Flash: ESMT F50L1G41LB 128MB
  RAM: NT5AD256M16E4 DDR4 512MB
  Ethernet: 2x 2.5G + 2x 1G Lan
  WiFi1: MT7975N 2.4GHz 4T4R
  WiFi2: MT7979N 5GHz 4T5R
  Button: Reset, WPS
  Power: DC 12V 2A

MAC addresses map:
   LAN 4C:xx:xx:xx:xx:57
   WAN 4C:xx:xx:xx:xx:58
   2G  4C:xx:xx:xx:xx:57
   5G  4C:xx:xx:xx:xx:59

Flash instructions:
  1. Connect to your PC via the Gigabit port of the router,
     set a static ip on the ethernet interface of your PC.
     (ip 192.168.1.254, gateway 192.168.1.1)

  2. Execute the following operation to open nc shell:
     https://forum.openwrt.org/t/tp-link-china-routers-rce-vuln

  3. Download the preloader.bin and uboot.fip, host them with
     the HTTP server: python3 -m http.server

  4. Replace the stock bootloader to OpenWrt's:
     ln -sf opt/game_acc/rootfs/bin/busybox wget && cd tmp
     /wget http://192.168.1.254:8000/openwrt-mediatek-filogic-tplink_tl-7dr7250-v1-preloader.bin
     /wget http://192.168.1.254:8000/openwrt-mediatek-filogic-tplink_tl-7dr7250-v1-bl31-uboot.fip
     dd bs=131072 conv=sync of=/dev/mtdblock15 if=openwrt-mediatek-filogic-tplink_tl-7dr7250-v1-preloader.bin
     dd bs=131072 conv=sync of=/dev/mtdblock15 seek=44 if=openwrt-mediatek-filogic-tplink_tl-7dr7250-v1-bl31-uboot.fip

  5. Download the initramfs image, host it with the tftp server,
     and restart the router, waiting for tftp recovery to complete.

  6. After openwrt boots up, upload sysupgrade.bin to upgrade.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/24200
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-27 10:32:14 +02:00
Chukun Pan 820662d917 mediatek: add TP-Link TL-7DR7230 v2 support 
Hardware specification:
  SoC: MediaTek MT7988D 3x A73
  Flash: Dosilicon DS35Q1GB-IB 128MB
  RAM: Zentel A3T4GF40BBF DDR3 512MB
  Ethernet: 1x 2.5G Wan, 4x 1G Lan
  WiFi1: MT7975N 2.4GHz 4T4R
  WiFi2: MT7979N 5GHz 4T5R
  Button: Reset, WPS
  Power: DC 12V 2A

MAC addresses map:
   LAN 80:xx:xx:xx:19:FE
   WAN 80:xx:xx:xx:19:FF
   2G  80:xx:xx:xx:19:FE
   5G  80:xx:xx:xx:1A:00

Flash instructions:
  1. Connect to your PC via the Gigabit port of the router,
     set a static ip on the ethernet interface of your PC.
     (ip 192.168.1.254, gateway 192.168.1.1)

  2. Execute the following operation to open nc shell:
     https://forum.openwrt.org/t/tp-link-china-routers-rce-vuln

  3. Download the preloader.bin and uboot.fip, host them with
     the HTTP server: python3 -m http.server

  4. Replace the stock bootloader to OpenWrt's:
     ln -sf opt/game_acc/rootfs/bin/busybox wget && cd tmp
     /wget http://192.168.1.254:8000/openwrt-mediatek-filogic-tplink_tl-7dr7230-v2-preloader.bin
     /wget http://192.168.1.254:8000/openwrt-mediatek-filogic-tplink_tl-7dr7230-v2-bl31-uboot.fip
     dd bs=131072 conv=sync of=/dev/mtdblock15 if=openwrt-mediatek-filogic-tplink_tl-7dr7230-v2-preloader.bin
     dd bs=131072 conv=sync of=/dev/mtdblock15 seek=44 if=openwrt-mediatek-filogic-tplink_tl-7dr7230-v2-bl31-uboot.fip

  5. Download the initramfs image, host it with the tftp server,
     and restart the router, waiting for tftp recovery to complete.

  6. After openwrt boots up, upload sysupgrade.bin to upgrade.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/24200
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-27 10:32:13 +02:00
Chukun Pan af8ba9b426 mediatek: add TP-Link TL-7DR7230 v1 support 
Hardware specification:
  SoC: MediaTek MT7988D 3x A73
  Flash: ESMT F50L1G41LB 128MB
  RAM: GDQ2BFAA-CJ DDR4 512MB
  Ethernet: 1x 2.5G Wan, 4x 1G Lan
  WiFi1: MT7975N 2.4GHz 4T4R
  WiFi2: MT7979N 5GHz 4T5R
  Button: Reset, WPS
  Power: DC 12V 2A

MAC addresses map:
   LAN 4C:xx:xx:xx:xx:A7
   WAN 4C:xx:xx:xx:xx:A8
   2G  4C:xx:xx:xx:xx:A7
   5G  4C:xx:xx:xx:xx:A9

Flash instructions:
  1. Update 7dr7230mv1-middleware.bin in vendor uboot

  2. Update factory.bin in the middleware firmware

  3. After openwrt boots up, install kmod-mtd-rw and
     execute: insmod mtd-rw i_want_a_brick=1

  4. Replace the stock bootloader to OpenWrt's:
     mtd write openwrt-mediatek-filogic-tplink_tl-7dr7230-v1-preloader.bin bl2
     mtd write openwrt-mediatek-filogic-tplink_tl-7dr7230-v1-bl31-uboot.fip fip

  5. Run the following command to remove the OEM UBI volume:
     ubirmvol /dev/ubi0 -N kernel
     ubirmvol /dev/ubi0 -N rootfs
     ubimkvol /dev/ubi0 -N ubootenv -s 1MiB
     ubimkvol /dev/ubi0 -N ubootenv2 -s 1MiB

  6. Upload sysupgrade.bin to perform the upgrade.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/24200
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-27 10:32:13 +02:00
Chukun Pan 4dd69c754f mediatek: add Dosilicon DS35Q1GB-IB support 
Add the DS35Q1GB flash driver from the Rockchip kernel.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/24200
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-27 10:32:13 +02:00
Mikhail Zhilkin ea78c9d915 mediatek: increase SPI-NAND frequency for Mercusys MR90X v1 
Increase the spi-max-frequency from 20MHz to 52MHz for the SPI-NAND flash
on the Mercusys MR90X v1. The underlying GigaDevice GD5F1GQ5UEYIGY
SPI-NAND flash chip natively supports clock speeds up to 133MHz and the
MediaTek MT7986B SoC handles 52MHz safely.

Testing with 'dd' reading 16MB from /dev/mtd3 shows a significant
performance improvement (~49% reduction in read time):

Before (20MHz):
256+0 records in
256+0 records out
real    0m 2.71s

After (52MHz):
256+0 records in
256+0 records out
real    0m 1.37s

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/25246
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 2026-09-26 22:14:46 +02:00
Ryan Leung d733b2148c mediatek: filogic: comfast cf-wr632ax: replace label with openwrt,netdev-name 
Replace the label property for ethernet interface names with the property openwrt,netdev-name added
in commit d4d6c48b6e ("mediatek: filogic: support openwrt,netdev-name for renaming interfaces").

Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/22936
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-25 10:13:17 +02:00
Ryan Leung 8060e1d568 mediatek: filogic: comfast cf-wr632ax: adjust fan behavior & monitor Wi-Fi temps 
Add thermal zone for the Wi-Fi chip using the same trip levels and cooling maps as the CPU. The
kernel thermal governor will act on whichever temperature is the highest. There is only a single
heatsink and fan to cover both the SoC and Wi-Fi chip, so tracking both CPU and Wi-Fi temperatures
ensures that neither chip will overheat from low fan speed.

The trip levels are spaced 1.25C apart with double that (2.5C) for the hysteresis, with 5C
hysteresis for the lowest trip level (65C) because it is preferable for the fan to run for longer at
low speed than to stop and start repeatedly.

In the absence of continuous proportional feedback control, tightly grouping the trip levels and
cooling maps minimises the frequency and amplitude of temperature and fan speed oscillations.

The cooling states are set to increments of 5 (out of 255) from 12% to 61% and then increments of 10
from 61% to 100% with kick start speed at 15%. In comparison, the default in mt7981b.dtsi starts at
50% fan speed and leads to constant on/off cycles within a short period of time (every ~2 minutes).

Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/22936
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-25 10:13:17 +02:00
Ryan Leung 5feb530ed3 mediatek: filogic: add dtsi for shared thermal trip levels & cooling maps 
Add a common dtsi with macros for thermal trip levels and cooling maps that can be included in other
device trees.

The trip levels are spaced 1.25C apart with double that (2.5C) for the hysteresis, with 5C
hysteresis for the lowest trip level (65C) because it is preferable for the fan to run for longer at
low speed than to stop and start repeatedly.

In the absence of continuous proportional feedback control, tightly grouping the trip levels and
cooling maps minimises the frequency and amplitude of temperature and fan speed oscillations.

There are 36 trip levels and the cooling maps start from cooling state 1 (0-index) so cooling-levels
must have at least 37 elements. If greater increments between trip levels/cooling-levels are desired
or needed the cooling-levels can be padded with repeated values.

The THERMAL_TRIPS_COMMON and THERMAL_COOLING_MAPS_COMMON macros take one argument as the prefix to
the trip levels node labels. The prefix must be the same within a thermal zone.

Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/22936
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-25 10:13:17 +02:00
Ivan RainboltandClaude Opus 5 bafaf2665a mediatek: filogic: light the Internet LED on Cudy WR3000S v1 
The WR3000S has a GPIO LED behind its front-panel "Internet" lamp
(white:wan-online, &pio 11), but no board.d entry, so no trigger is ever
set and the lamp stays dark. Give it the same netdev trigger the WR3000H
and WR3000P already use for their white:wan-online LED: follow the link
state of the wan port. As on those boards, "link" means the wan port has
carrier, not that connectivity works.

The panel's WAN and LAN1-4 lamps are not GPIO LEDs and are not registered
as Linux LEDs at all; they light on link in hardware, so board.d cannot
address them and they are untouched here. The -ubootmod variant includes
the same mt7981b-cudy-wr3000s-v1.dtsi, and so the identical LED, and is
listed alongside.

Tested on a WR3000S v1 (OEM layout), on an image built from main at
6727587d24 plus this commit: after a config-wipe sysupgrade the board.d
entry is applied automatically (board.json -> system.led_internet), the
lamp lights while the WAN port has link, and it goes dark when it loses
link. Only the OEM-layout variant was flashed.

Signed-off-by: Ivan Rainbolt <ivan@github.ivanthegeek.com>
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Link: https://github.com/openwrt/openwrt/pull/25335
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-09-24 19:03:54 +02:00
Aleksei Sviridkin e1520c0619 mediatek: filogic: add support for Netcraze NC-4410 (Buddy 6 SE) 
The Netcraze NC-4410 is a rebrand of the Keenetic KN-4410 (Buddy 6 SE)
with identical hardware, mirroring the existing KN-3411/NC-3411 pair.
Reuse the shared .dtsi and add the per-brand model/compatible and the
NC-4410 zyimage device id (0xC04410).

Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/23727
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-20 11:20:13 +02:00
Aleksei Sviridkin ab933b98aa mediatek: filogic: add support for Keenetic KN-4410 (Buddy 6 SE) 
The Keenetic KN-4410 (Buddy 6 SE) is a Wi-Fi 6 range extender built on
the same MT7981B hardware as the KN-3411 (Buddy 6): identical RAM, the
single 1GbE port, internal 2x2 dual-band radio and SPI-NAND. The vendor
device tree differs from the KN-3411 only in the model string, so reuse
the KN-3411 .dtsi and add just the per-model compatible and the firmware
image id (0x804410, the Keenetic zyimage device id for this model).

Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/23727
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-20 11:20:12 +02:00
Aleksei Sviridkin 110adce473 mediatek: filogic: add support for Netcraze NC-3411 (Buddy 6) 
The Netcraze NC-3411 is a rebrand of the Keenetic KN-3411 (Buddy 6)
with identical hardware. The stock recovery accepts only images signed
with the NC-3411 zyimage device id, taken here from the signature of
the official NC-3411 firmware.

Split the KN-3411 device tree into a common .dtsi with per-brand
model/compatible files and share one image recipe through a common
device define, following the existing KN-1812/NC-1812 pattern.

Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/23727
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-20 11:20:12 +02:00
Aleksei Sviridkin f06e31004f mediatek: filogic: add support for Keenetic KN-3411 (Buddy 6) 
Keenetic Buddy 6 (KN-3411) is a dual-band Wi-Fi 6 mesh extender based on
the MediaTek MT7981B (Filogic 820).

Specifications:
- SoC: MediaTek MT7981B
- RAM: 256 MiB
- Flash: 128 MiB SPI-NAND (Winbond W25N01GV or HeYangTek
  HYF1GQ4UDACAE, varies by unit)
- WiFi: MT7981 2x2, 2.4 GHz + 5 GHz (Wi-Fi 6)
- Ethernet: 1x 1GbE (MT7981 internal GbE PHY)
- LEDs: status (green), WLAN 2.4 GHz (red), WLAN 5 GHz (blue)
- Button: reset
- UART: 115200 8n1 on the on-board header

MAC addresses:
- eth0 (the single 1GbE port): rf-eeprom factory partition at offset 0x4
  (DTS nvmem cell macaddr_factory_4); Keenetic OUI 50:ff:20:xx:xx:xx.

Installation: flash the factory image via the Keenetic recovery / U-Boot
"Upgrade firmware" (zyimage, device id 0x803411). The layout follows the
existing Keenetic MT7981 family: dual firmware slots concatenated into a
single UBI volume.

The board LED/button GPIO map is not published anywhere. The stock
device tree carries no LED or key nodes, and the map is compiled into
the vendor 'phr' kernel module, shipped as a prebuilt per-model blob;
it only reads an optional /phr-pins/<model> node when one is present,
and the device has no such node. The values here were confirmed on
hardware.

Based on the reverse-engineering in #15551 by Maxim Anisimov, rewritten
against current master. The tested unit ships a Winbond W25N01GV
(already supported in-tree); the NAND chip varies by unit without a PCB
revision marker, so the HeYangTek HYF1GQ4UDACAE driver from that PR is
left to a separate change.

Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/23727
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-20 11:20:12 +02:00
Aleksei Sviridkin 2ff6d12554 generic: restore EEE support on mt753x and mtk_eth_soc 
Both drivers implement the phylink tx_lpi methods but never fill
phylink_config.lpi_interfaces, so phylink decides at creation time
that the MAC does not support EEE and locks userspace out of enabling
it. On mt753x that has been the state since the conversion to phylink
managed EEE; on mtk_eth_soc since EEE was added there, which was
already in managed form.

Both fixes are in net:
https://git.kernel.org/netdev/net/c/3c18e3c9a54e
https://git.kernel.org/netdev/net/c/d876c9cb2d16

The mtk_eth_soc fix is taken as upstream applied it. The mt7530 one is
adapted: upstream guards the block with an extra priv->id != ID_EN7528
arm, and that symbol only exists once econet's local EN7528 patch adds
it, so the generic backport drops the arm and the patch header records
that. The mtk_eth_soc fix lands ahead of three patches that touch the
same part of mtk_add_mac and the same capability enum, so 737-10,
795-05 and the mt7987 platform patch are refreshed for it; 795-05 also
loses a declaration hunk that this fix makes redundant. Seven more
mtk_eth_soc patches (702, hack 730, 732-00, 732-03, 737-09, 738-01 and
795-04) are refreshed for hunk offsets only.

The mtk_eth_soc fix fills lpi_interfaces only on SoCs carrying a new
MTK_GMAC_EEE capability, and only MT7981 sets it: the LPI wake-up times
the driver programs are borrowed from MT7531 and have been measured on
MT7981 alone, so the other SoCs keep EEE unreachable until someone
confirms them.

The econet EN7528 patch is rebased on top of the mt7530 fix: both
rewrite the same block in mt753x_phylink_get_caps(), and generic
applies first, so the EN7528 guard now sits on the reworked condition.
The behavior for EN7528 is unchanged: its LPI capabilities stay empty
and phylink keeps EEE disabled there.

Tested on an MT7981B board with an MT7531 switch: ethtool sees EEE on
every port where it saw nothing before, enabling it negotiates EEE
against a partner that advertises it, and a port whose partner does
not advertise settles at "enabled - inactive".

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24863
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-20 10:38:57 +02:00
Filip Milivojevic 4858ed9dbd mediatek: filogic: add support for Cudy P2 v1 
This commit adds support for the Cudy P2 v1, a router with integrated 5G modem.

The device is similar to Cudy WR3000E v1.

SoC: MediaTek MT7981 WiSoC
RAM: 256MB DDR3
Flash: 128MB SPI-NAND
Wireless: Mediatek MT7981 2x2 DBDC 802.11ax (2.4 / 5)
5G Modem: Quectel RG500U-EB
Ethernet: 1 WAN/LAN GbE, 1 LAN GbE

MAC Addresses in OpenWrt:
Interface lan: factory mac address
Interface wan: factory mac address +1
Wifi 2.4GHz: factory mac address
Wifi 5GHz: factory mac address with local bit set

GPIO:
- 1 Button:
  - Reset on GPIO 1
- 5 Software switches:
  - voippwr on GPIO 4 active low
  - voip_volte on GPIO 5 active low
  - 5gpwr on GPIO 6 active low
  - ant on GPIO 7 active high
  - usb5g on GPIO 8 active high
- 8 LEDs:
  - Power: white on GPIO 2 active high
  - Internet: white on GPIO 14 active high
  - Internet: yellow on GPIO 15 active high
  - Internet: red on GPIO 26 active high
  - WLAN: white on GPIO 13 active high
  - Mobile: white on GPIO 30 active low
  - Mobile: yellow on GPIO 28 active high
  - Mobile: red on GPIO 27 active high

Disassembly:
- Remove two screws hidden behind the rubber stand.
- Remove center solid plastic circle with a spudger and remove four screws.
- Slide the interior with the board up.

UART:
- UART pads are accessible on the bottom of the board and labeled
- Solder three pins: GND, RX, TX, do not connect 3V3 pin
- Settings: 115200 8N1 3.3V

5G Modem:

Quectel RG500U-EB is soldered on board and connected via
USB 2.0 High Speed at 480Mb/s and PCIe v2 x1 at 5GT/s.

The modem is usable with upstream drivers only via PPP mode using the ttyUSB2 AT port.

The modem doesn't provide access via USB rndis_host or cdc_ncm - it should work by sending the following commands:
- AT+QCFG="ethernet",0
- AT+QCFG="usbnet",5 (for NCM or 3 for RNDIS or 1 for ECM)
- AT+QCFG="nat",0
- rebooting the modem via AT+CFUN=1,1 and rebooting the device.

It appears that the firmware is locked down and doesn't want to change the configuration and enable usb networking.

It is possible to use vendor sprd_pcie driver and use virtual PCIe network interface by sending the commands:
- AT+QCFG="ethernet",1
- AT+QCFG="nat",0
- rebooting the modem via AT+CFUN=1,1 and rebooting the device.

Connection via USB and PCIe network interface should work (but doesn't work via USB) using:
- AT+QICSGP=1,3,"apnname","username","password",3
- AT+QNETDEVCTL=1,1,1

Migration to OpenWrt using TFTP:
- Connect UART as described above
- Press the reset button while powering on the device
- U-Boot will now try to load a recovery.bin via TFTP, this must be ignored
- After detecting a timeout, the U-Boot console is available via UART
- Set up a TFTP server on IP 192.168.1.88 and connect it to one of the LAN ports
- Provide the initramfs image via TFTP as cudyp2.bin
- Run the following command in U-Boot: tftpboot 0x46000000 cudyp2.bin; bootm 0x46000000
- OpenWrt initramfs image is now booting and accessible via 192.168.1.1
- Flash the sysupgrade image

Revert back to OEM:
- Set up a TFTP server on IP 192.168.1.88 and connect it to one of the LAN ports
- Provide the Cudy firmware via TFTP as recovery.bin
- Press the reset button while powering on the device
- Recovery process will start now
- After recovery is done, the OEM firmware is available at 192.168.10.1 again

Migration to OpenWrt via OEM firmware:
- There should be a migration image available from Cudy as soon as there is official OpenWrt support
- Download the migration image via OEM web interface
- After flashing, OpenWrt is accessible via 192.168.1.1
- Flash the official OpenWrt image

Signed-off-by: Filip Milivojevic <zekica@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23721
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-18 09:17:19 +02:00
John Audia ddbf9c8557 kernel: bump 6.18 to 6.18.52 
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.18.52

Removed upstreamed:
  linux/airoha/patches-6.18/109-02-v6.19-pinctrl-airoha-convert-PHY-LED-GPIO-to-macro.patch[1]
  linux/airoha/patches-6.18/109-03-v6.19-pinctrl-airoha-convert-PWM-GPIO-to-macro.patch[2]
  linux/airoha/patches-6.18/109-05-v6.19-pinctrl-airoha-add-support-for-Airoha-AN7583-PINs.patch[3]
  linux/airoha/patches-6.18/111-v6.19-wifi-mt76-Introduce-the-NPU-generic-layer.patch[4]
  linux/airoha/patches-6.18/113-v6.19-pinctrl-airoha-Fix-AIROHA_PINCTRL_CONFS_DRIVE_E2.patch[5]
  linux/airoha/patches-6.18/180-03-v7.2-pinctrl-airoha-an7583-add-missed-gpio32-pin-group.patch[6]
  linux/airoha/patches-6.18/180-05-v7.2-pinctrl-airoha-an7583-fix-misprint-in-gpio19-pinconf.patch[7]
  linux/airoha/patches-6.18/180-06-v7.2-pinctrl-airoha-an7581-fix-incorrect-led-mapping-in-p.patch[8]
  linux/airoha/patches-6.18/180-07-v7.2-pinctrl-airoha-an7583-fix-incorrect-led-mapping-in-p.patch[9]
  linux/airoha/patches-6.18/180-08-v7.2-pinctrl-airoha-fix-pwm-pin-function-for-an7581-and-a.patch[10]
  linux/airoha/patches-6.18/180-09-v7.2-pinctrl-airoha-an7583-fix-gpio21-pin-group.patch[11]
  linux/airoha/patches-6.18/180-10-v7.2-pinctrl-airoha-an7583-add-missed-gpio22-pin-group.patch[12]
  linux/airoha/patches-6.18/180-11-v7.2-pinctrl-airoha-an7583-fix-phy1_led1-pin-function.patch[13]
  linux/airoha/patches-6.18/180-12-v7.2-pinctrl-airoha-an7583-remove-undefined-groups-from-p.patch[14]
  linux/airoha/patches-6.18/202-01-v7.3-pinctrl-airoha-fix-mdio-bitfield-names.patch[15]
  linux/airoha/patches-6.18/202-02-v7.3-pinctrl-airoha-an7581-fix-pinconf-of-i2c_scl-i2c.patch[16]
  linux/airoha/patches-6.18/202-03-v7.3-pinctrl-airoha-an7583-fix-I2C0_SDA_PD-register-b.patch[17]
  linux/airoha/patches-6.18/202-04-v7.3-pinctrl-airoha-an7581-fix-mux-conf-of-pcie_reset.patch[18]
  linux/airoha/patches-6.18/202-05-v7.3-pinctrl-airoha-an7583-fix-muxing-of-non-gpio-def.patch[19]
  linux/airoha/patches-6.18/202-09-v7.3-pinctrl-airoha-an7583-fix-spi-group-pins.patch[20]
  linux/airoha/patches-6.18/202-10-v7.3-pinctrl-airoha-add-missed-get_direction-function.patch[21]
  linux/airoha/patches-6.18/202-13-v7.3-pinctrl-airoha-fix-getting-gpiochip-pinctrl-poin.patch[22]
  linux/airoha/patches-6.18/202-14-v7.3-pinctrl-airoha-add-missed-IRQ-resource-helpers.patch[23]
  linux/airoha/patches-6.18/202-15-v7.3-pinctrl-airoha-fix-IRQ-mask-unmask-code.patch[24]
  linux/airoha/patches-6.18/202-16-v7.3-pinctrl-airoha-fix-edge-triggered-interrupts-han.patch[25]
  linux/apm821xx/patches-6.18/100-powerpc-44x-Set-GPIO-chip-firmware-node.patch[26]
  linux/econet/patches-6.18/042-01-v6.19-pinctrl-airoha-convert-PHY-LED-GPIO-to-macro.patch[27]
  linux/econet/patches-6.18/042-02-v6.19-pinctrl-airoha-convert-PWM-GPIO-to-macro.patch[28]
  linux/econet/patches-6.18/042-03-v6.19-pinctrl-airoha-add-support-for-Airoha-AN7583-PINs.patch[29]
  linux/econet/patches-6.18/042-04-v6.19-pinctrl-airoha-Fix-AIROHA_PINCTRL_CONFS_DRIVE_E2.patch[30]
  linux/realtek/patches-6.18/032-01-v7.2-irqchip-irq-realtek-rtl-Add-simplify-register-helper.patch[31]
  linux/realtek/patches-6.18/032-02-v7.2-irqchip-irq-realtek-rtl-Add-multicore-support.patch[32]
  linux/realtek/patches-6.18/038-v7.3-irqchip-irq-realtek-rtl-change-to-__raw-reads-and-writes.patch[33]
  linux/econet/patches-6.18/043-03-v7.2-pinctrl-airoha-an7583-add-missed-gpio32-pin-group.patch[34]
  linux/econet/patches-6.18/043-04-v7.2-pinctrl-airoha-an7583-fix-misprint-in-gpio19-pinconf.patch[35]
  linux/econet/patches-6.18/043-05-v7.2-pinctrl-airoha-an7581-fix-incorrect-led-mapping-in-p.patch[36]
  linux/econet/patches-6.18/043-06-v7.2-pinctrl-airoha-an7583-fix-incorrect-led-mapping-in-p.patch[37]
  linux/econet/patches-6.18/043-07-v7.2-pinctrl-airoha-fix-pwm-pin-function-for-an7581-and-a.patch[38]
  linux/econet/patches-6.18/043-08-v7.2-pinctrl-airoha-an7583-fix-gpio21-pin-group.patch[39]
  linux/econet/patches-6.18/043-09-v7.2-pinctrl-airoha-an7583-add-missed-gpio22-pin-group.patch[40]
  linux/econet/patches-6.18/043-10-v7.2-pinctrl-airoha-an7583-fix-phy1_led1-pin-function.patch[41]
  linux/econet/patches-6.18/043-11-v7.2-pinctrl-airoha-an7583-remove-undefined-groups-from-p.patch[42]
  linux/econet/patches-6.18/044-01-v7.3-pinctrl-airoha-fix-mdio-bitfield-names.patch[43]
  linux/econet/patches-6.18/044-02-v7.3-pinctrl-airoha-an7581-fix-pinconf-of-i2c_scl-i2c.patch[44]
  linux/econet/patches-6.18/044-03-v7.3-pinctrl-airoha-an7583-fix-I2C0_SDA_PD-register-b.patch[45]
  linux/econet/patches-6.18/044-04-v7.3-pinctrl-airoha-an7581-fix-mux-conf-of-pcie_reset.patch[46]
  linux/econet/patches-6.18/044-05-v7.3-pinctrl-airoha-an7583-fix-muxing-of-non-gpio-def.patch[47]
  linux/econet/patches-6.18/044-09-v7.3-pinctrl-airoha-an7583-fix-spi-group-pins.patch[48]
  linux/econet/patches-6.18/044-10-v7.3-pinctrl-airoha-add-missed-get_direction-function.patch[49]
  linux/econet/patches-6.18/044-13-v7.3-pinctrl-airoha-fix-getting-gpiochip-pinctrl-poin.patch[50]
  linux/econet/patches-6.18/044-14-v7.3-pinctrl-airoha-add-missed-IRQ-resource-helpers.patch[51]
  linux/econet/patches-6.18/044-15-v7.3-pinctrl-airoha-fix-IRQ-mask-unmask-code.patch[52]
  linux/econet/patches-6.18/044-16-v7.3-pinctrl-airoha-fix-edge-triggered-interrupts-han.patch[53]
  linux/mvebu/patches-6.18/101-arm64-dts-armada-3720-turris-mox-fix-usb3-phys.patch[54]
  linux/qualcommax/patches-6.18/0085-v7.3-arm64-dts-qcom-ipq5018-Correct-CMN-PLL-reference-clock-rate.patch[55]
  linux/qualcommax/patches-6.18/0090-v7.3-arm64-qcom-ipq5018-Add-GEPHY-RX-and-TX-clocks.patch[56]
  linux/realtek/patches-6.18/032-04-v7.3-irqchip-irq-realtek-rtl-Add-interrupt-data-structure.patch[57]
  linux/realtek/patches-6.18/032-05-v7.3-irqchip-irq-realtek-rtl-Add-mask-for-interrupt-handl.patch[58]
  linux/realtek/patches-6.18/032-03-v7.3-irqchip-irq-realtek-rtl-Use-helper-for-parent-setup.patch[59]

Manually rebased:
  linux/generic/hack-6.18/200-tools_portability.patch
  linux/airoha/patches-6.18/180-01-v7.2-pinctrl-Move-Airoha-driver-to-dedicated-directory.patch
  linux/airoha/patches-6.18/202-17-v7.3-pinctrl-airoha-remove-not-needed-irq_type-array.patch
  linux/airoha/patches-6.18/402-01-thermal-airoha-convert-to-regmap-API.patch
  linux/econet/patches-6.18/043-02-v7.2-pinctrl-Move-Airoha-driver-to-dedicated-directory.patch
  linux/econet/patches-6.18/044-17-v7.3-pinctrl-airoha-remove-not-needed-irq_type-array.patch
  linux/mediatek/patches-6.18/361-clk-mediatek-add-clock-driver-for-mt7987-from-sdk.patch
  linux/octeon/patches-6.18/105-staging-octeon-support-EPROBE_DEFER-when-reading-MAC.patch
  linux/realtek/patches-6.18/032-06-v7.3-irqchip-irq-realtek-rtl-Add-a-select-function.patch
  linux/realtek/patches-6.18/032-07-v7.3-irqchip-irq-realtek-rtl-Allow-shuffled-interrupt-ord.patch

Dropped obsolete:
  linux/bcm27xx/patches-6.18/0082-added-capture_clear-option-to-pps-gpio-via-dtoverlay.patch

All other patches automatically rebased via update_kernel.sh

For target/linux/x86/generic/config-6.18, added new config option:
  # CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP is not set

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=74c2c5b459b42e23e8b06e5685efb6a4ab39bea1
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=cfe4350fdcb53a31cb91faef26af200c6b8e18c7
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=4bf51df55d7bdbd5f6a694a54fc0a82e41df483a
4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=6e9207ac476ca50be95a552d1fc24dfa94a94266
5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=0ca274a45eaead8284fb86ebc1782b4488cfd072
6. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=2e7c3c433fd791b95bc2264cab3c27f34e3b88b9
7. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=46bae3189cf5c4e37d72a542a717c52b579638c4
8. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=caf1e44e672b5c8751f7fbef1708204771d9bb8e
9. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=591424f9f5d51acde3ec478ea6c80ad20c6cec87
10. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=2ad214708259220add587f5a0bd3d7823fc3ed81
11. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=cf2e698957b65038ed0bfd27b95aa7baff3d3703
12. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=7bca33d6f6e00ea7f9c31bffbfecd4f2713fb2cb
13. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=6d0bcb2153128976038b61220a3297c80d273b22
14. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=5331bf0d5ca05e1d79386e41aeb9622e1a6cadf8
15. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=75ceddfa7df7ef1cee3f8d2b2095eb3b5f61a501
16. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=cbde1169bdd2cfda7b53f31bb0f6a32839c4d04e
17. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=fa27ddca660225863b3c301ad9f52b082af5bba6
18. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=2313f262999c72fbc940b3db9fa7e500ff9f7b96
19. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=38a2a4d6c7ac7d183a91f8d95a483884269b8059
20. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=7d2b3f8a996d1c3dceb95a10e766769f2951b92e
21. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=f3b8fe04dbfe3e9aaa00bd1febf2a6a1d600b79a
22. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=9ea692247ee2485e2fdd325bbe40d08fd0606a22
23. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=fda7350f257e59eee1bc7537c202e36bd56aea97
24. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=c7596135e7e9a77db9b34e61e24c7ac4562f88a3
25. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=244d0299008144e5c8f0c52cd23f85e4876ad993
26. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=7969b571ae940da0d429724a1a8ce141feda6583
27. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=74c2c5b459b42e23e8b06e5685efb6a4ab39bea1
28. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=cfe4350fdcb53a31cb91faef26af200c6b8e18c7
29. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=4bf51df55d7bdbd5f6a694a54fc0a82e41df483a
30. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=0ca274a45eaead8284fb86ebc1782b4488cfd072
31. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=a9be52993526640e99b5c49163e9efa9e7f4d93d
32. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=f7d818afcc22532cb9e854b204970a8d790576bf
33. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=5f02599590a4e4eb1dde3d17367b2b58dfe5ac4b
34. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=2e7c3c433fd791b95bc2264cab3c27f34e3b88b9
35. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=46bae3189cf5c4e37d72a542a717c52b579638c4
36. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=caf1e44e672b5c8751f7fbef1708204771d9bb8e
37. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=591424f9f5d51acde3ec478ea6c80ad20c6cec87
38. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=2ad214708259220add587f5a0bd3d7823fc3ed81
39. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=cf2e698957b65038ed0bfd27b95aa7baff3d3703
40. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=7bca33d6f6e00ea7f9c31bffbfecd4f2713fb2cb
41. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=6d0bcb2153128976038b61220a3297c80d273b22
42. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=5331bf0d5ca05e1d79386e41aeb9622e1a6cadf8
43. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=75ceddfa7df7ef1cee3f8d2b2095eb3b5f61a501
44. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=cbde1169bdd2cfda7b53f31bb0f6a32839c4d04e
45. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=fa27ddca660225863b3c301ad9f52b082af5bba6
46. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=2313f262999c72fbc940b3db9fa7e500ff9f7b96
47. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=38a2a4d6c7ac7d183a91f8d95a483884269b8059
48. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=7d2b3f8a996d1c3dceb95a10e766769f2951b92e
49. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=f3b8fe04dbfe3e9aaa00bd1febf2a6a1d600b79a
50. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=9ea692247ee2485e2fdd325bbe40d08fd0606a22
51. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=fda7350f257e59eee1bc7537c202e36bd56aea97
52. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=c7596135e7e9a77db9b34e61e24c7ac4562f88a3
53. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=244d0299008144e5c8f0c52cd23f85e4876ad993
54. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=19ebf0422fe916304220d33f701c5fd8ed7532da
55. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=c9fed0c7056c59294da36e05617ee8f6f629bf74
56. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=4e59a0b78e04884669ac22019a98f2112f834531
57. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=2aa9fcf31f3877311d90ed4519df999e6e684d31
58. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=5aa7bbe0bac89e7b127f0742e5536d02db491c74
59. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.52&id=421615e833d73b4c3bd49953a14fdfc5386c93b2

Build system: x86/64
Build-tested: x86/64-glibc
Run-tested: x86/64-glibc

Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/24800
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-09-16 11:43:34 +02:00
John Audia 829a6e6fb2 kernel: bump 6.18 to 6.18.51 
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.18.51

Manually rebased:
  linux/qualcommax/patches-6.18/0185-firmware-qcom_scm-ipq5332-add-support-to-pass-metadata-size.patch
  linux/qualcommax/patches-6.18/0803-firmware-qcom_scm-ipq5332-add-msa-lock-unlock-suppor.patch
  linux/qualcommax/patches-6.18/0811-firmware-qcom_scm-support-MPD.patch

Removed upstreamed:
  airoha/patches-6.18/221-01-pmdomain-mediatek-allow-Airoha-platform-to-access-PM-Domains-menu.patch[1]

All other patches automatically rebased via update_kernel.sh

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.51&id=6e96e2bb1065bde4e693787ff84c75867fad2c6f

Build system: x86/64
Build-tested: x86/64-glibc
Run-tested: x86/64-glibc

Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/24800
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-09-16 11:43:34 +02:00
John Audia 5edc3c1b8a kernel: bump 6.18 to 6.18.45 
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.18.45

Manually rebased:
  generic/pending-6.18/804-nvmem-core-support-mac-base-fixed-layout-cells.patch
  generic/pending-6.18/809-01-nvmem-core-generalize-mac-base-cells-handling.patch

Removed upstreamed:
  bcm53xx/patches-6.18/353-ARM-dts-bcm-ns-fix-PCIe-controller-2-second-interrup.patch[1]

All other patches automatically rebased via update_kernel.sh

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.18.45&id=9e5e88fbfc87d6a9edf72f8febc94061a6d0395e

Build system: x86/64
Build-tested: x86/64-glibc
Run-tested: x86/64-glibc

Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/24800
Signed-off-by: Robert Marko <robimarko@gmail.com>
 2026-09-16 11:43:33 +02:00
Rosen Penev b572e055fc mediatek: use libdeflate for gzip 
Shrinks size slightly.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24148
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-16 10:32:10 +02:00
Aleksei Sviridkin cc96ed1e6d mediatek: filogic: fix Keenetic phy1 MAC collision 
The fixup set the 5 GHz phy address to the base MAC with only the
locally administered bit set. The userspace VIF address allocator
derives additional VIF addresses on a phy the same way: the second
interface brought up on the 2.4 GHz radio gets base | 0x02, the exact
value this fixup assigned to phy1. Any configuration with two VIFs on
the 2.4 GHz radio (AP + mesh, AP + STA, a second AP) therefore ended
up with two interfaces sharing one MAC address. Observed on a KN-3811
running an 802.11s mesh alongside the regular APs: the 2.4 GHz mesh
VIF came up with the same address as the 5 GHz AP, and every
batman-adv loop-avoidance announce returning from the mesh made the
bridge log "received packet on bat0 with own address as source" and
flap the FDB entry for that address.

Simply dropping the override is not an option on these boards. Without
it mt76 falls back to the second MAC slot in the calibration data
(MT_EE_MAC_ADDR2, eeprom offset 0xa), but the DTS of every board here
already consumes that slot as the ethernet/label address, so phy1
would collide with a wired interface instead - verified on a KN-3811,
where the slot holds the WAN MAC. On KAP-630/NAP-630 that ethernet
port and the 5 GHz AP even sit in the same bridge.

Shifting the base is not enough either: the allocator's MBSSID scheme
varies the last octet (addr[5] ^= idx), so any last-octet shift stays
reachable at some index. Reproduce instead the address mt76 derives on
its own when the second slot is empty: LA bit set and bit 7 of the
first octet flipped. Neither allocator scheme can produce it (the
default one varies bits 2-6 of octet 0, MBSSID varies octet 5), and it
matches neither the base nor the base+1 ethernet address. This also
gives the whole family one 5 GHz addressing convention, since boards
with an empty second slot already get exactly this address from the
driver. The 5 GHz BSSID of the affected boards changes accordingly.

Tested on a KN-3811: phy1 comes up as the base with the LA bit and
bit 7 flipped, no address overlaps on the device, and APs, mesh and
clients re-associate fine.

Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24623
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-14 09:10:34 +02:00
Łukasz Szczur c4dc32021c mediatek: filogic: add support for ZBT Z8105AX-C 
Specifications:

SoC: MediaTek MT7981B
RAM: 256 MiB
Flash: Winbond SPI-NAND 128 MiB
Switch: 1 WAN, 3 LAN (Gigabit), MediaTek MT7531
Buttons: Reset, Mesh
Power: DC 12 V / 2.5 A
Wi-Fi: MT7981B 2.4 GHz & 5 GHz
M.2 slot for a WWAN modem
2 full-size SIM slots (user controllable)

The ZBT Z8105AX-C is externally identical to the ZBT Z8103AX-C and
uses the same SoC, RAM and flash configuration.

LED layout (top to bottom):

LAN 1 (green, hardware controlled)
LAN 2 (green, hardware controlled)
LAN 3 (green, hardware controlled)
WAN (green, user controllable)
Mobile (green, user controllable)
Mesh (red, green, blue, used for OpenWrt status)
Power (green, hardware controlled)

There is no Wi-Fi LED on the case and none was defined in the original
firmware.

SIM slots:

Controlled via GPIOs named SIM1 and SIM2.

Installation:

A. Through U-Boot menu:

- Configure the computer with a static IP address in the 192.168.1.0/24
  subnet, for example 192.168.1.10/24.
- Power off the router and hold the Reset button.
- Power on the router while keeping the Reset button pressed.
- Hold the button for 10 seconds and then release it.
- Open 192.168.1.1 in a web browser.
- If a firmware flashing interface is displayed, the router is in the
  U-Boot recovery interface.
- Upload the factory image.

The U-Boot web interface can also be used to recover the router after an
incorrect firmware flash.

B. Through OpenWrt dashboard:

If the router comes with vendor-modified OpenWrt, the firmware can be
upgraded through the dashboard at 192.168.1.1.

Navigate to "System" -> "Backup / Flash Firmware" and flash the OpenWrt
firmware.

Important: Disable the "Keep settings" option when flashing. Vendor
settings are incompatible with OpenWrt 24.10 and 25.12.

MAC addresses:

MAC addresses were found in the factory partition. The layout is
identical to the one used by the ZBT Z8106AX-S:

offset 0x4:  F8:5E:3C:xx:xx:aa --> Router Label -2
offset 0xa:  F8:5E:3C:xx:xx:bb --> Router Label -1
offset 0x24: F8:5E:3C:xx:xx:cc --> Router Label +1
offset 0x2a: F8:5E:3C:xx:xx:yy --> MAC address printed on Router Label

Untested:

- Flashing OpenWrt through the original firmware has not been tested.
  My unit came with vendor-modified OpenWrt running kernel 5.4.

- Hardware watchdog support has not been tested. A hardware watchdog is
  defined in the stock firmware.

Notes:

The ZBT Z8105AX-C can be ordered from the vendor with different WWAN
modem configurations. My unit came without a modem, but versions with
5G/LTE modems were available.

Signed-off-by: Łukasz Szczur <lukasz2317@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24711
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 12:28:16 +02:00
Sheikh Faisal 817b17cc34 mediatek: filogic: fix SPI-NAND write failures on JioRouter AX6000 
Currently, sysupgrade silently fails to erase or write to the SPI-NAND
flash on the JioRouter AX6000. This is caused by the SPI pinctrl group
mistakenly using `bias-disable`, which leaves the flash chip's hardware
HOLD and Write Protect (#WP) pins floating.

When combined with an upstream kernel regression that accidentally
arms the #HOLD function on Winbond W25N0xKV chips, these floating pins
drop low (often exacerbated by UART noise). This pauses the chip and
causes all flash operations to silently fail while returning success.

Fix this by properly configuring `bias-pull-up = <MTK_PUPD_SET_R1R0_11>`
for `SPI2_CS`, `SPI2_HOLD`, and `SPI2_WP`, ensuring the flash chip
remains electrically unpaused and unlocked. Additionally, apply
`bias-pull-down` to the clock and data lines to match MediaTek reference
designs.

Signed-off-by: Sheikh Faisal <sheikhfaisal713@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/25122
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:08:11 +02:00
Aleksei Sviridkin c19ca52b3e mediatek: drop the dead SPI bus-width property on two untested flashes 
spi-tx-buswidth / spi-rx-buswidth is not a property Linux's SPI core
reads; of_spi_parse_dt only recognizes the hyphenated
spi-tx-bus-width / spi-rx-bus-width, so these lines have never done
anything on the Unielec U7981-01-NAND or the Zbtlink Z8102AX-v2.

Renaming these to the form the kernel reads would engage quad I/O for
real, which needs a boot on the actual hardware to confirm the wiring
carries it - neither has that test yet. Removing the dead lines
instead keeps the tree honest about what each flash access actually
does, with no behavior change. The rename becomes its own patch once
someone with the hardware can test it.

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:18 +02:00
Aleksei Sviridkin b88441a17d mediatek: fix SPI bus-width spelling on the Livinet Li320 
No test on this hardware, but a community U-Boot build for this board
sets support_quad on the SPI controller and carries the same typo in
its own DTS, which means the wiring already runs quad under U-Boot on
real units.

Yuzhii0718/bl-mt798x-dhcpd,
uboot-mtk-20250711/arch/arm/dts/mt7981-livinet-li320.dts.

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:17 +02:00
Aleksei Sviridkin 20ce0e8355 mediatek: fix SPI bus-width spelling on three Keenetic boards 
No test on this hardware, but Keenetic's own build system carries the
correctly spelled property for all three: KN-3711, KN-3911, and the
shared kap-630 dtsi (which also covers the Netcraze NAP-630 rebadge).
Their vendor firmware has been running these boards in quad mode.

keenetic/keenetic-sdk, target/linux/mt7981/dts/KN-3711.dts,
KN-3911.dts and KAP-630.dts (KeeneticOS build system).

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:16 +02:00
Aleksei Sviridkin 5c1fb6c3cc mediatek: fix SPI bus-width spelling on the Routerich AX3000-v1 
Reading the NAND goes from 4.71 to 11.39 MiB/s on this board. One line
at the declared 52 MHz cannot carry more than 6.2 MiB/s, so the higher
figure is only reachable with more than one line in use.

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:16 +02:00
Aleksei Sviridkin 8494b551d3 mediatek: fix SPI bus-width spelling on four iptime boards 
NAND read throughput before and after, dd against the same partition
on each board:

  AX3000Q:     14.58s -> 6.85s
  AX3000SE:    14.59s -> 6.89s
  AX3000SM:    14.61s -> 6.86s
  AX7800M-6E:  14.71s -> 6.95s

Tested-by: Donghyun Ko <nyankosoftware@gmail.com>
Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:15 +02:00
Aleksei Sviridkin 44a0b37389 mediatek: fix SPI bus-width spelling on the Mercusys MR85X 
The shared dtsi covers both the stock and the -ubi image variant.

Tested-by: Mikhail Zhilkin <csharper2005@gmail.com>
Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:15 +02:00
Aleksei Sviridkin 0b03b57f6b mediatek: fix SPI bus-width spelling on the TP-Link F65v1 
NAND read throughput before and after, dd against the same partition:

  before: 64 MiB in 8.94s
  after:  64 MiB in 4.19s

Tested-by: Leonard Anderweit <leonard.anderweit@gmail.com>
Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:15 +02:00
Aleksei Sviridkin 0b9d49c488 mediatek: fix SPI bus-width spelling on the Keenetic KN-3811 
Confirmed on my own KN-3811, following the same NAND throughput check
described in the PR thread: the flash reads noticeably faster than the
~6.5 MB/s ceiling that 1-bit mode caps out at, at 52 MHz.

Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:14 +02:00
Aleksei Sviridkin 59555577b0 mediatek: fix SPI bus-width spelling on the Teltonika RUTC50 SPI-NAND 
The &spi0 spi_nand@0 node (runtime spi1.0, the rutos-a/rutos-b
partitions) carried the same misspelled spi-tx-buswidth /
spi-rx-buswidth as the NOR flash fixed in the previous commit. Kept
separate since it's a different chip on a different bus, with its own
evidence.

Confirmed on hardware: dd against mtd9 (rutos-a) reads 64 MiB in
5.73 s where it took 13.54 s before.

Tested-by: Simonas Tamošaitis <simsasss@gmail.com>
Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:14 +02:00
Aleksei Sviridkin 2ca56a9704 mediatek: fix SPI bus-width spelling on the Teltonika RUTC50 NOR flash 
The &spi2 flash@0 node is jedec,spi-nor, not SPI-NAND, and used the
same misspelled spi-tx-buswidth / spi-rx-buswidth. Enabling quad here
is a behavioral change on first boot, not a no-op rename: the SPI NOR
core sets the non-volatile Quad Enable bit in the flash status
register, repurposing the /WP and /HOLD pins as IO2/IO3. The values
restore what the DTS already specified; only the property name was
wrong. Kept as a separate commit so this node can be reverted
independently if the board's wiring does not support quad mode.

Confirmed on hardware: /sys/kernel/debug/spi-nor/*/params shows the
read protocol switch from 1S-1S-1S with opcode 0x03 to 1S-4S-4S with
0xeb, and the config partition, which carries the board MAC, still
reads back correctly.

Tested-by: Simonas Tamošaitis <simsasss@gmail.com>
Assisted-by: LLM
Signed-off-by: Aleksei Sviridkin <f@lex.la>
Link: https://github.com/openwrt/openwrt/pull/24809
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-11 10:06:14 +02:00
George Moussalem b6a035fc2b generic: update to latest fwnode phylink PCS patches 
Backport v7.3 phylink patches to the generic target required for the
latest fwnode phylink PCS patches which support multiple (sub-)targets,
including MTK and qualcommax.

This update includes better PCS release logic, switch to full notifier
add/release PCS handling, devres managed PCS provider variant and
general code improvements.

In addition, update every user to the latest fwnode phylink PCS API.

In the latest API, fwnode_pcs_add_provider() returns a pointer to
the provider or the error code instead of the previous plain return
value. As such, update error handling and add a descriptive error
message upon failure. Also the provider remove logic changed and with
the support of devres API, switch every user to devm_ variant.

Signed-off-by: George Moussalem <george.moussalem@outlook.com>
[ improve commit description, refresh patch, update any driver to new API]
Co-Developed-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24973
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 2026-09-10 10:22:17 +02:00
Sheikh Faisal 552e617bd0 mediatek: add support for JioRouter AX6000 JIDU6J01 
| Component        | Details                                        |
|------------------|------------------------------------------------|
| **SoC**          | MediaTek MT7986A (4× ARM Cortex-A53 @ 2.0 GHz) |
| **RAM**          | 512 MB                                         |
| **Flash**        | 256 MB NAND                                    |
| **Ethernet**     | 5× 10/100/1000 Mbps (1 WAN + 4 LAN)            |
| **WLAN 2.4 GHz** | MediaTek MT7976GN — 802.11b/g/n/ax, 4×4 MIMO   |
| **WLAN 5 GHz**   | MediaTek MT7976AN — 802.11n/ac/ax, 4×4 MIMO    |
| **LEDs**         | 1× RGB LED (GPIO-controlled)                   |
| **Button**       | 1× Reset                                       |
| **USB**          | Yes                                            |

**MAC Addresses:**

| Interface  | Source                                          |
|------------|-------------------------------------------------|
| WAN/Label  | MFG MTD partition (variant-specific fallback)   |
| LAN        | WAN + 1                                         |
| 2.4 GHz    | WAN + 2                                         |
| 5 GHz      | WAN + 3                                         |

Supported variants and MAC source:
- JIDU6J01,JIDU6201: binary at offset 0x00
- JIDU6401: binary at offset 0x20
- JIDU6601: ASCII text at offset 0x1d0
- JIDU6701: ASCII mac= key

---

**1. Extracting U-Boot Credentials**
The U-Boot username and password are stored in the `MFG` partition. To retrieve them:
- With root access on stock OS: Read directly from the MFG partition.
- Without root access: Dump the NAND flash first, then extract the credentials from the dump.

**2. Prepare TFTP server**
- Set a static IP on the ethernet interface of your computer
  (e.g. default: ip `192.168.1.2`, gateway `192.168.1.1`).
- Download the initramfs image and host it with the TFTP server.

**3. Interrupt boot**

Attach UART and power on the router. When the boot menu appears, select **Failsafe Mode**,
then press `Ctrl-C` to interrupt and enter the credentials extracted from `MFG` partition.

**4. Load and run initramfs image**
```sh
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.2
tftpboot 0x46000000 openwrt-mediatek-filogic-jiorouter_ax6000-jidu6j01-initramfs-kernel.bin
fdt addr $(fdtcontroladdr)
fdt rm /signature
bootm
```

**5. Flash sysupgrade image**

Place the sysupgrade image in `/tmp`, then run:
```sh
sysupgrade /tmp/openwrt-mediatek-filogic-jiorouter_ax6000-jidu6j01-squashfs-sysupgrade.bin
```
Alternatively, use the sysupgrade option in LuCI.

Signed-off-by: Sheikh Faisal <sheikhfaisal713@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23510
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
 2026-09-09 13:40:34 +02:00