This adds a patch that makes the pwm1 frequency and LUT temperature
hysteresis of lm63 fan controllers writeable, to be able to replicate
vendor cooling behaviour for fans that need a lower PWM frequency
than the default.
Signed-off-by: Jan-Henrik Bruhn <git@jhbruhn.de>
Link: https://github.com/openwrt/openwrt/pull/23473
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
The functionality/support for 5G and 10G PHYs was extracted from the
realtek-phy driver and ported to the upstream Linux realtek PHY driver.
These PHY chips need a sequence of register writes (and similar operations)
for initialization. These sequences are provided as firmware files which
are interpreted/applied by a new register patch engine.
By switching to the upstream driver, it should be possible to get rid of a
large chunk of (from OpenWrt perspective) unmaintained code from Realtek.
The actual Linux phy-core infrastructure from Linux can be mostly used and
only the Realtek specific quirks need to be handled.
The files which need to be provided are depending on the PHY:
* rtl8261n.bin (package "rtl8261n-firmware" or "rtl8261n-lp-firmware")
- RTL8251L 5Gbps PHY
- RTL8261BE 10Gbps PHY
- RTL8261N 10Gbps PHY
* rtl8264b.bin (package "rtl8264b-firmware")
- RTL8254B 5Gbps PHY
- RTL8264 10Gbps PHY
- RTL8264B 10Gbps PHY
Files which are affected by this change (DEVICE_PACKAGES dependencies,
hwmon paths, default kernel configurations, refresh of patches, ...) are
updated at the same times.
Signed-off-by: Balázs Triszka <info@balika011.hu>
Co-authored-by: Semih Baskan <strst.gs@gmail.com>
Co-authored-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Co-authored-by: Gilly1970 <gilroyscott@hotmail.com>
Co-authored-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Co-authored-by: Carlo Szelinsky <github@szelinsky.de>
[sven: rebase, integrate suggestions from PR, add device packages, split]
Signed-off-by: Sven Eckelmann <sven@narfation.org>
[daniel: stripped to Linux 6.18 only, dropped unrelated changes]
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
While implementing standalone PCS support for DSA, it was found that making
the MAC driver passing the available_pcs array is limiting and problematic
for memory handling and allocation. To better handle this, change the logic
and make phylink allocate the struct and make the MAC driver implement a
function in phylink_config .fill_available_pcs to fill the PCS array.
Update the Airoha and Mediatek driver to reflect this new implementation.
Link: https://github.com/openwrt/openwrt/pull/23413
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The current code permits support of the standalone PCS feature only for
in-tree kernel module but doesn't correctly support PCS from external
kernel module.
This is caused by the fact that the FWNODE_PCS config flag is internally
selected by any PCS driver and can't be selected directly. This is
problematic for any external kernel module that wants to use the standalone
PCS feature and needs the OPs provided by the generic PCS code.
Moreover compiling the standalone PCS code as a module is problematic and
would cause link error caused by the late PCS code that introduce a
notifier where phylink code depends on.
To address both problem, permit to select the FWNODE_PCS and change it to a
simple bool preventing it to compile as a module.
Link: https://github.com/openwrt/openwrt/pull/23349
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport phylink_replay_link() API patch from upstream kernel. This is
mostly needed for force_major_config bool in phylink struct needed for new
standalone PCS series.
While at it also rename the current 703 patch to 703-01 as it's part of the
same series merged upstream.
All patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/23271
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
FIPS 140-3 recommends that all crypto implementations should be tested
before first use. Testmanager performs initial tests based on existing
test vectors. Not all algorithms have defined test vectors, so to improve
this situation, this commit backports recently added test vectors for
some cipher suites.
These vectors were calculated using a software implementation and then
double-checked on Mediatek MT7981 (safexcel) and NXP P2020 (talitos).
Both platforms passed self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/23012
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add patches to improve support for using 3rd-party DSA switches
like MaxLinear MxL862xx with MediaTek's mtk_eth_soc being the
conduit. This involves reorganizing hardware queues to avoid
overlap (currently dp->index is used -- if there is more than one
DSA switch this is problematic), and correctly programming flows
of the non-MTK DSA users ports in the PPE offloading engine.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
LINK_INBAND_ENABLE isn't valid for 5GBase-R/10GBase-R modes which
by definition don't support any in-band an. Correctly report
LINK_INBAND_DISABLE to fix 10G fiber SFP modules no longer working.
While at it also get rid of downstream pn-swap properties in favor
of using the upstream schema.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
At least the XikeStor SKT-2.5G-100M SFP module seems to internally use
MDIO address 0 to access the PHY. This module allows accessing PHY
registers using Rollball protocol on address 0x51, and also provides
read-only C22 access on address 0x56. However, after disabling the
PHYAD0 configuration bit, only 0xffff can be read via both methods
(except for MMD device 30 which can still be accessed).
Since having MDIO address 0 enabled shouldn't do any harm on SFP modules
just leave the configuration bit alone in that case.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/23065
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Import pending series introducing support for standalone PCS drivers.
This has previously already been used by the airoha target, and is
also the base for the closer-to-upstream patches for MediaTek MT7988
10G SerDes support.
In order to not having to diverge from upstream also backport series
for standardized handling for PHY and PCS SerDes pair polarity.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Daniel Pawlik figured out that a stale patch hunk breaks one of the
two 10G SerDes PCS ports of MT7988. Remove the hunk to make 10G
Ethernet work on both SerDes PCS with Linux 6.18.
Testing was done using a Aquantia AQR113C SFP+ module.
Signed-off-by: Daniel Pawlik <pawlik.dan@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Our downstream patch for the new SerDes paths on MT7988 wasn't
correctly ported to Linux 6.18 which already got most of the XPCS
support upstream.
Fix (ie. reduce) the patch to make the built-in 2.5G PHY on MT7988 and
MT7987 work again.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
eip93_hmac_setkey() allocates a temporary ahash transform for
computing HMAC ipad/opad key material. The allocation uses the
driver-specific cra_driver_name (e.g. "sha256-eip93") but passes
CRYPTO_ALG_ASYNC as the mask, which excludes async algorithms.
Since the EIP93 hash algorithms are the only ones registered
under those driver names and they are inherently async, the
lookup is self-contradictory and always fails with -ENOENT.
When called from the AEAD setkey path, this failure leaves the
SA record partially initialized with zeroed digest fields. A
subsequent crypto operation then dereferences a NULL pointer in
the request context, resulting in a kernel panic:
```
pc : eip93_aead_handle_result+0xc8c/0x1240 [crypto_hw_eip93]
lr : eip93_aead_handle_result+0xbec/0x1240 [crypto_hw_eip93]
sp : ffffffc082feb820
x29: ffffffc082feb820 x28: ffffff8011043980 x27: 0000000000000000
x26: 0000000000000000 x25: ffffffc078da0bc8 x24: 0000000091043980
x23: ffffff8004d59e50 x22: ffffff8004d59410 x21: ffffff8004d593c0
x20: ffffff8004d593c0 x19: ffffff8004d4f300 x18: 0000000000000000
x17: 0000000000000000 x16: 0000000000000000 x15: 0000007fda7aa498
x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000
x11: 0000000000000000 x10: fffffffff8127a80 x9 : 0000000000000000
x8 : ffffff8004d4f380 x7 : 0000000000000000 x6 : 000000000000003f
x5 : 0000000000000040 x4 : 0000000000000008 x3 : 0000000000000009
x2 : 0000000000000008 x1 : 0000000028000003 x0 : ffffff8004d388c0
Code: 910142b6 f94012e0 f9002aa0 f90006d3 (f9400740)
```
The reported symbol eip93_aead_handle_result+0xc8c is a
resolution artifact from static functions being merged under
the nearest exported symbol. Decoding the faulting sequence:
```
910142b6 ADD X22, X21, #0x50
f94012e0 LDR X0, [X23, #0x20]
f9002aa0 STR X0, [X21, #0x50]
f90006d3 STR X19, [X22, #0x8]
f9400740 LDR X0, [X26, #0x8]
```
The faulting LDR at [X26, #0x8] is loading ctx->flags
(offset 8 in eip93_hash_ctx), where ctx has been resolved
to NULL from a partially initialized or unreachable
transform context following the failed setkey.
Fix this by dropping the CRYPTO_ALG_ASYNC mask from the
crypto_alloc_ahash() call. The code already handles async
completion correctly via crypto_wait_req(), so there is no
requirement to restrict the lookup to synchronous algorithms.
Note that hashing a single 64-byte block through the hardware
is likely slower than doing it in software due to the DMA
round-trip overhead, but offloading it may still spare CPU
cycles on the slower embedded cores where this IP is found.
Fixes: 9739f5f93b78 ("crypto: eip93 - Add Inside Secure SafeXcel EIP-93 crypto engine support")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
[Detailed investigation report of this bug]
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/22886
Signed-off-by: Robert Marko <robimarko@gmail.com>
Introduce fix which prevents the kernel from crashing in case the mxl862xx
driver fails to probe due to outdated firmware running on the switch.
Cancel all pending work and prevent rescheduling of counter polling in case
the driver errors out during probe.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The signature of phylink_pcs get_state has changed, and we need to set
.supported_interfaces.
Both has been removed when backporting the driver to Linux 6.12, readd
to make it build and work with Linux 6.18.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://github.com/openwrt/openwrt/pull/22668
Signed-off-by: Robert Marko <robimarko@gmail.com>
Daniel Golle
John Audia
Jan-Henrik Bruhn
Balázs Triszka
Qingfang Deng
Christian Marangi
Andre Heider
Hauke Mehrtens
Aleksander Jan Bajkowski
Jan Hoffmann
Daniel Pawlik
Kenneth Kasilag
Shiji Yang
Mieczyslaw Nalewaj