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https://github.com/openwrt/openwrt.git
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Daniel Golle
10ca4886c4
Add support for Aquantia CUX3410 and fix/sync support for the AQR112 variants. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
103 lines
3.4 KiB
Diff
103 lines
3.4 KiB
Diff
From c52f17573b48bdb09be946ba5d70c206ef9b2ab0 Mon Sep 17 00:00:00 2001
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From: Chad Monroe <chad@monroe.io>
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Date: Fri, 11 Oct 2024 16:41:37 -0700
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Subject: [PATCH] net: phy: aquantia: add support for CUX3410
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Add support for Marvell CUX3410. This PHY is nearly identical to
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the AQR113C but without MACsec, SyncE and PTP support.
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Signed-off-by: Chad Monroe <chad@monroe.io>
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---
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drivers/net/phy/aquantia/aquantia_main.c | 45 ++++++++++++++++++++++++
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1 file changed, 45 insertions(+)
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--- a/drivers/net/phy/aquantia/aquantia_main.c
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+++ b/drivers/net/phy/aquantia/aquantia_main.c
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@@ -34,6 +34,7 @@
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#define PHY_ID_AQR115 0x31c31c63
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#define PHY_ID_AQR115C 0x31c31c33
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#define PHY_ID_AQR813 0x31c31cb2
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+#define PHY_ID_CUX3410 0x31c31dd3
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#define MDIO_PHYXS_VEND_PROV2 0xc441
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#define MDIO_PHYXS_VEND_PROV2_USX_AN BIT(3)
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@@ -50,6 +51,9 @@
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OFF 9
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII 10
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+#define MDIO_PHYXS_TX_RSVD_VEND_PROV2 0xc441
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+#define MDIO_PHYXS_TX_RSVD_VEND_PROV2_ANEG BIT(3)
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+
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#define MDIO_AN_VEND_PROV 0xc400
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#define MDIO_AN_VEND_PROV_1000BASET_FULL BIT(15)
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#define MDIO_AN_VEND_PROV_1000BASET_HALF BIT(14)
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@@ -195,6 +199,16 @@ static int aqr_set_mdix(struct phy_devic
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MDIO_AN_RESVD_VEND_PROV_MDIX_MASK, val);
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}
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+static int aqr107_config_usx_aneg_en(struct phy_device *phydev)
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+{
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+ u16 val;
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+
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+ val = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_TX_RSVD_VEND_PROV2);
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+ val |= MDIO_PHYXS_TX_RSVD_VEND_PROV2_ANEG;
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+
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+ return phy_write_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_TX_RSVD_VEND_PROV2, val);
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+}
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+
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static int aqr_config_aneg(struct phy_device *phydev)
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{
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bool changed = false;
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@@ -806,6 +820,10 @@ static int aqr_gen1_config_init(struct p
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if (ret)
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return ret;
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+ ret = aqr107_config_usx_aneg_en(phydev);
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+ if (ret)
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+ phydev_err(phydev, "USX autonegotiation disabled, ret: %d\n", ret);
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+
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ret = aqr107_config_mdi(phydev);
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if (ret)
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return ret;
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@@ -1560,6 +1578,32 @@ static struct phy_driver aqr_driver[] =
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.inband_caps = aqr_gen2_inband_caps,
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.config_inband = aqr_gen2_config_inband,
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},
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+{
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+ PHY_ID_MATCH_MODEL(PHY_ID_CUX3410),
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+ .name = "Aquantia CUX3410",
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+ .probe = aqr107_probe,
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+ .get_rate_matching = aqr_gen2_get_rate_matching,
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+ .config_init = aqr_gen4_config_init,
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+ .config_aneg = aqr_config_aneg,
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+ .config_intr = aqr_config_intr,
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+ .handle_interrupt = aqr_handle_interrupt,
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+ .read_status = aqr_gen2_read_status,
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+ .get_tunable = aqr107_get_tunable,
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+ .set_tunable = aqr107_set_tunable,
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+ .suspend = aqr_gen1_suspend,
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+ .resume = aqr_gen1_resume,
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+ .get_sset_count = aqr107_get_sset_count,
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+ .get_strings = aqr107_get_strings,
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+ .get_stats = aqr107_get_stats,
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+ .link_change_notify = aqr107_link_change_notify,
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+ .led_brightness_set = aqr_phy_led_brightness_set,
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+ .led_hw_is_supported = aqr_phy_led_hw_is_supported,
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+ .led_hw_control_set = aqr_phy_led_hw_control_set,
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+ .led_hw_control_get = aqr_phy_led_hw_control_get,
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+ .led_polarity_set = aqr_phy_led_polarity_set,
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+ .inband_caps = aqr_gen2_inband_caps,
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+ .config_inband = aqr_gen2_config_inband,
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+},
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};
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module_phy_driver(aqr_driver);
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@@ -1583,6 +1627,7 @@ static const struct mdio_device_id __may
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR115) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR115C) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
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+ { PHY_ID_MATCH_MODEL(PHY_ID_CUX3410) },
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{ }
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};
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