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a66e30631c
Align the qualcommax target to the pattern already used on other devices where the device DTS are placed in a dedicated directory separate from the files directory. This, while trying to enforce a common pattern for every target, also permits to do modification to device DTS without having to trigger a recompilation of the entire kernel (as the files directory is not touched) Link: https://github.com/openwrt/openwrt/pull/22037 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
334 lines
5.5 KiB
Devicetree
334 lines
5.5 KiB
Devicetree
/dts-v1/;
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#include "ipq5018.dtsi"
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#include "ipq5018-ess.dtsi"
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#include "ipq5018-qcn6122.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "GL.iNet GL-B3000";
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compatible = "glinet,gl-b3000", "qcom,ipq5018";
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aliases {
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ethernet1 = &dp2;
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label-mac-device = &dp2;
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led-boot = &led_system_blue;
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led-failsafe = &led_status_white;
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led-running = &led_status_white;
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led-upgrade = &led_system_blue;
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serial0 = &blsp1_uart1;
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};
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chosen {
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bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M";
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stdout-path = "serial0:115200n8";
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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button-reset {
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label = "reset";
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gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&leds_pins>;
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pinctrl-names = "default";
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led_system_blue: system-blue {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
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};
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led_status_white: status-white {
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color = <LED_COLOR_ID_WHITE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&switch {
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status = "okay";
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switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
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qcom,port_phyinfo {
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// MAC0 -> GE Phy -> QCA8337 Phy2
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port@1 {
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port_id = <1>;
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mdiobus = <&mdio0>;
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phy_address = <7>;
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};
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// MAC1 ---SGMII---> QCA8337 SerDes
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port@2 {
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port_id = <2>;
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forced-speed = <1000>;
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forced-duplex = <1>;
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};
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};
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};
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// MAC1 ---SGMII---> QCA8337 SerDes
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&dp2 {
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status = "okay";
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nvmem-cells = <&macaddr_dp2 0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&mdio0 {
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status = "okay";
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};
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&mdio1 {
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status = "okay";
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pinctrl-0 = <&mdio1_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
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// QCA8337 Phy0 -> WAN
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qca8337_0: ethernet-phy@0 {
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reg = <0>;
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};
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// QCA8337 Phy1 -> LAN1
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qca8337_1: ethernet-phy@1 {
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reg = <1>;
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};
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// QCA8337 Phy3 -> LAN2
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qca8337_2: ethernet-phy@2 {
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reg = <2>;
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};
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// QCA8337 switch
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switch0: ethernet-switch@17 {
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compatible = "qca,qca8337";
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reg = <17>;
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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switch0cpu: port@0 {
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reg = <0>;
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label = "cpu";
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phy-mode = "sgmii";
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ethernet = <&dp2>;
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qca,sgmii-enable-pll;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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// QCA8337 Phy0 -> WAN
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port@1 {
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reg = <1>;
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label = "wan";
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phy-handle = <&qca8337_0>;
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};
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// QCA8337 Phy1 -> LAN1
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port@2 {
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reg = <2>;
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label = "lan1";
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phy-handle = <&qca8337_1>;
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nvmem-cells = <&macaddr_dp2 2>;
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nvmem-cell-names = "mac-address";
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};
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// QCA8337 Phy3 -> LAN2
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port@3 {
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reg = <3>;
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label = "lan2";
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phy-handle = <&qca8337_2>;
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nvmem-cells = <&macaddr_dp2 2>;
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nvmem-cell-names = "mac-address";
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};
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};
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};
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};
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&sleep_clk {
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clock-frequency = <32000>;
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};
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&xo_board_clk {
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clock-div = <4>;
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clock-mult = <1>;
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};
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&blsp1_uart1 {
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pinctrl-0 = <&serial_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&crypto {
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&prng {
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status = "okay";
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};
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&qfprom {
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status = "okay";
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};
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&qpic_bam {
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status = "okay";
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};
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&qpic_nand {
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pinctrl-0 = <&qpic_pins>;
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pinctrl-names = "default";
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status = "okay";
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nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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nand-ecc-engine = <&qpic_nand>;
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nand-bus-width = <8>;
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partitions {
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compatible = "qcom,smem-part";
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partition-0-art {
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label = "0:art";
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_dp2: macaddr@0 {
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compatible = "mac-base";
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#nvmem-cell-cells = <1>;
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reg = <0x6 0x6>;
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};
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};
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};
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};
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};
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};
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&tlmm {
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mdio1_pins: mdio-state {
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mdc-pins {
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pins = "gpio36";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio-pins {
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pins = "gpio37";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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leds_pins: leds-pins {
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pins = "gpio23", "gpio24";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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button_pins: button-pins {
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pins = "gpio27";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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qpic_pins: qpic-state {
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clock-pins {
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pins = "gpio9";
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function = "qspi_clk";
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drive-strength = <8>;
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bias-disable;
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};
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cs-pins {
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pins = "gpio8";
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function = "qspi_cs";
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drive-strength = <8>;
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bias-disable;
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};
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data-pins {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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function = "qspi_data";
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drive-strength = <8>;
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bias-disable;
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};
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};
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serial_0_pins: uart0-state {
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pins = "gpio20", "gpio21";
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function = "blsp0_uart0";
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drive-strength = <8>;
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bias-disable;
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};
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};
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&q6v5_wcss {
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/* B3000 currently doesn't support passing bootargs */
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/*boot-args = < */
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/* type: 0x1 PCIE0 */
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/* length: 4 */
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/* PD id: 3 */
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/* reset GPIO: 15 */
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/* reserved: 0 0>; */
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};
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&wifi {
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status = "okay";
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qcom,rproc = <&q6_wcss_pd1>;
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qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
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qcom,ath11k-calibration-variant = "GL-iNet-GL-B3000";
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qcom,ath11k-fw-memory-mode = <1>;
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qcom,bdf-addr = <0x4c400000>;
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};
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&wifi1 {
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status = "okay";
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qcom,rproc = <&q6_wcss_pd3>;
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qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
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qcom,ath11k-calibration-variant = "GL-iNet-GL-B3000";
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qcom,ath11k-fw-memory-mode = <1>;
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qcom,bdf-addr = <0x4d100000>;
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qcom,m3-dump-addr = <0x4df00000>;
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};
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