Files
openwrt/target/linux/qualcommax/dts/ipq5018-gl-b3000.dts
T
Christian Marangi a66e30631c qualcommax: move Device DTS to dedicated DTS directory
Align the qualcommax target to the pattern already used on other devices where
the device DTS are placed in a dedicated directory separate from the files
directory.

This, while trying to enforce a common pattern for every target, also permits to
do modification to device DTS without having to trigger a recompilation of the
entire kernel (as the files directory is not touched)

Link: https://github.com/openwrt/openwrt/pull/22037
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-02-16 13:14:13 +01:00

334 lines
5.5 KiB
Devicetree

/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include "ipq5018-qcn6122.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "GL.iNet GL-B3000";
compatible = "glinet,gl-b3000", "qcom,ipq5018";
aliases {
ethernet1 = &dp2;
label-mac-device = &dp2;
led-boot = &led_system_blue;
led-failsafe = &led_status_white;
led-running = &led_status_white;
led-upgrade = &led_system_blue;
serial0 = &blsp1_uart1;
};
chosen {
bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M";
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button-reset {
label = "reset";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_system_blue: system-blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
};
led_status_white: status-white {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
};
};
};
&switch {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy -> QCA8337 Phy2
port@1 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
port@2 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
};
// MAC1 ---SGMII---> QCA8337 SerDes
&dp2 {
status = "okay";
nvmem-cells = <&macaddr_dp2 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mdio0 {
status = "okay";
};
&mdio1 {
status = "okay";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
// QCA8337 Phy0 -> WAN
qca8337_0: ethernet-phy@0 {
reg = <0>;
};
// QCA8337 Phy1 -> LAN1
qca8337_1: ethernet-phy@1 {
reg = <1>;
};
// QCA8337 Phy3 -> LAN2
qca8337_2: ethernet-phy@2 {
reg = <2>;
};
// QCA8337 switch
switch0: ethernet-switch@17 {
compatible = "qca,qca8337";
reg = <17>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
switch0cpu: port@0 {
reg = <0>;
label = "cpu";
phy-mode = "sgmii";
ethernet = <&dp2>;
qca,sgmii-enable-pll;
fixed-link {
speed = <1000>;
full-duplex;
};
};
// QCA8337 Phy0 -> WAN
port@1 {
reg = <1>;
label = "wan";
phy-handle = <&qca8337_0>;
};
// QCA8337 Phy1 -> LAN1
port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&qca8337_1>;
nvmem-cells = <&macaddr_dp2 2>;
nvmem-cell-names = "mac-address";
};
// QCA8337 Phy3 -> LAN2
port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&qca8337_2>;
nvmem-cells = <&macaddr_dp2 2>;
nvmem-cell-names = "mac-address";
};
};
};
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board_clk {
clock-div = <4>;
clock-mult = <1>;
};
&blsp1_uart1 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&crypto {
status = "okay";
};
&cryptobam {
status = "okay";
};
&prng {
status = "okay";
};
&qfprom {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
compatible = "spi-nand";
reg = <0>;
nand-ecc-engine = <&qpic_nand>;
nand-bus-width = <8>;
partitions {
compatible = "qcom,smem-part";
partition-0-art {
label = "0:art";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_dp2: macaddr@0 {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
reg = <0x6 0x6>;
};
};
};
};
};
};
&tlmm {
mdio1_pins: mdio-state {
mdc-pins {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio-pins {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds-pins {
pins = "gpio23", "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
button_pins: button-pins {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
qpic_pins: qpic-state {
clock-pins {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
cs-pins {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
data-pins {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
serial_0_pins: uart0-state {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
drive-strength = <8>;
bias-disable;
};
};
&q6v5_wcss {
/* B3000 currently doesn't support passing bootargs */
/*boot-args = < */
/* type: 0x1 PCIE0 */
/* length: 4 */
/* PD id: 3 */
/* reset GPIO: 15 */
/* reserved: 0 0>; */
};
&wifi {
status = "okay";
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,ath11k-calibration-variant = "GL-iNet-GL-B3000";
qcom,ath11k-fw-memory-mode = <1>;
qcom,bdf-addr = <0x4c400000>;
};
&wifi1 {
status = "okay";
qcom,rproc = <&q6_wcss_pd3>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,ath11k-calibration-variant = "GL-iNet-GL-B3000";
qcom,ath11k-fw-memory-mode = <1>;
qcom,bdf-addr = <0x4d100000>;
qcom,m3-dump-addr = <0x4df00000>;
};