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a66e30631c
Align the qualcommax target to the pattern already used on other devices where the device DTS are placed in a dedicated directory separate from the files directory. This, while trying to enforce a common pattern for every target, also permits to do modification to device DTS without having to trigger a recompilation of the entire kernel (as the files directory is not touched) Link: https://github.com/openwrt/openwrt/pull/22037 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
184 lines
3.5 KiB
Devicetree
184 lines
3.5 KiB
Devicetree
/dts-v1/;
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#include "ipq5018.dtsi"
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#include "ipq5018-mx-base.dtsi"
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#include "ipq5018-qcn6122.dtsi"
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/ {
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model = "Linksys MX2000";
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compatible = "linksys,mx2000", "qcom,ipq5018";
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chosen {
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bootargs-append = " root=/dev/ubiblock0_0 coherent_pool=2M";
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stdout-path = "serial0:115200n8";
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};
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};
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/*
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* ===============================================================
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* _______________________ _______________________
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* | IPQ5018 | | QCA8337 |
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* | +------+ +--------+ | | +--------+ +------+ |
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* | | MAC0 |---| GE Phy | | | | Phy0 |---| MAC1 | |
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* | +------+ +--------+ | | +--------+ +------+ |
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* | +------+ +--------+ | | +--------+ +------+ |
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* | | MAC1 |---| Uniphy |-+-SGMII-+-| SerDes |---| MAC6 | |
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* | +------+ +--------+ | | +--------+ +------+ |
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* |_______________________| |_______________________|
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*
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* ===============================================================
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*/
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&switch {
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status = "okay";
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switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
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qcom,port_phyinfo {
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// MAC0 -> GE Phy -> QCA8337 Phy4
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port@1 {
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port_id = <1>;
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mdiobus = <&mdio0>;
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phy_address = <7>;
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};
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// MAC1 ---SGMII---> QCA8337 SerDes
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port@2 {
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port_id = <2>;
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forced-speed = <1000>;
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forced-duplex = <1>;
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};
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};
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};
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// MAC1 ---SGMII---> QCA8337 SerDes
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&dp2 {
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status = "okay";
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nvmem-cells = <&hw_mac_addr 0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&mdio0 {
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status = "okay";
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};
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&mdio1 {
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status = "okay";
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pinctrl-0 = <&mdio1_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
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// QCA8337 Phy0 not connected
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qca8337_0: ethernet-phy@0 {
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reg = <0>;
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};
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// QCA8337 Phy1 -> WAN
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qca8337_1: ethernet-phy@1 {
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reg = <1>;
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};
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// QCA8337 Phy2 -> LAN1
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qca8337_2: ethernet-phy@2 {
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reg = <2>;
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};
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// QCA8337 Phy3 -> LAN2
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qca8337_3: ethernet-phy@3 {
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reg = <3>;
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};
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// QCA8337 Phy4 -> LAN3
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qca8337_4: ethernet-phy@4 {
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reg = <4>;
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};
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// QCA8337 switch
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switch1: ethernet-switch@17 {
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compatible = "qca,qca8337";
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reg = <17>;
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@2 {
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reg = <2>;
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label = "wan";
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phy-handle = <&qca8337_1>;
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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phy-handle = <&qca8337_2>;
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};
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port@4 {
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reg = <4>;
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label = "lan2";
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phy-handle = <&qca8337_3>;
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};
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port@5 {
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reg = <5>;
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label = "lan1";
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phy-handle = <&qca8337_4>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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phy-mode = "sgmii";
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ethernet = <&dp2>;
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qca,sgmii-enable-pll;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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&q6v5_wcss {
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/* The QCN6102 radio should map to UPD ID 2. Without */
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/* bootargs, the firmware will expect it to be on UPD ID 3 */
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boot-args = <
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/* type: */ 0x1 /* PCIE0 */
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/* length: */ 4
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/* UPD ID: */ 2
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/* reset GPIO: */ 15
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/* reserved: */ 0 0>;
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};
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&wifi {
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status = "okay";
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qcom,rproc = <&q6_wcss_pd1>;
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qcom,ath11k-calibration-variant = "Linksys-MX2000";
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qcom,ath11k-fw-memory-mode = <1>;
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qcom,bdf-addr = <0x4c400000>;
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};
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&wifi1 {
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status = "okay";
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qcom,rproc = <&q6_wcss_pd2>;
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qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
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qcom,ath11k-calibration-variant = "Linksys-MX2000";
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qcom,ath11k-fw-memory-mode = <1>;
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qcom,bdf-addr = <0x4d100000>;
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qcom,m3-dump-addr = <0x4df00000>;
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};
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