mirror of
https://github.com/openwrt/openwrt.git
synced 2026-06-17 14:50:15 +04:00
Christian Marangi
a66e30631c
Align the qualcommax target to the pattern already used on other devices where the device DTS are placed in a dedicated directory separate from the files directory. This, while trying to enforce a common pattern for every target, also permits to do modification to device DTS without having to trigger a recompilation of the entire kernel (as the files directory is not touched) Link: https://github.com/openwrt/openwrt/pull/22037 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
534 lines
9.7 KiB
Devicetree
534 lines
9.7 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/* Copyright (c) 2021, Dirk Buchwalder <buchwalder@posteo.de> */
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/dts-v1/;
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#include "ipq8074.dtsi"
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#include "ipq8074-hk-cpu.dtsi"
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#include "ipq8074-ess.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "QNAP 301w";
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compatible = "qnap,301w", "qcom,ipq8074";
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aliases {
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serial0 = &blsp1_uart5;
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/*
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* Aliases as required by u-boot
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* to patch MAC addresses
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*/
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led-boot = &led_system_red;
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led-failsafe = &led_system_red;
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led-running = &led_pwr_green;
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led-upgrade = &led_system_red;
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ethernet0 = &dp1;
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ethernet1 = &dp2;
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ethernet2 = &dp3;
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ethernet3 = &dp4;
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ethernet4 = &dp5;
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ethernet5 = &dp6_syn;
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label-mac-device = &dp1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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wps-button {
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label = "wps";
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gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset-button {
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label = "reset";
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gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&leds_pins>;
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pinctrl-names = "default";
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led_system_green: led-system-green {
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gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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};
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led_system_red: led-system-red {
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gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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};
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led_pwr_green: led-pwr-green {
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gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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};
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led-wifi-green {
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gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN;
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};
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led-lan4-green {
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gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <4>;
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};
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led-lan4-amber {
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gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <4>;
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};
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led-lan3-green {
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gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <3>;
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};
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led-lan3-amber {
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gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <3>;
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};
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led-lan2-green {
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gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <2>;
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};
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led-lan2-amber {
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gpios = <&tlmm 13 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <2>;
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};
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led-lan1-green {
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gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <1>;
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};
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led-lan1-amber {
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gpios = <&tlmm 15 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <1>;
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};
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led-10g-1-green {
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gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = "10g";
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function-enumerator = <1>;
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};
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led-10g-1-amber {
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gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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function = "10g";
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function-enumerator = <1>;
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};
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led-10g-2-green {
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gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = "10g";
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function-enumerator = <2>;
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};
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led-10g-2-amber {
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gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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function = "10g";
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function-enumerator = <2>;
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};
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};
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};
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&tlmm {
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mdio_pins: mdio-state {
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mdc-pins {
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pins = "gpio68";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio-pins {
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pins = "gpio69";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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button_pins: button-state {
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wps-pins {
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pins = "gpio57";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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rst-pins {
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pins = "gpio67";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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leds_pins: leds-state {
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pins = "gpio1", "gpio3", "gpio4", "gpio6", "gpio7", "gpio8",
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"gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio42",
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"gpio51", "gpio52", "gpio54", "gpio56";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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&blsp1_uart5 {
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status = "okay";
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};
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&prng {
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status = "okay";
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};
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&ssphy_0 {
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status = "okay";
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};
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&qusb_phy_0 {
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status = "okay";
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};
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&ssphy_1 {
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status = "okay";
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};
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&qusb_phy_1 {
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status = "okay";
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};
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&usb_0 {
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status = "okay";
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};
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&usb_1 {
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&crypto {
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status = "okay";
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};
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&qpic_bam {
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status = "okay";
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};
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&blsp1_spi1 { /* BLSP1 QUP1 */
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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reg = <0>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "0:sbl1";
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reg = <0x0 0x50000>;
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read-only;
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};
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partition@50000 {
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label = "0:mibib";
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reg = <0x50000 0x10000>;
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read-only;
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};
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partition@60000 {
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label = "0:qsee";
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reg = <0x60000 0x180000>;
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read-only;
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};
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partition@1e0000 {
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label = "0:devcfg";
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reg = <0x1e0000 0x10000>;
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read-only;
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};
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partition@1f0000 {
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label = "0:apdp";
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reg = <0x1f0000 0x10000>;
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read-only;
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};
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partition@200000 {
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label = "0:rpm";
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reg = <0x200000 0x40000>;
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read-only;
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};
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partition@240000 {
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label = "0:cdt";
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reg = <0x240000 0x10000>;
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read-only;
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};
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partition@250000 {
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label = "0:appsblenv";
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reg = <0x250000 0x20000>;
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};
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partition@270000 {
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label = "0:appsbl";
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reg = <0x250000 0x100000>;
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read-only;
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};
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partition@370000 {
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label = "0:art";
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reg = <0x370000 0x40000>;
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read-only;
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};
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partition@3b0000 {
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label = "0:ethphyfw1";
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reg = <0x3b0000 0x80000>;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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aqr0_fw: firmware@0 {
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reg = <0x0 0x5fc02>;
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};
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};
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};
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partition@430000 {
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label = "0:ethphyfw2";
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reg = <0x430000 0x80000>;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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aqr1_fw: firmware@0 {
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reg = <0x0 0x5fc02>;
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};
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};
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};
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partition@4b0000 {
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label = "reserved";
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reg = <0x4b0000 0x350000>;
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};
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};
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};
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
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aqr113c_0: ethernet-phy@0 {
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compatible ="ethernet-phy-ieee802.3-c45";
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reg = <0>;
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reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
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firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x0_ID44778_VER1630.cld";
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nvmem-cell-names = "firmware";
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nvmem-cells = <&aqr0_fw>;
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};
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aqr113c_8: ethernet-phy@8 {
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compatible ="ethernet-phy-ieee802.3-c45";
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reg = <8>;
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reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
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firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x8_ID44776_VER1630.cld";
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nvmem-cell-names = "firmware";
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nvmem-cells = <&aqr1_fw>;
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};
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ethernet-phy-package@16 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,qca8075-package";
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reg = <16>;
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qcom,package-mode = "qsgmii";
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qca8075_16: ethernet-phy@16 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <16>;
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};
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qca8075_17: ethernet-phy@17 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <17>;
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};
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qca8075_18: ethernet-phy@18 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <18>;
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};
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qca8075_19: ethernet-phy@19 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <19>;
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};
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};
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};
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&sdhc_1 {
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status = "okay";
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/* According to the stock dts from the QNAP gpl drop
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* the emmc has a problem with the hs400 > hs200 speed switch.
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* Therefore remove the mmc-hs400-1_8v property
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*/
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/delete-property/ mmc-hs400-1_8v;
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mmc-hs200-1_8v;
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mmc-ddr-1_8v;
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vqmmc-supply = <&l11>;
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};
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&switch {
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status = "okay";
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switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>; /* lan port bitmap */
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switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
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switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
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switch_mac_mode1 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance1*/
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switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
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qcom,port_phyinfo {
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port@0 {
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port_id = <1>;
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phy_address = <16>;
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};
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port@1 {
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port_id = <2>;
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phy_address = <17>;
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};
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port@2 {
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port_id = <3>;
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phy_address = <18>;
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};
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port@3 {
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port_id = <4>;
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phy_address = <19>;
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};
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port@4 {
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port_id = <5>;
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phy_address = <8>;
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compatible = "ethernet-phy-ieee802.3-c45";
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ethernet-phy-ieee802.3-c45;
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};
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port@5 {
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port_id = <6>;
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phy_address = <0>;
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compatible = "ethernet-phy-ieee802.3-c45";
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ethernet-phy-ieee802.3-c45;
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};
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};
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};
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&edma {
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status = "okay";
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};
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&dp1 {
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status = "okay";
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phy-mode = "qsgmii";
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phy-handle = <&qca8075_16>;
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label = "lan4";
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};
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&dp2 {
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status = "okay";
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phy-mode = "qsgmii";
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phy-handle = <&qca8075_17>;
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label = "lan3";
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};
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&dp3 {
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status = "okay";
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phy-mode = "qsgmii";
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phy-handle = <&qca8075_18>;
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label = "lan2";
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};
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&dp4 {
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status = "okay";
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phy-mode = "qsgmii";
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phy-handle = <&qca8075_19>;
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label = "lan1";
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};
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&dp5 {
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status = "okay";
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qcom,mactype = <1>;
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phy-mode = "usxgmii";
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phy-handle = <&aqr113c_8>;
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label = "10g-1";
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};
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&dp6_syn {
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status = "okay";
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phy-mode = "usxgmii";
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phy-handle = <&aqr113c_0>;
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label = "10g-2";
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};
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&wifi {
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status = "okay";
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qcom,ath11k-calibration-variant = "QNAP-301w";
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};
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