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Paul Spooren
936617ab59
The firmware images of Layerscape boards booting from QSPI, e.g. the LS1046A-FRWY, differ between builds in 4 bytes at the end of the PBL: -00009e80: 019f 1e98 0000 0000 0000 0000 0000 0000 +00009e80: e10f e4a8 0000 0000 0000 0000 0000 0000 byte_swap pads the PBL to a multiple of 8 bytes from a 4 byte variable, so fwrite() reads up to 4 bytes of the stack past it, and an aligned PBL always gets 8 bytes appended, 4 of them random. Add a patch that pads with an 8 byte buffer of zeros. The output keeps its length and layout: for an aligned input only the 4 former random bytes become zeros, an unaligned input gives the same output as before. Link: https://github.com/openwrt/openwrt/pull/25720 Signed-off-by: Paul Spooren <mail@aparcar.org>