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Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.62 Manually rebased: bcm27xx/patches-6.12/950-0358-mmc-sdhci-of-dwcmshc-define-sdio-timeout-clocks.patch Removed upstreamed: backport-6.12/830-v6.18-spi-bcm63xx-fix-premature-CS-deassertion-on-RX-only-transactions.patch[1] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.62&id=e31194bf494f6900a5f96f55ed194a00e458f8d1 Build system: x86/64 Build-tested: flogic/glinet_gl-mt6000, ramips/tplink_archer-a6-v3, x86/64-glibc Run-tested: flogic/glinet_gl-mt6000, ramips/tplink_archer-a6-v3, x86/64-glibc Signed-off-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/21126 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
45 lines
1.8 KiB
Diff
45 lines
1.8 KiB
Diff
From 79cf71c0b177c0e23d411e2469435e2c2f83f563 Mon Sep 17 00:00:00 2001
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From: Shawn Lin <shawn.lin@rock-chips.com>
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Date: Wed, 26 Nov 2025 07:26:40 +0800
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Subject: [PATCH] mmc: sdhci-of-dwcmshc: reduce CIT for better performance
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CQHCI_SSC1.CIT indicates to the CQE the polling period to use for
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periodic SEND_QUEUE_STATUS (CMD13) polling. Some eMMCs have only one
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hardware queue, and CMD13 can only query one slot at a time for data
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transmission, which cannot be processed in parallel. Modifying the
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CMD13 query interval can increase the query frequency and improve
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random write performance.
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Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
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Acked-by: Adrian Hunter <adrian.hunter@intel.com>
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Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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---
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drivers/mmc/host/cqhci.h | 1 +
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drivers/mmc/host/sdhci-of-dwcmshc.c | 5 +++++
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2 files changed, 6 insertions(+)
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--- a/drivers/mmc/host/cqhci.h
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+++ b/drivers/mmc/host/cqhci.h
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@@ -93,6 +93,7 @@
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/* send status config 1 */
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#define CQHCI_SSC1 0x40
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#define CQHCI_SSC1_CBC_MASK GENMASK(19, 16)
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+#define CQHCI_SSC1_CIT_MASK GENMASK(15, 0)
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/* send status config 2 */
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#define CQHCI_SSC2 0x44
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--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
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+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
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@@ -627,6 +627,11 @@ static void rk35xx_sdhci_cqe_pre_enable(
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struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host);
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u32 reg;
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+ /* Set Send Status Command Idle Timer to 10.66us (256 * 1 / 24) */
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+ reg = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_SSC1);
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+ reg = (reg & ~CQHCI_SSC1_CIT_MASK) | 0x0100;
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+ sdhci_writel(host, reg, dwc_priv->vendor_specific_area2 + CQHCI_SSC1);
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+
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reg = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_CFG);
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reg |= CQHCI_ENABLE;
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sdhci_writel(host, reg, dwc_priv->vendor_specific_area2 + CQHCI_CFG);
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