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AN7581 SoC have more GPIOs. PCIE reset pins can be muxed to gpio,
so we have 50 GPIOs instead of 47.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/24646
(cherry picked from commit 9ccec981f5)
Link: https://github.com/openwrt/openwrt/pull/24884
Signed-off-by: Robert Marko <robimarko@gmail.com>