mirror of
https://github.com/openwrt/openwrt.git
synced 2026-10-25 14:47:58 +04:00
Gennaro Cimmino
d795c6a464
Common code reaches the source MACs of the two families in two ways: RTL930x callers add L3_EGRESS_DMACS to an index of its egress MAC table, which holds destination and source MACs alike, while RTL839x writes its switch MAC entries through set_switch_mac(). Give both the same pair, get_smac() and set_smac(), on the index of the source MAC entry: RTL839x reads and writes ROUTING_SA_CTRL, RTL930x adds L3_EGRESS_DMACS itself, so the layout of its table stays in the RTL930x code. The accessors report a failed table access, and the callers act on it where they can. An egress interface whose source MAC cannot be written is not taken, and its route is not offloaded; nor is a switch MAC entry that cannot be written, and its route keeps to the CPU. The allocator skips a source MAC it cannot read: it is neither free nor a match. An interface that cannot take its device's new MAC keeps the old one, as when none is free. A source MAC that cannot be cleared when its last route goes, or at RTL930x setup, is logged; a failed setup would fail the whole switch probe. The RTL930x next hop dump prints "-" for one it cannot read. Before, all of these were ignored. The egress interface allocator returns -ENOSPC rather than -1 when none is free, as otto_l3_dmac_get() and otto_l3_switch_mac_get() do. RTL839x writes registers, which cannot fail, so it behaves as before. Tested on an HPE 1920-48G (RTL8393): a VLAN device with a MAC of its own takes switch MAC entry 1, frames to it are routed in hardware, and the entry is freed when the routes holding it go. RTL930x compile-tested only. Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Gennaro Cimmino <gcimmino@rayonra.net> Link: https://github.com/openwrt/openwrt/pull/25852 Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>