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Julius Bairaktaris
a11f6f7963
Add the TX completion, RX fill and RX descriptor interrupts of ring sets 22/6/14, 21/5/13 and 20/4/12. The lines count down from the first set's: TX completion ring n is SPI 355 + n, RX fill ring n SPI 347 + n and RX descriptor ring n SPI 331 + n, each read from the GIC pending state on a Linksys MR7350 with only that ring's interrupt unmasked. Link: https://github.com/openwrt/openwrt/pull/25663#issuecomment-6194790602 Assisted-by: Claude:claude-opus-5 Signed-off-by: Julius Bairaktaris <julius@bairaktaris.de> Link: https://github.com/openwrt/openwrt/pull/25663 Signed-off-by: Robert Marko <robimarko@gmail.com>