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8758b58f25
Add relevant nodes for NPU support for Airoha AN7583 and enable the kernel config to enable support in the Airoha Ethernet driver. NPU firmware is scheduled to be upstreamed to linux-firmware and will be added once present upstream. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
227 lines
3.4 KiB
Devicetree
227 lines
3.4 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "an7583.dtsi"
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/ {
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model = "Airoha AN7583 Evaluation Board";
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compatible = "airoha,an7583-evb", "airoha,an7583", "airoha,en7583";
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aliases {
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serial0 = &uart1;
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};
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chosen {
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bootargs = "console=ttyS0,115200 earlycon";
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stdout-path = "serial0:115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x2 0x00000000>;
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};
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};
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&an7583_pinctrl {
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gpio-ranges = <&an7583_pinctrl 0 2 53>;
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mdio0_pins: mdio0-pins {
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conf {
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pins = "mdio_0";
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output-high;
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};
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};
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pcie0_rst_pins: pcie0-rst-pins {
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conf {
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pins = "pcie_reset0";
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drive-open-drain = <1>;
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};
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};
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pcie1_rst_pins: pcie1-rst-pins {
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conf {
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pins = "pcie_reset1";
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drive-open-drain = <1>;
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};
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};
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gswp1_led0_pins: gswp1-led0-pins {
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mux {
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function = "phy1_led0";
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pins = "gpio1";
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};
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};
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};
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&snfi {
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status = "okay";
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};
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&spi_nand {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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bl2@0 {
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label = "bl2";
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reg = <0x0 0x20000>;
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};
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ubi@20000 {
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label = "ubi";
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reg = <0x20000 0x0>;
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};
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};
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};
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&i2c0 {
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status = "okay";
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};
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&npu {
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status = "okay";
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};
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ð {
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status = "okay";
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};
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&gdm1 {
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status = "okay";
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};
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&switch {
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status = "okay";
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};
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&gsw_phy1 {
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pinctrl-names = "gbe-led";
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pinctrl-0 = <&gswp1_led0_pins>;
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status = "okay";
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};
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&gsw_phy1_led0 {
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status = "okay";
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active-low;
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};
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&gsw_port2 {
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status = "disabled";
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};
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&gsw_port3 {
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status = "disabled";
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};
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&gsw_port4 {
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status = "disabled";
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};
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&gsw_phy2 {
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status = "disabled";
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};
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&gsw_phy3 {
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status = "disabled";
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};
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&gsw_phy4 {
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status = "disabled";
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};
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&mdio_0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio0_pins>;
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/* Present but not HW connected to GDM port */
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/*
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* as21xx_0: ethernet-phy@1d {
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* reg = <0x1d>;
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* compatible = "ethernet-phy-ieee802.3-c45";
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* status = "disabled";
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*
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* firmware-name = "as21x1x_fw.bin";
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*
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* reset-deassert-us = <350000>;
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* reset-assert-us = <200000>;
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* reset-gpios = <&an7583_pinctrl 34 GPIO_ACTIVE_LOW>;
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*
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* leds {
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* #address-cells = <1>;
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* #size-cells = <0>;
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*
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* led@0 {
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* reg = <0>;
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* color = <LED_COLOR_ID_GREEN>;
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* function = LED_FUNCTION_LAN;
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* function-enumerator = <0>;
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* default-state = "keep";
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* };
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*
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* led@1 {
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* reg = <1>;
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* color = <LED_COLOR_ID_GREEN>;
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* function = LED_FUNCTION_LAN;
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* function-enumerator = <1>;
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* default-state = "keep";
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* };
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* };
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* };
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*/
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as21xx_1: ethernet-phy@1f {
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reg = <0x1f>;
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compatible = "ethernet-phy-ieee802.3-c45";
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firmware-name = "as21x1x_fw.bin";
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reset-deassert-us = <350000>;
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reset-assert-us = <200000>;
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reset-gpios = <&an7583_pinctrl 35 GPIO_ACTIVE_LOW>;
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <0>;
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default-state = "keep";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <1>;
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default-state = "keep";
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};
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};
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};
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};
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/* GDM2 seems to be connected to PON */
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/*
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*&gdm2 {
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* status = "disabled";
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*
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* phy-handle = <&as21xx_0>;
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* phy-mode = "usxgmii";
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*};
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*/
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&gdm3 {
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status = "okay";
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phy-handle = <&as21xx_1>;
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phy-mode = "usxgmii";
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};
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