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https://github.com/openwrt/openwrt.git
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Christian Marangi
c5b12fc02a
Introduce initial support for Airoha AN7583 SoC and add all the required patch for basic functionality of the SoC. Airoha AN7583 is based on Airoha EN7581 SoC with some major changes on the PHY handling and Serdes. It can be see as a lower spec of EN7581 with modern and simplified implementations. All the patch are sent upstream and are pending revision. Support for PCIe and USB will come later as soon as DT structure is accepted upstream. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
195 lines
6.7 KiB
Diff
195 lines
6.7 KiB
Diff
From 7d55e75edc87022a4c1820588f70a80cebb13c5f Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Fri, 23 May 2025 19:34:54 +0200
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Subject: [PATCH 1/5] thermal: airoha: convert to regmap API
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In preparation for support of Airoha AN7583, convert the driver to
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regmap API. This is needed as Airoha AN7583 will be based on syscon
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regmap.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/thermal/airoha_thermal.c | 72 +++++++++++++++++++-------------
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1 file changed, 42 insertions(+), 30 deletions(-)
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--- a/drivers/thermal/airoha_thermal.c
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+++ b/drivers/thermal/airoha_thermal.c
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@@ -194,7 +194,7 @@
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#define AIROHA_MAX_SAMPLES 6
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struct airoha_thermal_priv {
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- void __iomem *base;
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+ struct regmap *map;
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struct regmap *chip_scu;
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struct resource scu_adc_res;
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@@ -265,8 +265,8 @@ static int airoha_thermal_set_trips(stru
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RAW_TO_TEMP(priv, FIELD_MAX(EN7581_DOUT_TADC_MASK)));
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/* We offset the high temp of 1°C to trigger correct event */
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- writel(TEMP_TO_RAW(priv, high) >> 4,
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- priv->base + EN7581_TEMPOFFSETH);
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+ regmap_write(priv->map, EN7581_TEMPOFFSETH,
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+ TEMP_TO_RAW(priv, high) >> 4);
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enable_monitor = true;
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}
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@@ -277,15 +277,15 @@ static int airoha_thermal_set_trips(stru
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RAW_TO_TEMP(priv, FIELD_MAX(EN7581_DOUT_TADC_MASK)));
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/* We offset the low temp of 1°C to trigger correct event */
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- writel(TEMP_TO_RAW(priv, low) >> 4,
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- priv->base + EN7581_TEMPOFFSETL);
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+ regmap_write(priv->map, EN7581_TEMPOFFSETL,
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+ TEMP_TO_RAW(priv, high) >> 4);
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enable_monitor = true;
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}
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/* Enable sensor 0 monitor after trip are set */
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if (enable_monitor)
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- writel(EN7581_SENSE0_EN, priv->base + EN7581_TEMPMONCTL0);
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+ regmap_write(priv->map, EN7581_TEMPMONCTL0, EN7581_SENSE0_EN);
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return 0;
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}
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@@ -302,7 +302,7 @@ static irqreturn_t airoha_thermal_irq(in
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bool update = false;
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u32 status;
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- status = readl(priv->base + EN7581_TEMPMONINTSTS);
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+ regmap_read(priv->map, EN7581_TEMPMONINTSTS, &status);
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switch (status & (EN7581_HOFSINTSTS0 | EN7581_LOFSINTSTS0)) {
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case EN7581_HOFSINTSTS0:
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event = THERMAL_TRIP_VIOLATED;
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@@ -318,7 +318,7 @@ static irqreturn_t airoha_thermal_irq(in
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}
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/* Reset Interrupt */
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- writel(status, priv->base + EN7581_TEMPMONINTSTS);
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+ regmap_write(priv->map, EN7581_TEMPMONINTSTS, status);
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if (update)
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thermal_zone_device_update(priv->tz, event);
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@@ -336,11 +336,11 @@ static void airoha_thermal_setup_adc_val
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/* sleep 10 ms for ADC to enable */
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usleep_range(10 * USEC_PER_MSEC, 11 * USEC_PER_MSEC);
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- efuse_calib_info = readl(priv->base + EN7581_EFUSE_TEMP_OFFSET_REG);
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+ regmap_read(priv->map, EN7581_EFUSE_TEMP_OFFSET_REG, &efuse_calib_info);
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if (efuse_calib_info) {
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priv->default_offset = FIELD_GET(EN7581_EFUSE_TEMP_OFFSET, efuse_calib_info);
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/* Different slope are applied if the sensor is used for CPU or for package */
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- cpu_sensor = readl(priv->base + EN7581_EFUSE_TEMP_CPU_SENSOR_REG);
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+ regmap_read(priv->map, EN7581_EFUSE_TEMP_CPU_SENSOR_REG, &cpu_sensor);
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if (cpu_sensor) {
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priv->default_slope = EN7581_SLOPE_X100_DIO_DEFAULT;
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priv->init_temp = EN7581_INIT_TEMP_FTK_X10;
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@@ -359,8 +359,8 @@ static void airoha_thermal_setup_adc_val
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static void airoha_thermal_setup_monitor(struct airoha_thermal_priv *priv)
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{
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/* Set measure mode */
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- writel(FIELD_PREP(EN7581_MSRCTL0, EN7581_MSRCTL_6SAMPLE_MAX_MIX_AVG4),
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- priv->base + EN7581_TEMPMSRCTL0);
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+ regmap_write(priv->map, EN7581_TEMPMSRCTL0,
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+ FIELD_PREP(EN7581_MSRCTL0, EN7581_MSRCTL_6SAMPLE_MAX_MIX_AVG4));
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/*
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* Configure ADC valid reading addr
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@@ -375,15 +375,15 @@ static void airoha_thermal_setup_monitor
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* We set valid instead of volt as we don't enable valid/volt
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* split reading and AHB read valid addr in such case.
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*/
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- writel(priv->scu_adc_res.start + EN7581_DOUT_TADC,
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- priv->base + EN7581_TEMPADCVALIDADDR);
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+ regmap_write(priv->map, EN7581_TEMPADCVALIDADDR,
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+ priv->scu_adc_res.start + EN7581_DOUT_TADC);
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/*
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* Configure valid bit on a fake value of bit 16. The ADC outputs
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* max of 2 bytes for voltage.
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*/
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- writel(FIELD_PREP(EN7581_ADV_RD_VALID_POS, 16),
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- priv->base + EN7581_TEMPADCVALIDMASK);
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+ regmap_write(priv->map, EN7581_TEMPADCVALIDMASK,
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+ FIELD_PREP(EN7581_ADV_RD_VALID_POS, 16));
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/*
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* AHB supports max 12 bytes for ADC voltage. Shift the read
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@@ -391,40 +391,52 @@ static void airoha_thermal_setup_monitor
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* in the order of half a °C and is acceptable in the context
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* of triggering interrupt in critical condition.
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*/
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- writel(FIELD_PREP(EN7581_ADC_VOLTAGE_SHIFT, 4),
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- priv->base + EN7581_TEMPADCVOLTAGESHIFT);
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+ regmap_write(priv->map, EN7581_TEMPADCVOLTAGESHIFT,
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+ FIELD_PREP(EN7581_ADC_VOLTAGE_SHIFT, 4));
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/* BUS clock is 300MHz counting unit is 3 * 68.64 * 256 = 52.715us */
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- writel(FIELD_PREP(EN7581_PERIOD_UNIT, 3),
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- priv->base + EN7581_TEMPMONCTL1);
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+ regmap_write(priv->map, EN7581_TEMPMONCTL1,
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+ FIELD_PREP(EN7581_PERIOD_UNIT, 3));
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/*
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* filt interval is 1 * 52.715us = 52.715us,
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* sen interval is 379 * 52.715us = 19.97ms
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*/
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- writel(FIELD_PREP(EN7581_FILT_INTERVAL, 1) |
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- FIELD_PREP(EN7581_FILT_INTERVAL, 379),
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- priv->base + EN7581_TEMPMONCTL2);
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+ regmap_write(priv->map, EN7581_TEMPMONCTL2,
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+ FIELD_PREP(EN7581_FILT_INTERVAL, 1) |
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+ FIELD_PREP(EN7581_FILT_INTERVAL, 379));
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/* AHB poll is set to 146 * 68.64 = 10.02us */
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- writel(FIELD_PREP(EN7581_ADC_POLL_INTVL, 146),
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- priv->base + EN7581_TEMPAHBPOLL);
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+ regmap_write(priv->map, EN7581_TEMPAHBPOLL,
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+ FIELD_PREP(EN7581_ADC_POLL_INTVL, 146));
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}
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+static const struct regmap_config airoha_thermal_regmap_config = {
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+ .reg_bits = 32,
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+ .reg_stride = 4,
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+ .val_bits = 32,
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+};
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+
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static int airoha_thermal_probe(struct platform_device *pdev)
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{
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struct airoha_thermal_priv *priv;
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struct device_node *chip_scu_np;
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struct device *dev = &pdev->dev;
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+ void __iomem *base;
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int irq, ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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- priv->base = devm_platform_ioremap_resource(pdev, 0);
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- if (IS_ERR(priv->base))
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- return PTR_ERR(priv->base);
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+ base = devm_platform_ioremap_resource(pdev, 0);
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+ if (IS_ERR(base))
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+ return PTR_ERR(base);
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+
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+ priv->map = devm_regmap_init_mmio(dev, base,
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+ &airoha_thermal_regmap_config);
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+ if (IS_ERR(priv->map))
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+ return PTR_ERR(priv->map);
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chip_scu_np = of_parse_phandle(dev->of_node, "airoha,chip-scu", 0);
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if (!chip_scu_np)
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@@ -462,8 +474,8 @@ static int airoha_thermal_probe(struct p
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platform_set_drvdata(pdev, priv);
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/* Enable LOW and HIGH interrupt */
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- writel(EN7581_HOFSINTEN0 | EN7581_LOFSINTEN0,
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- priv->base + EN7581_TEMPMONINT);
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+ regmap_write(priv->map, EN7581_TEMPMONINT,
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+ EN7581_HOFSINTEN0 | EN7581_LOFSINTEN0);
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return 0;
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}
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