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This allows us use more easily port en7581 drivers to en7523. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Link: https://github.com/openwrt/openwrt/pull/20365 Signed-off-by: Robert Marko <robimarko@gmail.com>
178 lines
6.0 KiB
Diff
178 lines
6.0 KiB
Diff
From 37de26f9d2f55cd74af55cb29c2860b5989bb728 Mon Sep 17 00:00:00 2001
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From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Date: Sat, 20 Sep 2025 03:57:25 +0300
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Subject: [PATCH 2/3] clk: en7523: Add reset-controller support for EN7523 SoC
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Introduce reset API support to EN7523 clock driver. EN7523 uses the
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same reset logic as EN7581, so just reuse existing code.
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Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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---
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drivers/clk/clk-en7523.c | 96 ++++++++++++++++++++++++++++------------
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1 file changed, 67 insertions(+), 29 deletions(-)
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--- a/drivers/clk/clk-en7523.c
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+++ b/drivers/clk/clk-en7523.c
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@@ -11,6 +11,7 @@
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#include <linux/regmap.h>
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#include <linux/reset-controller.h>
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#include <dt-bindings/clock/en7523-clk.h>
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+#include <dt-bindings/reset/airoha,en7523-reset.h>
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#include <dt-bindings/reset/airoha,en7581-reset.h>
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#include <dt-bindings/reset/airoha,an7583-reset.h>
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@@ -452,6 +453,53 @@ static const u16 en7581_rst_ofs[] = {
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REG_RST_CTRL1,
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};
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+static const u16 en7523_rst_map[] = {
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+ /* RST_CTRL2 */
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+ [EN7523_XPON_PHY_RST] = 0,
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+ [EN7523_XSI_MAC_RST] = 7,
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+ [EN7523_XSI_PHY_RST] = 8,
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+ [EN7523_NPU_RST] = 9,
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+ [EN7523_I2S_RST] = 10,
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+ [EN7523_TRNG_RST] = 11,
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+ [EN7523_TRNG_MSTART_RST] = 12,
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+ [EN7523_DUAL_HSI0_RST] = 13,
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+ [EN7523_DUAL_HSI1_RST] = 14,
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+ [EN7523_HSI_RST] = 15,
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+ [EN7523_DUAL_HSI0_MAC_RST] = 16,
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+ [EN7523_DUAL_HSI1_MAC_RST] = 17,
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+ [EN7523_HSI_MAC_RST] = 18,
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+ [EN7523_WDMA_RST] = 19,
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+ [EN7523_WOE0_RST] = 20,
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+ [EN7523_WOE1_RST] = 21,
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+ [EN7523_HSDMA_RST] = 22,
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+ [EN7523_I2C2RBUS_RST] = 23,
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+ [EN7523_TDMA_RST] = 24,
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+ /* RST_CTRL1 */
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+ [EN7523_PCM1_ZSI_ISI_RST] = RST_NR_PER_BANK + 0,
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+ [EN7523_FE_PDMA_RST] = RST_NR_PER_BANK + 1,
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+ [EN7523_FE_QDMA_RST] = RST_NR_PER_BANK + 2,
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+ [EN7523_PCM_SPIWP_RST] = RST_NR_PER_BANK + 4,
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+ [EN7523_CRYPTO_RST] = RST_NR_PER_BANK + 6,
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+ [EN7523_TIMER_RST] = RST_NR_PER_BANK + 8,
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+ [EN7523_PCM1_RST] = RST_NR_PER_BANK + 11,
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+ [EN7523_UART_RST] = RST_NR_PER_BANK + 12,
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+ [EN7523_GPIO_RST] = RST_NR_PER_BANK + 13,
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+ [EN7523_GDMA_RST] = RST_NR_PER_BANK + 14,
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+ [EN7523_I2C_MASTER_RST] = RST_NR_PER_BANK + 16,
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+ [EN7523_PCM2_ZSI_ISI_RST] = RST_NR_PER_BANK + 17,
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+ [EN7523_SFC_RST] = RST_NR_PER_BANK + 18,
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+ [EN7523_UART2_RST] = RST_NR_PER_BANK + 19,
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+ [EN7523_GDMP_RST] = RST_NR_PER_BANK + 20,
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+ [EN7523_FE_RST] = RST_NR_PER_BANK + 21,
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+ [EN7523_USB_HOST_P0_RST] = RST_NR_PER_BANK + 22,
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+ [EN7523_GSW_RST] = RST_NR_PER_BANK + 23,
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+ [EN7523_SFC2_PCM_RST] = RST_NR_PER_BANK + 25,
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+ [EN7523_PCIE0_RST] = RST_NR_PER_BANK + 26,
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+ [EN7523_PCIE1_RST] = RST_NR_PER_BANK + 27,
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+ [EN7523_PCIE_HB_RST] = RST_NR_PER_BANK + 29,
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+ [EN7523_XPON_MAC_RST] = RST_NR_PER_BANK + 31,
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+};
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+
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static const u16 en7581_rst_map[] = {
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/* RST_CTRL2 */
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[EN7581_XPON_PHY_RST] = 0,
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@@ -564,6 +612,9 @@ static const u16 an7583_rst_map[] = {
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[AN7583_XPON_MAC_RST] = RST_NR_PER_BANK + 31,
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};
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+static int en7581_reset_register(struct device *dev, struct regmap *map,
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+ const u16 *rst_map, int nr_resets);
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+
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static u32 en7523_get_base_rate(const struct en_clk_desc *desc, u32 val)
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{
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if (!desc->base_bits)
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@@ -942,6 +993,7 @@ static int en7523_clk_hw_init(struct pla
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{
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void __iomem *base, *np_base;
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struct regmap *map, *clk_map;
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+ int err;
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base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(base))
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@@ -961,7 +1013,13 @@ static int en7523_clk_hw_init(struct pla
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if (IS_ERR(clk_map))
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return PTR_ERR(clk_map);
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- return en75xx_register_clocks(&pdev->dev, soc_data, clk_data, map, clk_map);
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+
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+ err = en75xx_register_clocks(&pdev->dev, soc_data, clk_data, map, clk_map);
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+ if (err)
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+ return err;
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+
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+ return en7581_reset_register(&pdev->dev, clk_map, en7523_rst_map,
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+ ARRAY_SIZE(en7523_rst_map));
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}
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static int en7523_reset_update(struct reset_controller_dev *rcdev,
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@@ -1016,7 +1074,8 @@ static const struct reset_control_ops en
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.status = en7523_reset_status,
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};
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-static int en7581_reset_register(struct device *dev, struct regmap *map)
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+static int en7581_reset_register(struct device *dev, struct regmap *map,
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+ const u16 *rst_map, int nr_resets)
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{
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struct en_rst_data *rst_data;
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@@ -1025,10 +1084,10 @@ static int en7581_reset_register(struct
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return -ENOMEM;
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rst_data->bank_ofs = en7581_rst_ofs;
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- rst_data->idx_map = en7581_rst_map;
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+ rst_data->idx_map = rst_map;
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rst_data->map = map;
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- rst_data->rcdev.nr_resets = ARRAY_SIZE(en7581_rst_map);
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+ rst_data->rcdev.nr_resets = nr_resets;
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rst_data->rcdev.of_xlate = en7523_reset_xlate;
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rst_data->rcdev.ops = &en7581_reset_ops;
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rst_data->rcdev.of_node = dev->of_node;
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@@ -1073,30 +1132,8 @@ static int en7581_clk_hw_init(struct pla
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regmap_update_bits(clk_map, REG_NP_SCU_PCIC, REG_PCIE_CTRL,
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FIELD_PREP(REG_PCIE_CTRL, 3));
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- return en7581_reset_register(&pdev->dev, clk_map);
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-}
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-
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-static int an7583_reset_register(struct device *dev, struct regmap *map)
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-{
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- struct en_rst_data *rst_data;
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-
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- rst_data = devm_kzalloc(dev, sizeof(*rst_data), GFP_KERNEL);
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- if (!rst_data)
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- return -ENOMEM;
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-
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- rst_data->bank_ofs = en7581_rst_ofs;
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- rst_data->idx_map = an7583_rst_map;
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- rst_data->map = map;
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-
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- rst_data->rcdev.nr_resets = ARRAY_SIZE(an7583_rst_map);
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- rst_data->rcdev.of_xlate = en7523_reset_xlate;
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- rst_data->rcdev.ops = &en7581_reset_ops;
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- rst_data->rcdev.of_node = dev->of_node;
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- rst_data->rcdev.of_reset_n_cells = 1;
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- rst_data->rcdev.owner = THIS_MODULE;
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- rst_data->rcdev.dev = dev;
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-
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- return devm_reset_controller_register(dev, &rst_data->rcdev);
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+ return en7581_reset_register(&pdev->dev, clk_map, en7581_rst_map,
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+ ARRAY_SIZE(en7581_rst_map));
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}
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static int an7583_clk_hw_init(struct platform_device *pdev,
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@@ -1129,7 +1166,8 @@ static int an7583_clk_hw_init(struct pla
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regmap_update_bits(clk_map, REG_NP_SCU_PCIC, REG_PCIE_CTRL,
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FIELD_PREP(REG_PCIE_CTRL, 3));
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- return an7583_reset_register(dev, clk_map);
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+ return en7581_reset_register(dev, clk_map, an7583_rst_map,
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+ ARRAY_SIZE(an7583_rst_map));
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}
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static int en7523_clk_probe(struct platform_device *pdev)
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