kernel: rtl8261n: Add support for Serdes RX swap

Datasheet claims this register bit is supposed to be set by default,
however it was found in practice to not be, and OEM drivers would set
this bit at the same time.

Signed-off-by: Richard Huynh <voxlympha@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20465
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Richard Huynh
2025-10-19 21:52:59 +11:00
committed by Christian Marangi
parent bd180e8905
commit 2b773bddeb
2 changed files with 7 additions and 0 deletions

View File

@@ -61,6 +61,7 @@ static int rtl826xb_probe(struct phy_device *phydev)
priv->phytype = (phydev->drv->phy_id == REALTEK_PHY_ID_RTL8261N) ? (RTK_PHYLIB_RTL8261N) : (RTK_PHYLIB_RTL8264B);
priv->isBasePort = (phydev->drv->phy_id == REALTEK_PHY_ID_RTL8261N) ? (1) : (((phydev->mdio.addr % 4) == 0) ? (1) : (0));
priv->pnswap_rx = device_property_read_bool(dev, "realtek,pnswap-rx");
priv->pnswap_tx = device_property_read_bool(dev, "realtek,pnswap-tx");
phydev->priv = priv;
@@ -125,6 +126,11 @@ static int rtkphy_config_init(struct phy_device *phydev)
}
#endif
if (priv->pnswap_rx)
phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
REALTEK_SERDES_GLOBAL_CFG,
REALTEK_HSI_INV);
if (priv->pnswap_tx)
phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
REALTEK_SERDES_GLOBAL_CFG,

View File

@@ -51,6 +51,7 @@ struct rtk_phy_priv {
uint8 isBasePort;
rt_phy_patch_db_t *patch;
bool pnswap_rx;
bool pnswap_tx;
};