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airoha: an7581: w1700k: fix RTL8261N PHY boot failure with increased reset timing

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Some W1700K and XR1701G boards with Realtek RTL8261N/RTL8261BE 10G PHYs
fail to bring up the USXGMII link on cold boot. The PHY enters a bad
state during initialization and the link stays down permanently until
power cycle.

Root cause: the GPIO reset assert/deassert timing (40ms/150ms) is too
short for the RTL8261N to complete its internal firmware load. The OEM
firmware uses 200ms/200ms.

Increase both PHY reset timings to 200ms/200ms to match OEM values.
Confirmed to fix intermittent boot failures on both W1700K (Gemtek)
and XR1701G boards.

Signed-off-by: Ryan Chen <rchen14b@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22564
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Ryan Chen
2026-03-06 13:44:32 -06:00
committed by Hauke Mehrtens
parent 54d2b5d779
commit 7be78e718e
1 changed files with 4 additions and 4 deletions
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target/linux/airoha/dts/an7581-w1700k-ubi.dts
+4 -4
View File
@@ -351,8 +351,8 @@
compatible = "ethernet-phy-ieee802.3-c45";
reg = <5>;
reset-gpios = <&en7581_pinctrl 46 GPIO_ACTIVE_LOW>;
reset-assert-us = <40000>;
reset-deassert-us = <150000>;
reset-assert-us = <200000>;
reset-deassert-us = <200000>;
interrupt-parent = <&en7581_pinctrl>;
interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
realtek,pnswap-tx;
@@ -363,8 +363,8 @@
compatible = "ethernet-phy-ieee802.3-c45";
reg = <8>;
reset-gpios = <&en7581_pinctrl 31 GPIO_ACTIVE_LOW>;
reset-assert-us = <40000>;
reset-deassert-us = <150000>;
reset-assert-us = <200000>;
reset-deassert-us = <200000>;
interrupt-parent = <&en7581_pinctrl>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
realtek,pnswap-tx;