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realtek: dts: rtl93xx: use macro for PHY port definitions
Use SWITCH_PORT_LED instead of full verbose port definitions to simplify and clean up the DTS. Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/23118 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Jonas Jelonek
committed by
Hauke Mehrtens
Hauke Mehrtens
parent
322f8e6771
commit
84233220d3
@@ -186,121 +186,23 @@
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan2";
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led-set = <0>;
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pcs-handle = <&serdes2>;
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phy-handle = <&phy0>;
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phy-mode = "10g-qxgmii";
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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led-set = <0>;
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pcs-handle = <&serdes2>;
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phy-handle = <&phy1>;
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phy-mode = "10g-qxgmii";
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};
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port@2 {
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reg = <2>;
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label = "lan4";
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led-set = <0>;
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pcs-handle = <&serdes2>;
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phy-handle = <&phy2>;
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phy-mode = "10g-qxgmii";
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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led-set = <0>;
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pcs-handle = <&serdes2>;
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phy-handle = <&phy3>;
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phy-mode = "10g-qxgmii";
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};
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SWITCH_PORT_LED(0, 2, 2, 0, 10g-qxgmii)
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SWITCH_PORT_LED(1, 1, 2, 0, 10g-qxgmii)
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SWITCH_PORT_LED(2, 4, 2, 0, 10g-qxgmii)
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SWITCH_PORT_LED(3, 3, 2, 0, 10g-qxgmii)
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port@8 {
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reg = <8>;
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label = "lan6";
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led-set = <0>;
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pcs-handle = <&serdes3>;
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phy-handle = <&phy8>;
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phy-mode = "10g-qxgmii";
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};
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port@9 {
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reg = <9>;
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label = "lan5";
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led-set = <0>;
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pcs-handle = <&serdes3>;
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phy-handle = <&phy9>;
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phy-mode = "10g-qxgmii";
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};
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port@10 {
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reg = <10>;
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label = "lan8";
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led-set = <0>;
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pcs-handle = <&serdes3>;
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phy-handle = <&phy10>;
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phy-mode = "10g-qxgmii";
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};
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port@11 {
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reg = <11>;
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label = "lan7";
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led-set = <0>;
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pcs-handle = <&serdes3>;
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phy-handle = <&phy11>;
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phy-mode = "10g-qxgmii";
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};
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SWITCH_PORT_LED(8, 6, 3, 0, 10g-qxgmii)
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SWITCH_PORT_LED(9, 5, 3, 0, 10g-qxgmii)
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SWITCH_PORT_LED(10, 8, 3, 0, 10g-qxgmii)
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SWITCH_PORT_LED(11, 7, 3, 0, 10g-qxgmii)
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port@16 {
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reg = <16>;
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label = "lan10";
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led-set = <0>;
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pcs-handle = <&serdes4>;
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phy-handle = <&phy16>;
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phy-mode = "10g-qxgmii";
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};
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port@17 {
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reg = <17>;
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label = "lan9";
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led-set = <0>;
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pcs-handle = <&serdes4>;
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phy-handle = <&phy17>;
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phy-mode = "10g-qxgmii";
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};
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port@18 {
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reg = <18>;
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label = "lan12";
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led-set = <0>;
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pcs-handle = <&serdes4>;
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phy-handle = <&phy18>;
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phy-mode = "10g-qxgmii";
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};
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port@19 {
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reg = <19>;
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label = "lan11";
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led-set = <0>;
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pcs-handle = <&serdes4>;
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phy-handle = <&phy19>;
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phy-mode = "10g-qxgmii";
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};
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SWITCH_PORT_LED(16, 10, 4, 0, 10g-qxgmii)
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SWITCH_PORT_LED(17, 9, 4, 0, 10g-qxgmii)
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SWITCH_PORT_LED(18, 12, 4, 0, 10g-qxgmii)
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SWITCH_PORT_LED(19, 11, 4, 0, 10g-qxgmii)
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port@24 {
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reg = <24>;
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label = "lan13";
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led-set = <1>;
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pcs-handle = <&serdes6>;
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phy-handle = <&phy24>;
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phy-mode = "usxgmii";
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};
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port@25 {
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reg = <25>;
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label = "lan14";
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led-set = <1>;
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pcs-handle = <&serdes7>;
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phy-handle = <&phy25>;
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phy-mode = "usxgmii";
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};
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SWITCH_PORT_LED(24, 13, 6, 1, usxgmii)
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SWITCH_PORT_LED(25, 14, 7, 1, usxgmii)
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SWITCH_PORT_SFP(26, 15, 8, 1, 0)
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SWITCH_PORT_SFP(27, 16, 9, 1, 1)
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@@ -149,77 +149,14 @@
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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pcs-handle = <&serdes2>;
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phy-handle = <&phy0>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@8 {
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reg = <8>;
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label = "lan2";
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pcs-handle = <&serdes3>;
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phy-handle = <&phy8>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@16 {
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reg = <16>;
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label = "lan3";
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pcs-handle = <&serdes4>;
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phy-handle = <&phy16>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@20 {
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reg = <20>;
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label = "lan4";
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pcs-handle = <&serdes5>;
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phy-handle = <&phy20>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@24 {
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reg = <24>;
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label = "lan5";
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pcs-handle = <&serdes6>;
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phy-handle = <&phy24>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@25 {
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reg = <25>;
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label = "lan6";
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pcs-handle = <&serdes7>;
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phy-handle = <&phy25>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@26 {
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reg = <26>;
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label = "lan7";
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pcs-handle = <&serdes8>;
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phy-handle = <&phy26>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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port@27 {
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reg = <27>;
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label = "lan8";
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pcs-handle = <&serdes9>;
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phy-handle = <&phy27>;
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phy-mode = "usxgmii";
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led-set = <0>;
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};
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SWITCH_PORT_LED(0, 1, 2, 0, usxgmii)
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SWITCH_PORT_LED(8, 2, 3, 0, usxgmii)
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SWITCH_PORT_LED(16, 3, 4, 0, usxgmii)
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SWITCH_PORT_LED(20, 4, 5, 0, usxgmii)
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SWITCH_PORT_LED(24, 5, 6, 0, usxgmii)
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SWITCH_PORT_LED(25, 6, 7, 0, usxgmii)
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SWITCH_PORT_LED(26, 7, 8, 0, usxgmii)
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SWITCH_PORT_LED(27, 8, 9, 0, usxgmii)
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/* Internal SoC */
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port@28 {
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