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realtek: arch: rtl-otto: change to __raw reads and writes

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The realtek target uses the readl and writel for register access to
switchcore and SoC bases. This works but if at some point the target
wants to enable CONFIG_SWAP_IO_SPACE, the register access breaks as
readl/writel would be operating in little endian as opposed to native.

Fix it by replacing the readl/writel used in register access macros to
a __raw variant which aligns with what upstream use for native endian
access to registers.

Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/23206
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
This commit is contained in:
Rustam Adilov
2026-05-03 14:35:25 +05:00
committed by Markus Stockhausen
parent 82ddc472d7
commit a03e379f5a
2 changed files with 4 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files
target/linux/realtek/files-6.18/arch/mips/include/asm/mach-rtl-otto/mach-rtl-otto.h
+2 -2
View File
@@ -15,8 +15,8 @@
#define RTL838X_SW_BASE ((volatile void *) 0xBB000000)
#define sw_r32(reg) readl(RTL838X_SW_BASE + reg)
#define sw_w32(val, reg) writel(val, RTL838X_SW_BASE + reg)
#define sw_r32(reg) __raw_readl(RTL838X_SW_BASE + reg)
#define sw_w32(val, reg) __raw_writel(val, RTL838X_SW_BASE + reg)
#define sw_w32_mask(clear, set, reg) sw_w32((sw_r32(reg) & ~(clear)) | (set), reg)
#define RTL838X_MODEL_NAME_INFO (0x00D4)
target/linux/realtek/files-6.18/arch/mips/rtl-otto/prom.c
+2 -2
View File
@@ -35,8 +35,8 @@
#define RTL931X_DRAM_CONFIG 0x14304c
#define soc_r32(reg) readl(RTL_SOC_BASE + reg)
#define soc_w32(val, reg) writel(val, RTL_SOC_BASE + reg)
#define soc_r32(reg) __raw_readl(RTL_SOC_BASE + reg)
#define soc_w32(val, reg) __raw_writel(val, RTL_SOC_BASE + reg)
struct rtl83xx_soc_info soc_info;
EXPORT_SYMBOL(soc_info);