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realtek: soc: add read/write execute bits
The RTL9607C NAT_TBL_ACCESS_CTRL register has 2 split execute bits for read and write operations and thus does not have command bit. Add the read/write execute bit to otto_table struct and change c_bit to signed where -1 is unused to make NAT_TBL_ACCESS_CTRL work. Signed-off-by: Rustam Adilov <adilov@tutamail.com> Link: https://github.com/openwrt/openwrt/pull/25136 Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
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Rustam Adilov authored and 
Markus Stockhausen committed
1 parent
bdc34d92af
commit
a74fa4bf4d
1 file changed
+43
-35
@@ -26,45 +26,49 @@ struct otto_table {
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u32 wr_data;
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u32 rd_data;
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s8 busy_bit;
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u8 c_bit;
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s8 c_bit;
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u8 t_bit;
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u8 rmode;
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u8 addr_lsb;
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u8 addr_msb;
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s8 rd_e_bit;
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s8 wr_e_bit;
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struct mutex lock;
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};
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/* One row per table access register: name, command register, status register,
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* write data window, read data window, how many data registers the window holds,
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* the busy status bit, the read/write bit, the shift the table type sits at,
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* whether the read/write bit is inverted, LSB and MSB of the address bit field.
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* whether the read/write bit is inverted, LSB and MSB of the address bit field
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* and read / write execute bits.
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* The enum, the descriptors and the per-register width limit are all generated
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* from here, so an entry cannot be described in one place and not in the others.
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*/
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#define OTTO_REG_LIST(_) \
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_(OTTO_REG_8380_L2, 0x6900, 0x6900, 0x6908, 0x6908, 3, -1, 15, 13, 1, 0, 12) \
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_(OTTO_REG_8380_0, 0x6914, 0x6914, 0x6918, 0x6918, 18, -1, 14, 12, 1, 0, 11) \
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_(OTTO_REG_8380_1, 0xA4C8, 0xA4C8, 0xA4CC, 0xA4CC, 6, -1, 14, 12, 1, 0, 11) \
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_(OTTO_REG_8390_L2, 0x1180, 0x1180, 0x1184, 0x1184, 3, -1, 16, 14, 0, 0, 13) \
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_(OTTO_REG_8390_0, 0x1190, 0x1190, 0x1194, 0x1194, 17, -1, 15, 12, 0, 0, 11) \
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_(OTTO_REG_8390_1, 0x6B80, 0x6B80, 0x6B84, 0x6B84, 4, -1, 14, 12, 0, 0, 11) \
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_(OTTO_REG_8390_2, 0x611C, 0x611C, 0x6120, 0x6120, 9, -1, 8, 6, 0, 0, 5) \
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_(OTTO_REG_9300_L2, 0xB320, 0xB320, 0xB334, 0xB334, 3, -1, 18, 16, 0, 0, 13) \
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_(OTTO_REG_9300_0, 0xB340, 0xB340, 0xB344, 0xB344, 19, -1, 16, 12, 0, 0, 11) \
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_(OTTO_REG_9300_1, 0xB3A0, 0xB3A0, 0xB3A4, 0xB3A4, 20, -1, 16, 13, 0, 0, 12) \
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_(OTTO_REG_9300_2, 0xCE04, 0xCE04, 0xCE08, 0xCE08, 6, -1, 14, 12, 0, 0, 11) \
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_(OTTO_REG_9300_HSB, 0xD600, 0xD600, 0xD604, 0xD604, 30, -1, 7, 6, 0, 0, 5) \
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_(OTTO_REG_9300_HSA, 0x7880, 0x7880, 0x7884, 0x7884, 22, -1, 9, 8, 0, 0, 7) \
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_(OTTO_REG_9310_0, 0x8500, 0x8500, 0x8508, 0x8508, 8, -1, 19, 15, 0, 0, 14) \
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_(OTTO_REG_9310_1, 0x40C0, 0x40C0, 0x40C4, 0x40C4, 22, -1, 16, 14, 0, 0, 13) \
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_(OTTO_REG_9310_2, 0x8528, 0x8528, 0x852C, 0x852C, 6, -1, 18, 14, 0, 0, 13) \
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_(OTTO_REG_9310_3, 0x0200, 0x0200, 0x0204, 0x0204, 9, -1, 15, 12, 0, 0, 11) \
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_(OTTO_REG_9310_4, 0x20dc, 0x20dc, 0x20e0, 0x20e0, 29, -1, 7, 6, 0, 0, 5) \
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_(OTTO_REG_9310_5, 0x7e1c, 0x7e1c, 0x7e20, 0x7e20, 53, -1, 8, 6, 0, 0, 5) \
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#define OTTO_REG_LIST(_) \
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_(OTTO_REG_8380_L2, 0x6900, 0x6900, 0x6908, 0x6908, 3, -1, 15, 13, 1, 0, 12, 16, 16) \
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_(OTTO_REG_8380_0, 0x6914, 0x6914, 0x6918, 0x6918, 18, -1, 14, 12, 1, 0, 11, 15, 15) \
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_(OTTO_REG_8380_1, 0xA4C8, 0xA4C8, 0xA4CC, 0xA4CC, 6, -1, 14, 12, 1, 0, 11, 15, 15) \
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_(OTTO_REG_8390_L2, 0x1180, 0x1180, 0x1184, 0x1184, 3, -1, 16, 14, 0, 0, 13, 17, 17) \
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_(OTTO_REG_8390_0, 0x1190, 0x1190, 0x1194, 0x1194, 17, -1, 15, 12, 0, 0, 11, 16, 16) \
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_(OTTO_REG_8390_1, 0x6B80, 0x6B80, 0x6B84, 0x6B84, 4, -1, 14, 12, 0, 0, 11, 15, 15) \
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_(OTTO_REG_8390_2, 0x611C, 0x611C, 0x6120, 0x6120, 9, -1, 8, 6, 0, 0, 5, 9, 9) \
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_(OTTO_REG_9300_L2, 0xB320, 0xB320, 0xB334, 0xB334, 3, -1, 18, 16, 0, 0, 13, 19, 19) \
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_(OTTO_REG_9300_0, 0xB340, 0xB340, 0xB344, 0xB344, 19, -1, 16, 12, 0, 0, 11, 17, 17) \
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_(OTTO_REG_9300_1, 0xB3A0, 0xB3A0, 0xB3A4, 0xB3A4, 20, -1, 16, 13, 0, 0, 12, 17, 17) \
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_(OTTO_REG_9300_2, 0xCE04, 0xCE04, 0xCE08, 0xCE08, 6, -1, 14, 12, 0, 0, 11, 15, 15) \
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_(OTTO_REG_9300_HSB, 0xD600, 0xD600, 0xD604, 0xD604, 30, -1, 7, 6, 0, 0, 5, 8, 8) \
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_(OTTO_REG_9300_HSA, 0x7880, 0x7880, 0x7884, 0x7884, 22, -1, 9, 8, 0, 0, 7, 10, 10) \
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_(OTTO_REG_9310_0, 0x8500, 0x8500, 0x8508, 0x8508, 8, -1, 19, 15, 0, 0, 14, 20, 20) \
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_(OTTO_REG_9310_1, 0x40C0, 0x40C0, 0x40C4, 0x40C4, 22, -1, 16, 14, 0, 0, 13, 17, 17) \
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_(OTTO_REG_9310_2, 0x8528, 0x8528, 0x852C, 0x852C, 6, -1, 18, 14, 0, 0, 13, 19, 19) \
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_(OTTO_REG_9310_3, 0x0200, 0x0200, 0x0204, 0x0204, 9, -1, 15, 12, 0, 0, 11, 16, 16) \
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_(OTTO_REG_9310_4, 0x20dc, 0x20dc, 0x20e0, 0x20e0, 29, -1, 7, 6, 0, 0, 5, 8, 8) \
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_(OTTO_REG_9310_5, 0x7e1c, 0x7e1c, 0x7e20, 0x7e20, 53, -1, 8, 6, 0, 0, 5, 9, 9) \
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#define OTTO_REG_ENUM(name, ctrl_addr, sts_addr, wr_data, rd_data, max, \
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busy_bit, cbit, tbit, rmode, addr_lsb, addr_msb) \
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busy_bit, cbit, tbit, rmode, addr_lsb, addr_msb, \
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rd_e_bit, wr_e_bit) \
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name,
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enum otto_table_reg {
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@@ -73,7 +77,8 @@ enum otto_table_reg {
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};
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#define OTTO_REG_MAX(name, ctrl_addr, sts_addr, wr_data, rd_data, max, \
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busy_bit, cbit, tbit, rmode, addr_lsb, addr_msb) \
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busy_bit, cbit, tbit, rmode, addr_lsb, addr_msb, \
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rd_e_bit, wr_e_bit) \
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name##_MAX_DATA = max,
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enum otto_table_reg_max {
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@@ -82,13 +87,14 @@ enum otto_table_reg_max {
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#define OTTO_REG_DESC(name, ctrl_addr_, sts_addr_, wr_data_, rd_data_, \
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max_, busy_bit_, cbit_, tbit_, rmode_, addr_lsb_, \
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addr_msb_) \
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addr_msb_, rd_e_bit_, wr_e_bit_) \
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[name] = { \
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.ctrl_addr = ctrl_addr_, .sts_addr = sts_addr_, \
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.wr_data = wr_data_, .rd_data = rd_data_, \
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.busy_bit = busy_bit_, .c_bit = cbit_, .t_bit = tbit_, \
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.rmode = rmode_, .addr_lsb = addr_lsb_, \
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.addr_msb = addr_msb_, \
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.rmode = rmode_, \
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.addr_lsb = addr_lsb_, .addr_msb = addr_msb_, \
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.rd_e_bit = rd_e_bit_, .wr_e_bit = wr_e_bit_, \
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},
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static struct otto_table otto_regs[OTTO_REG_END] = {
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@@ -382,18 +388,20 @@ static int otto_table_exec(int handle, bool is_write, int idx)
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const struct otto_table_map *map = &otto_table_maps[handle];
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struct otto_table *r = &otto_regs[map->reg];
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int ret = 0;
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u32 cmd, val, addr_mask, sts_bit;
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u32 cmd = 0, val, addr_mask, sts_bit;
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/* Read/write bit has inverted meaning on RTL838x */
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if (r->rmode)
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cmd = is_write ? 0 : BIT(r->c_bit);
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else
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cmd = is_write ? BIT(r->c_bit) : 0;
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if (r->c_bit != -1) {
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/* Read/write bit has inverted meaning on RTL838x */
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if (r->rmode)
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cmd = is_write ? 0 : BIT(r->c_bit);
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else
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cmd = is_write ? BIT(r->c_bit) : 0;
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}
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if (r->busy_bit == -1) {
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/* Execute bit is its own status */
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sts_bit = BIT(r->c_bit + 1);
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cmd |= sts_bit;
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cmd |= is_write ? BIT(r->wr_e_bit) : BIT(r->rd_e_bit);
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sts_bit = BIT(r->wr_e_bit) | BIT(r->rd_e_bit);
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} else {
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sts_bit = BIT(r->busy_bit);
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}
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