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kernel: backport RTL8157 support to 6.18

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Backport support for the RTL8157. The RTL8157 is a low-cost chipset
designed for USB to 5Gb Ethernet adapters.

Tested on Sabrent NT-C5GA (RTL8157), Wavlink WL-NWU340G (RTL8157) and
UGREEN CM648 (RTL8156BG) adapters.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/23088
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Aleksander Jan Bajkowski
2026-04-24 22:35:44 +02:00
committed by Hauke Mehrtens
parent c78e2fe26d
commit a7fd866a2c
9 changed files with 5563 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
target/linux/generic/backport-6.18/740-v6.19-r8152-Advertise-software-timestamp-information.patch
+27
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@@ -0,0 +1,27 @@
From a8e846b8d93de748485653dd8a6a8efd8f5d7613 Mon Sep 17 00:00:00 2001
From: Abhishek Rawal <rawal.abhishek92@gmail.com>
Date: Tue, 14 Oct 2025 11:22:33 +0530
Subject: [PATCH] r8152: Advertise software timestamp information.
Driver calls skb_tx_timestamp(skb) in rtl8152_start_xmit(), but does not advertise the capability in ethtool.
Advertise software timestamp capabilities on struct ethtool_ops.
Signed-off-by: Abhishek Rawal <rawal.abhishek92@gmail.com>
Reviewed-by: Jamie Bainbridge <jamie.bainbridge@gmail.com>
Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Link: https://patch.msgid.link/20251014055234.46527-1-rawal.abhishek92@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/usb/r8152.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -9314,6 +9314,7 @@ static const struct ethtool_ops ops = {
.set_ringparam = rtl8152_set_ringparam,
.get_pauseparam = rtl8152_get_pauseparam,
.set_pauseparam = rtl8152_set_pauseparam,
+ .get_ts_info = ethtool_op_get_ts_info,
};
static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
target/linux/generic/backport-6.18/741-v7.1-r8152-Add-2500baseT-EEE-status-configuration-support.patch
+148
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@@ -0,0 +1,148 @@
From e8e83b67960c20a9e60d4181631509d59f03488b Mon Sep 17 00:00:00 2001
From: Birger Koblitz <mail@birger-koblitz.de>
Date: Tue, 24 Feb 2026 18:40:14 +0100
Subject: [PATCH] r8152: Add 2500baseT EEE status/configuration support
The r8152 driver supports the RTL8156, which is a 2.5Gbit Ethernet controller for
USB 3.0, for which support is added for configuring and displaying the EEE
advertisement status for 2.5GBit connections.
The patch also corrects the determination of whether EEE is active to include
the 2.5GBit connection status and make the determination dependent not on the
desired speed configuration (tp->speed), but on the actual speed used by
the controller. For consistency, this is corrected also for the RTL8152/3.
This was tested on an Edimax EU-4307 V1.0 USB-Ethernet adapter with RTL8156,
and a SECOMP Value 12.99.1115 USB-C 3.1 Ethernet converter with RTL8153.
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Link: https://patch.msgid.link/20260224-b4-eee2g5-v2-1-cf5c83df036e@birger-koblitz.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/usb/r8152.c | 50 ++++++++++++++++++++++++++++++++++-------
1 file changed, 42 insertions(+), 8 deletions(-)
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -213,6 +213,7 @@
#define OCP_EEE_LPABLE 0xa5d2
#define OCP_10GBT_CTRL 0xa5d4
#define OCP_10GBT_STAT 0xa5d6
+#define OCP_EEE_LPABLE2 0xa6d0
#define OCP_EEE_ADV2 0xa6d4
#define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
#define OCP_PHY_PATCH_STAT 0xb800
@@ -954,6 +955,7 @@ struct r8152 {
u16 ocp_base;
u16 speed;
u16 eee_adv;
+ u16 eee_adv2;
u8 *intr_buff;
u8 version;
u8 duplex;
@@ -5399,7 +5401,7 @@ static void r8156_eee_en(struct r8152 *t
config = ocp_reg_read(tp, OCP_EEE_ADV2);
- if (enable)
+ if (enable && (tp->eee_adv2 & MDIO_EEE_2_5GT))
config |= MDIO_EEE_2_5GT;
else
config &= ~MDIO_EEE_2_5GT;
@@ -8929,7 +8931,8 @@ static void rtl8152_get_strings(struct n
static int r8152_get_eee(struct r8152 *tp, struct ethtool_keee *eee)
{
- __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(common) = {};
+ u16 speed = rtl8152_get_speed(tp);
u16 val;
val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
@@ -8943,8 +8946,14 @@ static int r8152_get_eee(struct r8152 *t
eee->eee_enabled = tp->eee_en;
- linkmode_and(common, eee->advertised, eee->lp_advertised);
- eee->eee_active = phy_check_valid(tp->speed, tp->duplex, common);
+ if (speed & _1000bps)
+ linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, common);
+ if (speed & _100bps)
+ linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, common);
+
+ linkmode_and(common, common, eee->advertised);
+ linkmode_and(common, common, eee->lp_advertised);
+ eee->eee_active = !linkmode_empty(common);
return 0;
}
@@ -8955,7 +8964,10 @@ static int r8152_set_eee(struct r8152 *t
tp->eee_en = eee->eee_enabled;
tp->eee_adv = val;
-
+ if (tp->support_2500full) {
+ val = linkmode_to_mii_eee_cap2_t(eee->advertised);
+ tp->eee_adv2 = val;
+ }
rtl_eee_enable(tp, tp->eee_en);
return 0;
@@ -8963,7 +8975,8 @@ static int r8152_set_eee(struct r8152 *t
static int r8153_get_eee(struct r8152 *tp, struct ethtool_keee *eee)
{
- __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(common) = {};
+ u16 speed = rtl8152_get_speed(tp);
u16 val;
val = ocp_reg_read(tp, OCP_EEE_ABLE);
@@ -8975,10 +8988,29 @@ static int r8153_get_eee(struct r8152 *t
val = ocp_reg_read(tp, OCP_EEE_LPABLE);
mii_eee_cap1_mod_linkmode_t(eee->lp_advertised, val);
+ if (tp->support_2500full) {
+ linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, eee->supported);
+
+ val = ocp_reg_read(tp, OCP_EEE_ADV2);
+ mii_eee_cap2_mod_linkmode_adv_t(eee->advertised, val);
+
+ val = ocp_reg_read(tp, OCP_EEE_LPABLE2);
+ mii_eee_cap2_mod_linkmode_adv_t(eee->lp_advertised, val);
+
+ if (speed & _2500bps)
+ linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, common);
+ }
+
eee->eee_enabled = tp->eee_en;
- linkmode_and(common, eee->advertised, eee->lp_advertised);
- eee->eee_active = phy_check_valid(tp->speed, tp->duplex, common);
+ if (speed & _1000bps)
+ linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, common);
+ if (speed & _100bps)
+ linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, common);
+
+ linkmode_and(common, common, eee->advertised);
+ linkmode_and(common, common, eee->lp_advertised);
+ eee->eee_active = !linkmode_empty(common);
return 0;
}
@@ -9519,6 +9551,7 @@ static int rtl_ops_init(struct r8152 *tp
case RTL_VER_11:
tp->eee_en = true;
tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX;
+ tp->eee_adv2 = MDIO_EEE_2_5GT;
fallthrough;
case RTL_VER_10:
ops->init = r8156_init;
@@ -9544,6 +9577,7 @@ static int rtl_ops_init(struct r8152 *tp
case RTL_VER_15:
tp->eee_en = true;
tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX;
+ tp->eee_adv2 = MDIO_EEE_2_5GT;
ops->init = r8156b_init;
ops->enable = rtl8156b_enable;
ops->disable = rtl8153_disable;
target/linux/generic/backport-6.18/742-v7.1-r8152-fix-incorrect-register-write-to-USB_UPHY_XTAL.patch
+31
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@@ -0,0 +1,31 @@
From 48afd5124fd6129c46fd12cb06155384b1c4a0c4 Mon Sep 17 00:00:00 2001
From: Chih Kai Hsu <hsu.chih.kai@realtek.com>
Date: Thu, 26 Mar 2026 15:39:23 +0800
Subject: [PATCH] r8152: fix incorrect register write to USB_UPHY_XTAL
The old code used ocp_write_byte() to clear the OOBS_POLLING bit
(BIT(8)) in the USB_UPHY_XTAL register, but this doesn't correctly
clear a bit in the upper byte of the 16-bit register.
Fix this by using ocp_write_word() instead.
Fixes: 195aae321c82 ("r8152: support new chips")
Signed-off-by: Chih Kai Hsu <hsu.chih.kai@realtek.com>
Reviewed-by: Hayes Wang <hayeswang@realtek.com>
Link: https://patch.msgid.link/20260326073925.32976-454-nic_swsd@realtek.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/usb/r8152.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -3898,7 +3898,7 @@ static void r8156_ups_en(struct r8152 *t
case RTL_VER_15:
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPHY_XTAL);
ocp_data &= ~OOBS_POLLING;
- ocp_write_byte(tp, MCU_TYPE_USB, USB_UPHY_XTAL, ocp_data);
+ ocp_write_word(tp, MCU_TYPE_USB, USB_UPHY_XTAL, ocp_data);
break;
default:
break;
target/linux/generic/backport-6.18/743-v7.1-r8152-add-helper-functions-for-PLA-USB-OCP-registers.patch
+2182
View File
File diff suppressed because it is too large Load Diff
target/linux/generic/backport-6.18/744-v7.1-r8152-add-helper-functions-for-PHY-OCP-registers.patch
+1127
View File
File diff suppressed because it is too large Load Diff
target/linux/generic/backport-6.18/745-v7.1-r8152-Add-helper-functions-for-SRAM2.patch
+252
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@@ -0,0 +1,252 @@
From 86f5dd4e0ff282a0acf1f058e947fd5f4ba58a9d Mon Sep 17 00:00:00 2001
From: Chih Kai Hsu <hsu.chih.kai@realtek.com>
Date: Wed, 1 Apr 2026 19:55:41 +0800
Subject: [PATCH] r8152: Add helper functions for SRAM2
Add the following helper functions for SRAM2 access to simplify the code
and improve readability:
- sram2_write() - write data to SRAM2 address
- sram2_read() - read data from SRAM2 address
- sram2_write_w0w1() - read-modify-write operation
Signed-off-by: Chih Kai Hsu <hsu.chih.kai@realtek.com>
Reviewed-by: Hayes Wang <hayeswang@realtek.com>
Link: https://patch.msgid.link/20260401115542.34601-1-nic_swsd@realtek.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/usb/r8152.c | 178 +++++++++++++++++-----------------------
1 file changed, 75 insertions(+), 103 deletions(-)
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -219,6 +219,8 @@
#define OCP_PHY_PATCH_STAT 0xb800
#define OCP_PHY_PATCH_CMD 0xb820
#define OCP_PHY_LOCK 0xb82e
+#define OCP_SRAM2_ADDR 0xb87c
+#define OCP_SRAM2_DATA 0xb87e
#define OCP_ADC_IOFFSET 0xbcfc
#define OCP_ADC_CFG 0xbc06
#define OCP_SYSCLK_CFG 0xc416
@@ -1770,6 +1772,27 @@ static void sram_set_bits(struct r8152 *
sram_write_w0w1(tp, addr, 0, set);
}
+static void sram2_write(struct r8152 *tp, u16 addr, u16 data)
+{
+ ocp_reg_write(tp, OCP_SRAM2_ADDR, addr);
+ ocp_reg_write(tp, OCP_SRAM2_DATA, data);
+}
+
+static u16 sram2_read(struct r8152 *tp, u16 addr)
+{
+ ocp_reg_write(tp, OCP_SRAM2_ADDR, addr);
+ return ocp_reg_read(tp, OCP_SRAM2_DATA);
+}
+
+static void sram2_write_w0w1(struct r8152 *tp, u16 addr, u16 clear, u16 set)
+{
+ u16 data;
+
+ data = sram2_read(tp, addr);
+ data = (data & ~clear) | set;
+ ocp_reg_write(tp, OCP_SRAM2_DATA, data);
+}
+
static void r8152_mdio_clr_bit(struct r8152 *tp, u16 addr, u16 clear)
{
int data;
@@ -7201,16 +7224,12 @@ static void r8156_hw_phy_cfg(struct r815
ocp_reg_write(tp, 0xad4c, 0x00a8);
ocp_reg_write(tp, 0xac5c, 0x01ff);
ocp_reg_w0w1(tp, 0xac8a, 0xf0, BIT(4) | BIT(5));
- ocp_reg_write(tp, 0xb87c, 0x8157);
- ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0500);
- ocp_reg_write(tp, 0xb87c, 0x8159);
- ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0700);
+ sram2_write_w0w1(tp, 0x8157, 0xff00, 0x0500);
+ sram2_write_w0w1(tp, 0x8159, 0xff00, 0x0700);
/* AAGC */
- ocp_reg_write(tp, 0xb87c, 0x80a2);
- ocp_reg_write(tp, 0xb87e, 0x0153);
- ocp_reg_write(tp, 0xb87c, 0x809c);
- ocp_reg_write(tp, 0xb87e, 0x0153);
+ sram2_write(tp, 0x80a2, 0x0153);
+ sram2_write(tp, 0x809c, 0x0153);
/* EEE parameter */
ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_TXTWSYS_2P5G, 0x0056);
@@ -7408,82 +7427,48 @@ static void r8156b_hw_phy_cfg(struct r81
ocp_reg_write(tp, 0xacc8, 0xa0d3);
ocp_reg_write(tp, 0xad08, 0x0007);
- ocp_reg_write(tp, 0xb87c, 0x8560);
- ocp_reg_write(tp, 0xb87e, 0x19cc);
- ocp_reg_write(tp, 0xb87c, 0x8562);
- ocp_reg_write(tp, 0xb87e, 0x19cc);
- ocp_reg_write(tp, 0xb87c, 0x8564);
- ocp_reg_write(tp, 0xb87e, 0x19cc);
- ocp_reg_write(tp, 0xb87c, 0x8566);
- ocp_reg_write(tp, 0xb87e, 0x147d);
- ocp_reg_write(tp, 0xb87c, 0x8568);
- ocp_reg_write(tp, 0xb87e, 0x147d);
- ocp_reg_write(tp, 0xb87c, 0x856a);
- ocp_reg_write(tp, 0xb87e, 0x147d);
- ocp_reg_write(tp, 0xb87c, 0x8ffe);
- ocp_reg_write(tp, 0xb87e, 0x0907);
- ocp_reg_write(tp, 0xb87c, 0x80d6);
- ocp_reg_write(tp, 0xb87e, 0x2801);
- ocp_reg_write(tp, 0xb87c, 0x80f2);
- ocp_reg_write(tp, 0xb87e, 0x2801);
- ocp_reg_write(tp, 0xb87c, 0x80f4);
- ocp_reg_write(tp, 0xb87e, 0x6077);
+ sram2_write(tp, 0x8560, 0x19cc);
+ sram2_write(tp, 0x8562, 0x19cc);
+ sram2_write(tp, 0x8564, 0x19cc);
+ sram2_write(tp, 0x8566, 0x147d);
+ sram2_write(tp, 0x8568, 0x147d);
+ sram2_write(tp, 0x856a, 0x147d);
+ sram2_write(tp, 0x8ffe, 0x0907);
+ sram2_write(tp, 0x80d6, 0x2801);
+ sram2_write(tp, 0x80f2, 0x2801);
+ sram2_write(tp, 0x80f4, 0x6077);
ocp_reg_write(tp, 0xb506, 0x01e7);
- ocp_reg_write(tp, 0xb87c, 0x8013);
- ocp_reg_write(tp, 0xb87e, 0x0700);
- ocp_reg_write(tp, 0xb87c, 0x8fb9);
- ocp_reg_write(tp, 0xb87e, 0x2801);
- ocp_reg_write(tp, 0xb87c, 0x8fba);
- ocp_reg_write(tp, 0xb87e, 0x0100);
- ocp_reg_write(tp, 0xb87c, 0x8fbc);
- ocp_reg_write(tp, 0xb87e, 0x1900);
- ocp_reg_write(tp, 0xb87c, 0x8fbe);
- ocp_reg_write(tp, 0xb87e, 0xe100);
- ocp_reg_write(tp, 0xb87c, 0x8fc0);
- ocp_reg_write(tp, 0xb87e, 0x0800);
- ocp_reg_write(tp, 0xb87c, 0x8fc2);
- ocp_reg_write(tp, 0xb87e, 0xe500);
- ocp_reg_write(tp, 0xb87c, 0x8fc4);
- ocp_reg_write(tp, 0xb87e, 0x0f00);
- ocp_reg_write(tp, 0xb87c, 0x8fc6);
- ocp_reg_write(tp, 0xb87e, 0xf100);
- ocp_reg_write(tp, 0xb87c, 0x8fc8);
- ocp_reg_write(tp, 0xb87e, 0x0400);
- ocp_reg_write(tp, 0xb87c, 0x8fca);
- ocp_reg_write(tp, 0xb87e, 0xf300);
- ocp_reg_write(tp, 0xb87c, 0x8fcc);
- ocp_reg_write(tp, 0xb87e, 0xfd00);
- ocp_reg_write(tp, 0xb87c, 0x8fce);
- ocp_reg_write(tp, 0xb87e, 0xff00);
- ocp_reg_write(tp, 0xb87c, 0x8fd0);
- ocp_reg_write(tp, 0xb87e, 0xfb00);
- ocp_reg_write(tp, 0xb87c, 0x8fd2);
- ocp_reg_write(tp, 0xb87e, 0x0100);
- ocp_reg_write(tp, 0xb87c, 0x8fd4);
- ocp_reg_write(tp, 0xb87e, 0xf400);
- ocp_reg_write(tp, 0xb87c, 0x8fd6);
- ocp_reg_write(tp, 0xb87e, 0xff00);
- ocp_reg_write(tp, 0xb87c, 0x8fd8);
- ocp_reg_write(tp, 0xb87e, 0xf600);
+ sram2_write(tp, 0x8013, 0x0700);
+ sram2_write(tp, 0x8fb9, 0x2801);
+ sram2_write(tp, 0x8fba, 0x0100);
+ sram2_write(tp, 0x8fbc, 0x1900);
+ sram2_write(tp, 0x8fbe, 0xe100);
+ sram2_write(tp, 0x8fc0, 0x0800);
+ sram2_write(tp, 0x8fc2, 0xe500);
+ sram2_write(tp, 0x8fc4, 0x0f00);
+ sram2_write(tp, 0x8fc6, 0xf100);
+ sram2_write(tp, 0x8fc8, 0x0400);
+ sram2_write(tp, 0x8fca, 0xf300);
+ sram2_write(tp, 0x8fcc, 0xfd00);
+ sram2_write(tp, 0x8fce, 0xff00);
+ sram2_write(tp, 0x8fd0, 0xfb00);
+ sram2_write(tp, 0x8fd2, 0x0100);
+ sram2_write(tp, 0x8fd4, 0xf400);
+ sram2_write(tp, 0x8fd6, 0xff00);
+ sram2_write(tp, 0x8fd8, 0xf600);
ocp_byte_set_bits(tp, MCU_TYPE_PLA, PLA_USB_CFG,
EN_XG_LIP | EN_G_LIP);
- ocp_reg_write(tp, 0xb87c, 0x813d);
- ocp_reg_write(tp, 0xb87e, 0x390e);
- ocp_reg_write(tp, 0xb87c, 0x814f);
- ocp_reg_write(tp, 0xb87e, 0x790e);
- ocp_reg_write(tp, 0xb87c, 0x80b0);
- ocp_reg_write(tp, 0xb87e, 0x0f31);
+ sram2_write(tp, 0x813d, 0x390e);
+ sram2_write(tp, 0x814f, 0x790e);
+ sram2_write(tp, 0x80b0, 0x0f31);
ocp_reg_set_bits(tp, 0xbf4c, BIT(1));
ocp_reg_set_bits(tp, 0xbcca, BIT(9) | BIT(8));
- ocp_reg_write(tp, 0xb87c, 0x8141);
- ocp_reg_write(tp, 0xb87e, 0x320e);
- ocp_reg_write(tp, 0xb87c, 0x8153);
- ocp_reg_write(tp, 0xb87e, 0x720e);
- ocp_reg_write(tp, 0xb87c, 0x8529);
- ocp_reg_write(tp, 0xb87e, 0x050e);
+ sram2_write(tp, 0x8141, 0x320e);
+ sram2_write(tp, 0x8153, 0x720e);
+ sram2_write(tp, 0x8529, 0x050e);
ocp_reg_clr_bits(tp, OCP_EEE_CFG, CTAP_SHORT_EN);
sram_write(tp, 0x816c, 0xc4a0);
@@ -7495,27 +7480,17 @@ static void r8156b_hw_phy_cfg(struct r81
sram_write(tp, 0x8ff1, 0x0404);
ocp_reg_write(tp, 0xbf4a, 0x001b);
- ocp_reg_write(tp, 0xb87c, 0x8033);
- ocp_reg_write(tp, 0xb87e, 0x7c13);
- ocp_reg_write(tp, 0xb87c, 0x8037);
- ocp_reg_write(tp, 0xb87e, 0x7c13);
- ocp_reg_write(tp, 0xb87c, 0x803b);
- ocp_reg_write(tp, 0xb87e, 0xfc32);
- ocp_reg_write(tp, 0xb87c, 0x803f);
- ocp_reg_write(tp, 0xb87e, 0x7c13);
- ocp_reg_write(tp, 0xb87c, 0x8043);
- ocp_reg_write(tp, 0xb87e, 0x7c13);
- ocp_reg_write(tp, 0xb87c, 0x8047);
- ocp_reg_write(tp, 0xb87e, 0x7c13);
-
- ocp_reg_write(tp, 0xb87c, 0x8145);
- ocp_reg_write(tp, 0xb87e, 0x370e);
- ocp_reg_write(tp, 0xb87c, 0x8157);
- ocp_reg_write(tp, 0xb87e, 0x770e);
- ocp_reg_write(tp, 0xb87c, 0x8169);
- ocp_reg_write(tp, 0xb87e, 0x0d0a);
- ocp_reg_write(tp, 0xb87c, 0x817b);
- ocp_reg_write(tp, 0xb87e, 0x1d0a);
+ sram2_write(tp, 0x8033, 0x7c13);
+ sram2_write(tp, 0x8037, 0x7c13);
+ sram2_write(tp, 0x803b, 0xfc32);
+ sram2_write(tp, 0x803f, 0x7c13);
+ sram2_write(tp, 0x8043, 0x7c13);
+ sram2_write(tp, 0x8047, 0x7c13);
+
+ sram2_write(tp, 0x8145, 0x370e);
+ sram2_write(tp, 0x8157, 0x770e);
+ sram2_write(tp, 0x8169, 0x0d0a);
+ sram2_write(tp, 0x817b, 0x1d0a);
sram_write_w0w1(tp, 0x8217, 0xff00, 0x5000);
sram_write_w0w1(tp, 0x821a, 0xff00, 0x5000);
@@ -7580,12 +7555,9 @@ static void r8156b_hw_phy_cfg(struct r81
fallthrough;
case RTL_VER_15:
/* EEE parameter */
- ocp_reg_write(tp, 0xb87c, 0x80f5);
- ocp_reg_write(tp, 0xb87e, 0x760e);
- ocp_reg_write(tp, 0xb87c, 0x8107);
- ocp_reg_write(tp, 0xb87e, 0x360e);
- ocp_reg_write(tp, 0xb87c, 0x8551);
- ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0800);
+ sram2_write(tp, 0x80f5, 0x760e);
+ sram2_write(tp, 0x8107, 0x360e);
+ sram2_write_w0w1(tp, 0x8551, 0xff00, 0x0800);
/* ADC_PGA parameter */
ocp_reg_w0w1(tp, 0xbf00, 0xe000, 0xa000);
target/linux/generic/backport-6.18/746-v7.1-r8152-Add-support-for-5Gbit-Link-Speeds-and-EEE.patch
+235
View File
@@ -0,0 +1,235 @@
From ebe5fd2ed20af5ae176dd41dd4a85a3cdc738b8a Mon Sep 17 00:00:00 2001
From: Birger Koblitz <mail@birger-koblitz.de>
Date: Sat, 4 Apr 2026 09:57:42 +0200
Subject: [PATCH] r8152: Add support for 5Gbit Link Speeds and EEE
The RTL8157 supports 5GBit Link speeds. Add support for this speed
in the setup and setting/getting through ethtool. Also add 5GBit EEE.
Add functionality for setup and ethtool get/set methods.
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Link: https://patch.msgid.link/20260404-rtl8157_next-v7-1-039121318f23@birger-koblitz.de
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/usb/r8152.c | 100 ++++++++++++++++++++++++++++++++--------
1 file changed, 82 insertions(+), 18 deletions(-)
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -612,6 +612,7 @@ enum spd_duplex {
FORCE_100M_FULL,
FORCE_1000M_FULL,
NWAY_2500M_FULL,
+ NWAY_5000M_FULL,
};
/* OCP_ALDPS_CONFIG */
@@ -733,6 +734,7 @@ enum spd_duplex {
#define BP4_SUPER_ONLY 0x1578 /* RTL_VER_04 only */
enum rtl_register_content {
+ _5000bps = BIT(12),
_2500bps = BIT(10),
_1250bps = BIT(9),
_500bps = BIT(8),
@@ -746,6 +748,7 @@ enum rtl_register_content {
};
#define is_speed_2500(_speed) (((_speed) & (_2500bps | LINK_STATUS)) == (_2500bps | LINK_STATUS))
+#define is_speed_5000(_speed) (((_speed) & (_5000bps | LINK_STATUS)) == (_5000bps | LINK_STATUS))
#define is_flow_control(_speed) (((_speed) & (_tx_flow | _rx_flow)) == (_tx_flow | _rx_flow))
#define RTL8152_MAX_TX 4
@@ -952,6 +955,7 @@ struct r8152 {
unsigned int pipe_in, pipe_out, pipe_intr, pipe_ctrl_in, pipe_ctrl_out;
u32 support_2500full:1;
+ u32 support_5000full:1;
u32 lenovo_macpassthru:1;
u32 dell_tb_rx_agg_bug:1;
u16 ocp_base;
@@ -1202,6 +1206,7 @@ enum tx_csum_stat {
#define RTL_ADVERTISED_1000_HALF BIT(4)
#define RTL_ADVERTISED_1000_FULL BIT(5)
#define RTL_ADVERTISED_2500_FULL BIT(6)
+#define RTL_ADVERTISED_5000_FULL BIT(7)
/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
* The RTL chips use a 64 element hash table based on the Ethernet CRC.
@@ -5427,12 +5432,23 @@ static void r8153_eee_en(struct r8152 *t
static void r8156_eee_en(struct r8152 *tp, bool enable)
{
+ u16 config;
+
r8153_eee_en(tp, enable);
+ config = ocp_reg_read(tp, OCP_EEE_ADV2);
+
if (enable && (tp->eee_adv2 & MDIO_EEE_2_5GT))
- ocp_reg_set_bits(tp, OCP_EEE_ADV2, MDIO_EEE_2_5GT);
+ config |= MDIO_EEE_2_5GT;
else
- ocp_reg_clr_bits(tp, OCP_EEE_ADV2, MDIO_EEE_2_5GT);
+ config &= ~MDIO_EEE_2_5GT;
+
+ if (enable && (tp->eee_adv2 & MDIO_EEE_5GT))
+ config |= MDIO_EEE_5GT;
+ else
+ config &= ~MDIO_EEE_5GT;
+
+ ocp_reg_write(tp, OCP_EEE_ADV2, config);
}
static void rtl_eee_enable(struct r8152 *tp, bool enable)
@@ -6196,9 +6212,13 @@ static int rtl8152_set_speed(struct r815
if (tp->support_2500full)
support |= RTL_ADVERTISED_2500_FULL;
+
+ if (tp->support_5000full)
+ support |= RTL_ADVERTISED_5000_FULL;
}
- if (!(advertising & support))
+ advertising &= support;
+ if (!advertising)
return -EINVAL;
orig = r8152_mdio_read(tp, MII_ADVERTISE);
@@ -6241,15 +6261,20 @@ static int rtl8152_set_speed(struct r815
r8152_mdio_write(tp, MII_CTRL1000, new1);
}
- if (tp->support_2500full) {
+ if (tp->support_2500full || tp->support_5000full) {
orig = ocp_reg_read(tp, OCP_10GBT_CTRL);
- new1 = orig & ~MDIO_AN_10GBT_CTRL_ADV2_5G;
+ new1 = orig & ~(MDIO_AN_10GBT_CTRL_ADV2_5G | MDIO_AN_10GBT_CTRL_ADV5G);
if (advertising & RTL_ADVERTISED_2500_FULL) {
new1 |= MDIO_AN_10GBT_CTRL_ADV2_5G;
tp->ups_info.speed_duplex = NWAY_2500M_FULL;
}
+ if (advertising & RTL_ADVERTISED_5000_FULL) {
+ new1 |= MDIO_AN_10GBT_CTRL_ADV5G;
+ tp->ups_info.speed_duplex = NWAY_5000M_FULL;
+ }
+
if (orig != new1)
ocp_reg_write(tp, OCP_10GBT_CTRL, new1);
}
@@ -8227,17 +8252,38 @@ int rtl8152_get_link_ksettings(struct ne
linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
cmd->link_modes.supported, tp->support_2500full);
- if (tp->support_2500full) {
- linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
- cmd->link_modes.advertising,
- ocp_reg_read(tp, OCP_10GBT_CTRL) & MDIO_AN_10GBT_CTRL_ADV2_5G);
-
- linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
- cmd->link_modes.lp_advertising,
- ocp_reg_read(tp, OCP_10GBT_STAT) & MDIO_AN_10GBT_STAT_LP2_5G);
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.supported, tp->support_5000full);
+
+ if (tp->support_2500full || tp->support_5000full) {
+ u16 ocp_10gbt_ctrl = ocp_reg_read(tp, OCP_10GBT_CTRL);
+ u16 ocp_10gbt_stat = ocp_reg_read(tp, OCP_10GBT_STAT);
+
+ if (tp->support_2500full) {
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ cmd->link_modes.advertising,
+ ocp_10gbt_ctrl & MDIO_AN_10GBT_CTRL_ADV2_5G);
+
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ cmd->link_modes.lp_advertising,
+ ocp_10gbt_stat & MDIO_AN_10GBT_STAT_LP2_5G);
+
+ if (is_speed_2500(rtl8152_get_speed(tp)))
+ cmd->base.speed = SPEED_2500;
+ }
+
+ if (tp->support_5000full) {
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.advertising,
+ ocp_10gbt_ctrl & MDIO_AN_10GBT_CTRL_ADV5G);
- if (is_speed_2500(rtl8152_get_speed(tp)))
- cmd->base.speed = SPEED_2500;
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.lp_advertising,
+ ocp_10gbt_stat & MDIO_AN_10GBT_STAT_LP5G);
+
+ if (is_speed_5000(rtl8152_get_speed(tp)))
+ cmd->base.speed = SPEED_5000;
+ }
}
mutex_unlock(&tp->control);
@@ -8287,6 +8333,10 @@ static int rtl8152_set_link_ksettings(st
cmd->link_modes.advertising))
advertising |= RTL_ADVERTISED_2500_FULL;
+ if (test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.advertising))
+ advertising |= RTL_ADVERTISED_5000_FULL;
+
mutex_lock(&tp->control);
ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
@@ -8404,7 +8454,7 @@ static int r8152_set_eee(struct r8152 *t
tp->eee_en = eee->eee_enabled;
tp->eee_adv = val;
- if (tp->support_2500full) {
+ if (tp->support_2500full || tp->support_5000full) {
val = linkmode_to_mii_eee_cap2_t(eee->advertised);
tp->eee_adv2 = val;
}
@@ -8428,19 +8478,28 @@ static int r8153_get_eee(struct r8152 *t
val = ocp_reg_read(tp, OCP_EEE_LPABLE);
mii_eee_cap1_mod_linkmode_t(eee->lp_advertised, val);
- if (tp->support_2500full) {
- linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, eee->supported);
-
+ if (tp->support_2500full || tp->support_5000full) {
val = ocp_reg_read(tp, OCP_EEE_ADV2);
mii_eee_cap2_mod_linkmode_adv_t(eee->advertised, val);
val = ocp_reg_read(tp, OCP_EEE_LPABLE2);
mii_eee_cap2_mod_linkmode_adv_t(eee->lp_advertised, val);
+ }
+
+ if (tp->support_2500full) {
+ linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, eee->supported);
if (speed & _2500bps)
linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, common);
}
+ if (tp->support_5000full) {
+ linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, eee->supported);
+
+ if (speed & _5000bps)
+ linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, common);
+ }
+
eee->eee_enabled = tp->eee_en;
if (speed & _1000bps)
@@ -9381,6 +9440,11 @@ static int rtl8152_probe_once(struct usb
} else {
tp->speed = SPEED_1000;
}
+ if (tp->support_5000full &&
+ tp->udev->speed >= USB_SPEED_SUPER) {
+ tp->speed = SPEED_5000;
+ tp->advertising |= RTL_ADVERTISED_5000_FULL;
+ }
tp->advertising |= RTL_ADVERTISED_1000_FULL;
}
tp->duplex = DUPLEX_FULL;
target/linux/generic/backport-6.18/747-v7.1-r8152-Add-support-for-the-RTL8157-hardware.patch
+1553
View File
File diff suppressed because it is too large Load Diff
target/linux/generic/hack-6.18/760-net-usb-r8152-add-LED-configuration-from-OF.patch
+8 -8
View File
@@ -22,8 +22,8 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
#include <linux/crc32.h>
#include <linux/if_vlan.h>
#include <linux/uaccess.h>
@@ -7019,6 +7020,22 @@ static void rtl_tally_reset(struct r8152
ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
@@ -7193,6 +7194,22 @@ static void rtl_tally_reset(struct r8152
ocp_word_set_bits(tp, MCU_TYPE_PLA, PLA_RSTTALLY, TALLY_RESET);
}
+static int r8152_led_configuration(struct r8152 *tp)
@@ -45,16 +45,16 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
static void r8152b_init(struct r8152 *tp)
{
u32 ocp_data;
@@ -7060,6 +7077,8 @@ static void r8152b_init(struct r8152 *tp
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
@@ -7225,6 +7242,8 @@ static void r8152b_init(struct r8152 *tp
/* enable rx aggregation */
ocp_word_clr_bits(tp, MCU_TYPE_USB, USB_USB_CTRL,
RX_AGG_DISABLE | RX_ZERO_EN);
+
+ r8152_led_configuration(tp);
}
static void r8153_init(struct r8152 *tp)
@@ -7200,6 +7219,8 @@ static void r8153_init(struct r8152 *tp)
@@ -7342,6 +7361,8 @@ static void r8153_init(struct r8152 *tp)
tp->coalesce = COALESCE_SLOW;
break;
}
@@ -63,7 +63,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
}
static void r8153b_init(struct r8152 *tp)
@@ -7282,6 +7303,8 @@ static void r8153b_init(struct r8152 *tp
@@ -7412,6 +7433,8 @@ static void r8153b_init(struct r8152 *tp
rtl_tally_reset(tp);
tp->coalesce = 15000; /* 15 us */