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realtek: mdio: harden defines

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Add brackets to avoid silent bugs.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23070
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Markus Stockhausen
2026-04-23 22:30:04 +02:00
committed by Hauke Mehrtens
parent 51992c87c8
commit aaf91b7b62
1 changed files with 6 additions and 6 deletions
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target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c
+6 -6
View File
@@ -29,7 +29,7 @@
#define RTMDIO_PHY_MAC_1G 3
#define RTMDIO_PHY_MAC_2G_PLUS 1
#define RTMDIO_PHY_POLL_MMD(dev, reg, bit) ((bit << 21) | (dev << 16) | reg)
#define RTMDIO_PHY_POLL_MMD(dev, reg, bit) ((bit << 21) | (dev << 16) | (reg))
/* MDIO bus registers/fields */
#define RTMDIO_RUN BIT(0)
@@ -42,7 +42,7 @@
#define RTMDIO_838X_CMD_READ_C22 0
#define RTMDIO_838X_CMD_READ_C45 BIT(1)
#define RTMDIO_838X_CMD_WRITE_C22 BIT(2)
#define RTMDIO_838X_CMD_WRITE_C45 BIT(1) | BIT(2)
#define RTMDIO_838X_CMD_WRITE_C45 (BIT(1) | BIT(2))
#define RTMDIO_838X_CMD_MASK GENMASK(2, 0)
#define RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2 (0xa1c0)
#define RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3 (0xa1c4)
@@ -56,7 +56,7 @@
#define RTMDIO_839X_CMD_READ_C22 0
#define RTMDIO_839X_CMD_READ_C45 BIT(2)
#define RTMDIO_839X_CMD_WRITE_C22 BIT(3)
#define RTMDIO_839X_CMD_WRITE_C45 BIT(2) | BIT(3)
#define RTMDIO_839X_CMD_WRITE_C45 (BIT(2) | BIT(3))
#define RTMDIO_839X_CMD_MASK GENMASK(3, 0)
#define RTMDIO_839X_PHYREG_DATA_CTRL (0x03F0)
#define RTMDIO_839X_PHYREG_MMD_CTRL (0x03F4)
@@ -70,8 +70,8 @@
#define RTMDIO_930X_CMD_READ_C22 0
#define RTMDIO_930X_CMD_READ_C45 BIT(1)
#define RTMDIO_930X_CMD_WRITE_C22 BIT(2)
#define RTMDIO_930X_CMD_WRITE_C45 BIT(1) | BIT(2)
#define RTMDIO_930X_CMD_MASK GENMASK(2, 0) | BIT(25)
#define RTMDIO_930X_CMD_WRITE_C45 (BIT(1) | BIT(2))
#define RTMDIO_930X_CMD_MASK (GENMASK(2, 0) | BIT(25))
#define RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2 (0xCB78)
#define RTMDIO_930X_SMI_ACCESS_PHY_CTRL_3 (0xCB7C)
#define RTMDIO_930X_SMI_PORT0_15_POLLING_SEL (0xCA08)
@@ -92,7 +92,7 @@
#define RTMDIO_931X_CMD_READ_C22 0
#define RTMDIO_931X_CMD_READ_C45 BIT(3)
#define RTMDIO_931X_CMD_WRITE_C22 BIT(4)
#define RTMDIO_931X_CMD_WRITE_C45 BIT(3) | BIT(4)
#define RTMDIO_931X_CMD_WRITE_C45 (BIT(3) | BIT(4))
#define RTMDIO_931X_CMD_MASK GENMASK(4, 0)
#define RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_1 (0x0C04)
#define RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_2 (0x0C08)