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realtek: dts: convert devices to PHY_C45()

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Make the remaining devices use the new PHY_C45() macro. At least
those that have no extra attributes in the phy definitions.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22715
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen
2026-03-31 17:40:39 +02:00
committed by Robert Marko
parent e0287f7aba
commit d7de7cae1a
6 changed files with 64 additions and 309 deletions
Download Patch File Download Diff File Expand all files Collapse all files
target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi
+8 -40
View File
@@ -134,46 +134,14 @@
};
&mdio_bus0 {
/* External RTL8224 PHY */
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy2: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy3: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy8: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy9: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy10: ethernet-phy@6 {
reg = <6>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy11: ethernet-phy@7 {
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c45";
};
PHY_C45(0, 0)
PHY_C45(1, 1)
PHY_C45(2, 2)
PHY_C45(3, 3)
PHY_C45(8, 4)
PHY_C45(9, 5)
PHY_C45(10, 6)
PHY_C45(11, 7)
};
&switch0 {
target/linux/realtek/dts/rtl9302_plasmacloud_mcx3.dts
+2 -10
View File
@@ -151,16 +151,8 @@
};
&mdio_bus0 {
/* External RTL8224 PHY */
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
PHY_C45(0, 0)
PHY_C45(1, 1)
};
&switch0 {
target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts
+14 -56
View File
@@ -147,71 +147,29 @@
};
&mdio_bus0 {
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
};
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <1>;
};
phy2: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
};
phy3: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <3>;
};
PHY_C45(0, 0)
PHY_C45(1, 1)
PHY_C45(2, 2)
PHY_C45(3, 3)
};
&mdio_bus1 {
phy8: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
};
phy9: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <1>;
};
phy10: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
};
phy11: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <3>;
};
PHY_C45(8, 0)
PHY_C45(9, 1)
PHY_C45(10, 2)
PHY_C45(11, 3)
};
&mdio_bus2 {
phy16: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
};
phy17: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <1>;
};
phy18: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
};
phy19: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <3>;
};
PHY_C45(16, 0)
PHY_C45(17, 1)
PHY_C45(18, 2)
PHY_C45(19, 3)
};
&mdio_bus3 {
phy24: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
};
phy25: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <1>;
};
PHY_C45(24, 0)
PHY_C45(25, 1)
};
&switch0 {
target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts
+8 -38
View File
@@ -127,47 +127,17 @@
};
&mdio_bus0 {
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
};
phy8: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <1>;
};
phy16: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
};
phy20: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <3>;
};
PHY_C45(0, 0)
PHY_C45(8, 1)
PHY_C45(16, 2)
PHY_C45(20, 3)
};
&mdio_bus3 {
phy24: ethernet-phy@16 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <16>;
};
phy25: ethernet-phy@17 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <17>;
};
phy26: ethernet-phy@18 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <18>;
};
phy27: ethernet-phy@19 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <19>;
};
PHY_C45(24, 16)
PHY_C45(25, 17)
PHY_C45(26, 18)
PHY_C45(27, 19)
};
&switch0 {
target/linux/realtek/dts/rtl9303_hasivo_s1100wp-8gt-se.dts
+8 -46
View File
@@ -175,55 +175,17 @@
};
&mdio_bus0 {
/* External RTL8221B PHY */
phy0: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
/* External RTL8221B PHY */
phy8: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
/* External RTL8221B PHY */
phy16: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c45";
};
/* External RTL8221B PHY */
phy20: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c45";
};
PHY_C45(0, 1)
PHY_C45(8, 2)
PHY_C45(16, 3)
PHY_C45(20, 4)
};
&mdio_bus1 {
/* External RTL8221B PHY */
phy24: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
/* External RTL8221B PHY */
phy25: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
/* External RTL8221B PHY */
phy26: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c45";
};
/* External RTL8221B PHY */
phy27: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c45";
};
PHY_C45(24, 1)
PHY_C45(25, 2)
PHY_C45(26, 3)
PHY_C45(27, 4)
};
&switch0 {
target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi
+24 -119
View File
@@ -239,128 +239,33 @@
};
&mdio_bus0 {
/* External RTL8224 PHY */
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy4: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy5: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy8: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy9: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy12: ethernet-phy@6 {
reg = <6>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy13: ethernet-phy@7 {
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy16: ethernet-phy@8 {
reg = <8>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy17: ethernet-phy@9 {
reg = <9>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy20: ethernet-phy@10 {
reg = <10>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy21: ethernet-phy@11 {
reg = <11>;
compatible = "ethernet-phy-ieee802.3-c45";
};
PHY_C45(0, 0)
PHY_C45(1, 1)
PHY_C45(4, 2)
PHY_C45(5, 3)
PHY_C45(8, 4)
PHY_C45(9, 5)
PHY_C45(12, 6)
PHY_C45(13, 7)
PHY_C45(16, 8)
PHY_C45(17, 9)
PHY_C45(20, 10)
PHY_C45(21, 11)
};
&mdio_bus1 {
phy24: ethernet-phy@12 {
reg = <12>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy25: ethernet-phy@13 {
reg = <13>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy28: ethernet-phy@14 {
reg = <14>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy29: ethernet-phy@15 {
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy32: ethernet-phy@16 {
reg = <16>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy33: ethernet-phy@17 {
reg = <17>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy36: ethernet-phy@18 {
reg = <18>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy37: ethernet-phy@19 {
reg = <19>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy40: ethernet-phy@20 {
reg = <20>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy41: ethernet-phy@21 {
reg = <21>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy44: ethernet-phy@22 {
reg = <22>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy45: ethernet-phy@23 {
reg = <23>;
compatible = "ethernet-phy-ieee802.3-c45";
};
PHY_C45(24, 12)
PHY_C45(25, 13)
PHY_C45(28, 14)
PHY_C45(29, 15)
PHY_C45(32, 16)
PHY_C45(33, 17)
PHY_C45(36, 18)
PHY_C45(37, 19)
PHY_C45(40, 20)
PHY_C45(41, 21)
PHY_C45(44, 22)
PHY_C45(45, 23)
};
&switch0 {