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mediatek: filogic: add support for AlwayLink M01K43
Add support for the AlwayLink M01K43 5G CPE router.
Hardware specifications:
- SoC: MediaTek MT7981B (Filogic 820), dual-core Cortex-A53
- RAM: 256 MiB DDR3 (0x40000000, size 0x10000000)
- Flash: 128 MiB SPI-NAND (UBI, root) + 4 MiB SPI-NOR (bootloader)
- Ethernet: 4x 1 GbE LAN + 1x 2.5 GbE WAN
(MT7531 DSA switch; WAN via RTL8221B 2.5GbE PHY on MAC1)
- WiFi: MT7981 built-in 2x2 802.11ax (2.4 GHz + 5 GHz)
- USB: 1x xHCI (USB 2.0 only; USB 3.0 PHY pins not routed)
- Modem: M.2 B-Key slot wired for USB (tested: Quectel RM551E-GL,
Quectel RM520N-GL via QMI)
- LEDs: 10x GPIO LEDs (status, WAN, LAN, WiFi 2.4/5, signal bars)
- Buttons: WPS, Reset, RFKill
- Power: 12 V DC barrel jack
- UART: 3.3 V TTL header on PCB, 115200 8N1, no flow control
PCB silkscreen: M01K43 v5.0
Manufacturer: Shenzhen AlwayLink Wireless Technology Co., Ltd.
MAC addresses come from the 'ledeinfo' partition (mtd6) at offset 0x18
(label macaddr_ledeinfo_18); the stored value is the LAN MAC.
interface this port vendor firmware
------------------- ----------- --------------------------
eth0 / LAN bridge base + 0 base + 0
eth1 / WAN base + 1 base + 1
wifi 2.4 GHz band@0 base + 2 base (driver-derived)
wifi 5 GHz band@1 base + 3 base + LAA bit (driver)
The vendor's ethernet scheme (LAN = base, WAN = base + 1) is reproduced
exactly. For WiFi the vendor's proprietary mt_wifi driver ignores the
stored per-radio MAC and derives each BSSID from the base by setting the
locally-administered bit, so the radios are not given clean unicast
offsets. Under mainline mt76 + DSA, reusing the base (LAN) MAC on a radio
collides at L2 with the gmac0 conduit, so this port assigns the 2.4 GHz
and 5 GHz radios base + 2 and base + 3 — unique unicast addresses in the
same OUI block.
Installation
------------
Stock firmware defaults (verified on shipping units):
LAN IP: 192.168.100.1
SSH/web: user 'root', password 'admin'
Serial: 3.3 V TTL UART header on PCB, 115200 8N1, no flow control
Image artifacts produced by this device definition:
openwrt-mediatek-filogic-alwaylink_m01k43-squashfs-factory.bin
openwrt-mediatek-filogic-alwaylink_m01k43-squashfs-sysupgrade.bin
Before flashing, back up the per-unit partitions (cannot be
regenerated):
ssh root@192.168.100.1
dd if=/dev/mtd3 of=/tmp/factory.bin bs=1 count=655360
dd if=/dev/mtd6 of=/tmp/ledeinfo.bin bs=1 count=65536
exit
scp root@192.168.100.1:/tmp/factory.bin .
scp root@192.168.100.1:/tmp/ledeinfo.bin .
Method 1 - From an existing OpenWrt install (sysupgrade):
IMG=openwrt-mediatek-filogic-alwaylink_m01k43-squashfs-sysupgrade.bin
scp "$IMG" root@192.168.1.1:/tmp/sysupgrade.bin
ssh root@192.168.1.1 sysupgrade -n /tmp/sysupgrade.bin
Method 2 - U-Boot serial recovery via TFTP (requires 3.3 V USB-UART
adapter):
1. Attach 3.3 V USB-UART (TX, RX, GND) to the PCB header. Open a
terminal at 115200 8N1, no flow control.
2. Configure a TFTP server on the host PC at IP 192.168.2.88.
Place the factory image in the TFTP root, renamed if desired.
3. Power on the router. The BL2/U-Boot banner prints within ~1
second; press any key during the autoboot countdown to enter
the U-Boot menu.
4. From the menu, select 'Upgrade ubi'. U-Boot's default IP is
192.168.2.1 and it expects the TFTP server at 192.168.2.88.
Provide the factory image filename when prompted.
5. Wait for the write to complete; U-Boot reboots into OpenWrt.
Method 3 - From a NAND programmer (brick-recovery path):
1. Clip onto or desolder the SPI-NAND chip and dump the full
128 MiB with a programmer (e.g. RT809H, CH341A with NAND
adapter). Keep the dump as a recovery image.
2. Using the same programmer, write the factory.bin image to
the UBI region of the NAND. The SPI-NOR (BL2/u-boot-env/
Factory/FIP/woem/ledeinfo/nvram) must NOT be erased - those
partitions are per-unit and live on the separate 4 MiB NOR.
3. Reseat the chip and power on. The bootloader on NOR will
load the new kernel and rootfs from UBI.
Signed-off-by: Richard Jones <richard@netsolution.shop>
Link: https://github.com/openwrt/openwrt/pull/22818
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Richard Jones
committed by
Hauke Mehrtens
Hauke Mehrtens
parent
a3105d3f95
commit
db7d264e47
@@ -150,7 +150,8 @@ smartrg,sdg-8733a|\
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smartrg,sdg-8734)
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ubootenv_add_mmc "u-boot-env" "mmcblk0" "0x0" "0x8000" "0x8000"
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;;
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teltonika,rutc50)
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teltonika,rutc50|\
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alwaylink,m01k43)
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ubootenv_add_mtd "u-boot-env" "0x0" "0x10000" "0x10000"
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;;
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tplink,archer-ax80-v1|\
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@@ -0,0 +1,442 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "mt7981b.dtsi"
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/ {
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model = "AlwayLink M01K43";
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compatible = "alwaylink,m01k43", "mediatek,mt7981";
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aliases {
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serial0 = &uart0;
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label-mac-device = &gmac0;
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led-boot = &led_wan;
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led-failsafe = &led_status_red;
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led-running = &led_status_blue;
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led-upgrade = &led_status_blue;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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reg = <0 0x40000000 0 0x10000000>;
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device_type = "memory";
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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debounce-interval = <20>;
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};
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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debounce-interval = <20>;
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};
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button-rfkill {
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label = "rfkill";
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linux,code = <KEY_RFKILL>;
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gpios = <&pio 7 GPIO_ACTIVE_LOW>;
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debounce-interval = <20>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_wan: led-wan {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_WAN;
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gpios = <&pio 8 GPIO_ACTIVE_LOW>;
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};
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led-lan2 {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <2>;
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gpios = <&pio 4 GPIO_ACTIVE_LOW>;
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};
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led-lan3 {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <3>;
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gpios = <&pio 22 GPIO_ACTIVE_LOW>;
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};
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led_status_blue: led-status-blue {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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};
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led_status_red: led-status-red {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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function-enumerator = <1>;
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gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
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};
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led-wifi {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_WLAN;
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gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0tpt";
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};
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led-signal-4g-yellow {
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_INDICATOR;
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function-enumerator = <0>;
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gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
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};
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led-signal-5g-blue {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_INDICATOR;
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function-enumerator = <1>;
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gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
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};
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led-signal-5g-yellow {
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_INDICATOR;
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function-enumerator = <2>;
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gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
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};
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led-signal-4g-blue {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_INDICATOR;
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function-enumerator = <3>;
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gpios = <&pio 13 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cells = <&macaddr_ledeinfo_18 0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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};
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};
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&mdio_bus {
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rtl8221b_phy: ethernet-phy@6 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <6>;
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};
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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phy-handle = <&swphy0>;
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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phy-handle = <&swphy1>;
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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phy-handle = <&swphy2>;
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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phy-handle = <&swphy3>;
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};
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port@5 {
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reg = <5>;
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label = "wan";
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nvmem-cells = <&macaddr_ledeinfo_18 1>;
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nvmem-cell-names = "mac-address";
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phy-mode = "2500base-x";
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phy-handle = <&rtl8221b_phy>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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swphy0: phy@0 {
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reg = <0>;
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};
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swphy1: phy@1 {
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reg = <1>;
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};
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swphy2: phy@2 {
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reg = <2>;
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};
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swphy3: phy@3 {
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reg = <3>;
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};
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "ubi";
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reg = <0x0000000 0x3800000>;
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};
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partition@3800000 {
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label = "ubi2";
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reg = <0x3800000 0x3800000>;
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};
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};
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};
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};
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&spi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi2_flash_pins>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0x000000 0x040000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x040000 0x010000>;
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};
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factory: partition@50000 {
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label = "factory";
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reg = <0x050000 0x0b0000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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/* WiFi EEPROM at offset 0x0, size 0x5000 */
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eeprom_factory: eeprom@0 {
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reg = <0x0 0x5000>;
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};
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};
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};
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partition@100000 {
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label = "fip";
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reg = <0x100000 0x200000>;
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read-only;
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};
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partition@300000 {
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label = "woem";
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reg = <0x300000 0x010000>;
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};
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partition@310000 {
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label = "ledeinfo";
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reg = <0x310000 0x010000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_ledeinfo_18: macaddr@18 {
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compatible = "mac-base";
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reg = <0x18 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@320000 {
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label = "nvram";
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reg = <0x320000 0x010000>;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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spi2_flash_pins: spi2-pins {
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mux {
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function = "spi";
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groups = "spi2", "spi2_wp_hold";
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};
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conf-pu {
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pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&xhci {
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phys = <&u2port0 PHY_TYPE_USB2>;
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mediatek,u3p-dis-msk = <0x01>;
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status = "okay";
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};
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&wifi {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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nvmem-cells = <&eeprom_factory>;
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nvmem-cell-names = "eeprom";
|
||||
|
||||
band@0 {
|
||||
reg = <0>;
|
||||
nvmem-cells = <&macaddr_ledeinfo_18 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
band@1 {
|
||||
reg = <1>;
|
||||
nvmem-cells = <&macaddr_ledeinfo_18 3>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -24,6 +24,9 @@ acer,predator-w6x-stock|\
|
||||
acer,predator-w6x-ubootmod)
|
||||
ucidef_set_led_netdev "wan" "wan" "rgb:status" "eth1"
|
||||
;;
|
||||
alwaylink,m01k43)
|
||||
ucidef_set_led_netdev "wan" "WAN" "blue:wan" "wan"
|
||||
;;
|
||||
asus,rt-ax52|\
|
||||
asus,rt-ax57m|\
|
||||
snr,snr-cpe-ax2)
|
||||
|
||||
@@ -274,6 +274,25 @@ define Device/acer_vero-w6m
|
||||
endef
|
||||
TARGET_DEVICES += acer_vero-w6m
|
||||
|
||||
define Device/alwaylink_m01k43
|
||||
DEVICE_VENDOR := AlwayLink
|
||||
DEVICE_MODEL := M01K43
|
||||
DEVICE_DTS := mt7981b-alwaylink-m01k43
|
||||
DEVICE_DTS_DIR := ../dts
|
||||
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware \
|
||||
kmod-usb3 kmod-usb-serial-option kmod-usb-net-qmi-wwan uqmi \
|
||||
kmod-phy-realtek uboot-envtools
|
||||
KERNEL_IN_UBI := 1
|
||||
UBINIZE_OPTS := -E 5
|
||||
BLOCKSIZE := 128k
|
||||
PAGESIZE := 2048
|
||||
IMAGE_SIZE := 57344k
|
||||
IMAGES += factory.bin
|
||||
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
|
||||
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
|
||||
endef
|
||||
TARGET_DEVICES += alwaylink_m01k43
|
||||
|
||||
define Device/asiarf_ap7986-003
|
||||
DEVICE_VENDOR := AsiaRF
|
||||
DEVICE_MODEL := AP7986 003
|
||||
|
||||
Reference in New Issue
Block a user