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ipq40xx: add support for Sophos APX 120
Specifications
--------------
- SoC : Qualcomm IPQ4019 (4x ARMv7 Cortex-A7 @ 716 MHz, NEON/VFPv4)
- RAM : 256 MiB DDR3
- SPI-NOR : Macronix MX25L1606E (2 MiB) - bootloader + ART calibration
- SPI-NAND : Winbond W25M02GV (256 MiB, dual-die) - kernel + rootfs (UBI)
- WLAN : IPQ4019 on-chip, 2 radios
- 2.4 GHz : 2x2 802.11b/g/n (wifi0)
- 5 GHz : 2x2 802.11n/ac (wifi1)
- Ethernet : 1x RJ45 via QCA8075 PHY, jack wired to switch port 5
- TPM : Atmel AT97SC3204T on i2c @ 0x29
- Buttons : 1x Reset (gpio2, active low)
- LEDs : green (gpio3, power), red (gpio4, status / panic)
- UART : 115200 8N1 3.3V (gpio60 TX / gpio61 RX)
- Power : DC 12V
MAC addresses
-------------
Read from the ART partition on SPI-NOR flash at offset 0x0,
encoded as a nvmem cell in the DTS.
Flash layout
------------
SPI-NOR (2 MiB) carries the QCA bootloader chain and ART:
SBL1 0x000000 256 KiB (bootloader stage 1)
MIBIB 0x040000 128 KiB (flash partition table)
QSEE 0x060000 384 KiB (TrustZone / secure env)
CDT 0x0c0000 64 KiB (configuration data tbl)
DDRPARAMS 0x0d0000 64 KiB (DDR training parameters)
APPSBLENV 0x0e0000 64 KiB (U-Boot environment)
APPSBL 0x0f0000 512 KiB (U-Boot)
ART 0x170000 64 KiB (WiFi calibration + MAC)
The W25M02GV SPI-NAND is split at the die boundary
(die 0 = rootfs, die 1 = data) to work around a stock U-Boot bug:
the die-select is broken, causing reads from die 1 to return
0xFF. If UBI wear-leveling relocated the layout volume to
die 1, U-Boot would fail to attach UBI, bricking boot.
Splitting the chip keeps all UBI metadata U-Boot reads from
die 0.
Stock U-Boot hardcodes the UBI attach window to 64 MiB;
the bootcmd replacement expands it to 128 MiB to use the
full die 0.
rootfs 0x00000000 128 MiB
data 0x08000000 128 MiB
Installation
------------
1. Build image for sophos_apx120 target
2. Start TFTP server in folder with
openwrt-ipq40xx-generic-sophos_apx120-initramfs-
uImage.itb
3. Plug in Serial TTL Adapter (115200 baud):
| APX 120 | VCC | RX | GND | TX |
|--------|------|-----|-----|-----|
| USB | X | TX | GND | RX |
|--------|------|-----|-----|-----|
3. Short U26 pin 8 (first pin on left, top row on NAND
Chip, with ethernet port facing you) to ground for a
fraction of a second during power-on. Expected output shows
NAND detection and CRC warning, then U-Boot prompt.
4. In U-Boot run:
$ setenv bootdelay 5
$ setenv verify no
$ saveenv
$ tftpboot 0x84000000
openwrt-ipq40xx-generic-sophos_apx120-initramfs-uImage.itb
$ bootm 0x84000000
5. Setup Networking Transfer the sysupgrade image using a
HTTP server or scp
6. In OpenWrt run:
$ fw_setenv bootcmd 'set fdt_high 0x87000000 && \
set bootargs ubi.mtd=rootfs root=mtd:ubi_rootfs \
rootfstype=squashfs rootwait && nand device 1 && \
set mtdids nand1=nand1 && set mtdparts \
mtdparts=nand1:0x8000000@0x0(fs) && \
ubi part fs && ubi read 0x84000000 kernel && \
bootm 0x84000000#config@ap.dk01.1-c2'
$ ubiformat /dev/mtd9 -y
$ sysupgrade -n
openwrt-ipq40xx-generic-sophos_apx120-squashfs-sysupgrade.bin
7. Device should reboot into OpenWrt
Notes
-----
- With firmware version 1.0.019, the image drops directly
into a shell, so NAND glitching may be skipped.
- The platform sysupgrade script reflashes the entire
die-0 UBI partition via `ubiformat` — live volume
manipulation would leave the UBI layout in a state the
stock U-Boot rejects, which bricks the device.
Known Issues
------------
- Some device revisions have an TPM chip that
is not detected/supported or is broken
Signed-off-by: Morice Olbert <synapse7062@spnkr.de>
Link: https://github.com/openwrt/openwrt/pull/24328
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
This commit is contained in:
Morice Olbert authored and 
Jonas Jelonek committed
1 parent
3458b4c431
commit
dfd531f517
5 files changed
+363
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No files matched your search
@@ -25,7 +25,8 @@ openmesh,a42|\
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openmesh,a62|\
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pakedge,wr-1|\
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plasmacloud,pa1200|\
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plasmacloud,pa2200)
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plasmacloud,pa2200|\
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sophos,apx120)
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ubootenv_add_uci_config "/dev/mtd5" "0x0" "0x10000" "0x10000"
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;;
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aruba,ap-303)
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@@ -142,6 +142,9 @@ ipq40xx_setup_interfaces()
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skspruce,wia3300-20)
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ucidef_set_interfaces_lan_wan "ETH2" "ETH1"
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;;
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sophos,apx120)
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ucidef_set_interface_lan "lan"
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;;
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zte,mf286d)
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ucidef_set_interfaces_lan_wan "lan2 lan3 lan4" "wan"
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;;
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@@ -238,6 +238,12 @@ platform_do_upgrade() {
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sony,ncp-hg100-cellular)
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sony_emmc_do_upgrade "$1"
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;;
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sophos,apx120)
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CI_UBIPART="rootfs"
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# Strip fwtool trailer for eraseblock alignment before ubiformat.
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fwtool -q -t -i /dev/null "$1" || true
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nand_do_upgrade "$1"
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;;
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teltonika,rutx10|\
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teltonika,rutx50|\
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zte,mf18a|\
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@@ -0,0 +1,336 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/soc/qcom,tcsr.h>
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/ {
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model = "Sophos APX 120";
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compatible = "sophos,apx120", "qcom,ipq4019";
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aliases {
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ethernet0 = &gmac;
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led-boot = &led_green;
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led-failsafe = &led_red;
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led-running = &led_green;
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led-upgrade = &led_red;
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label-mac-device = &gmac;
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};
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chosen {
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bootargs-append = " root=/dev/ubiblock0_1 ubi.mtd=data";
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};
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soc {
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counter@4a1000 {
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compatible = "qcom,qca-gcnt";
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reg = <0x4a1000 0x4>;
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};
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tcsr@1949000 {
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compatible = "qcom,tcsr";
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reg = <0x1949000 0x100>;
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qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
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};
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tcsr@194b000 {
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compatible = "qcom,tcsr";
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reg = <0x194b000 0x100>;
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qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
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};
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ess_tcsr@1953000 {
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compatible = "qcom,tcsr";
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reg = <0x1953000 0x1000>;
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qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
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};
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tcsr@1957000 {
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compatible = "qcom,tcsr";
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reg = <0x1957000 0x100>;
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qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_green: green {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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led_red: red {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_RED>;
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gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
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panic-indicator;
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};
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};
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};
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&watchdog {
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status = "okay";
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};
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&prng {
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status = "okay";
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};
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&blsp_dma {
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status = "okay";
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};
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&blsp1_uart1 {
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status = "okay";
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pinctrl-0 = <&serial_0_pins>;
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pinctrl-names = "default";
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};
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&blsp1_i2c3 {
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status = "okay";
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pinctrl-0 = <&i2c_0_pins>;
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pinctrl-names = "default";
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tpm@29 {
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compatible = "atmel,at97sc3204t";
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reg = <0x29>;
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};
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};
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&blsp1_spi1 {
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status = "okay";
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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cs-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>,
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<&tlmm 0 GPIO_ACTIVE_LOW>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "SBL1";
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reg = <0x00000000 0x00040000>;
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read-only;
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};
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partition@40000 {
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label = "MIBIB";
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reg = <0x00040000 0x00020000>;
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read-only;
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};
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partition@60000 {
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label = "QSEE";
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reg = <0x00060000 0x00060000>;
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read-only;
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};
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partition@c0000 {
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label = "CDT";
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reg = <0x000c0000 0x00010000>;
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read-only;
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};
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partition@d0000 {
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label = "DDRPARAMS";
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reg = <0x000d0000 0x00010000>;
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read-only;
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};
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partition@e0000 {
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label = "APPSBLENV";
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reg = <0x000e0000 0x00010000>;
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};
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partition@f0000 {
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label = "APPSBL";
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reg = <0x000f0000 0x00080000>;
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read-only;
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};
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partition@170000 {
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label = "ART";
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reg = <0x00170000 0x00010000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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precal_art_1000: precal@1000 {
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reg = <0x1000 0x2f20>;
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};
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precal_art_5000: precal@5000 {
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reg = <0x5000 0x2f20>;
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};
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};
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};
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};
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};
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nand@1 {
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compatible = "spi-nand";
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reg = <1>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* Dual-die NAND: UBI on die 0, data on die 1 */
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partition@0 {
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label = "rootfs";
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reg = <0x00000000 0x08000000>;
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linux,rootfs;
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};
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partition@8000000 {
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label = "data";
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reg = <0x08000000 0x08000000>;
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};
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};
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};
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};
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&tlmm {
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serial_0_pins: serial_0_pinmux {
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mux {
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pins = "gpio60", "gpio61";
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function = "blsp_uart0";
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bias-disable;
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};
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};
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i2c_0_pins: i2c_0_pinmux {
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mux {
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pins = "gpio58", "gpio59";
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function = "blsp_i2c0";
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bias-disable;
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};
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};
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mdio_pins: mdio_pinmux {
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mux_mdio {
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pins = "gpio53";
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function = "mdio";
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bias-pull-up;
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};
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mux_mdc {
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pins = "gpio52";
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function = "mdc";
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bias-pull-up;
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};
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};
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spi_0_pins: spi_0_pinmux {
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mux_spi {
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function = "blsp_spi0";
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pins = "gpio55", "gpio56", "gpio57";
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drive-strength = <12>;
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bias-disable;
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};
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mux_cs {
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function = "gpio";
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pins = "gpio54", "gpio0";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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phy_reset {
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gpio-hog;
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line-name = "phy-reset";
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gpios = <62 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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};
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&gmac {
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status = "okay";
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nvmem-cells = <&macaddr_art_0>;
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nvmem-cell-names = "mac-address";
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};
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&switch {
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status = "okay";
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};
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&swport5 {
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status = "okay";
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label = "lan";
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};
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&usb3_ss_phy {
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status = "okay";
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};
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&usb3_hs_phy {
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status = "okay";
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};
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&usb3 {
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status = "okay";
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};
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&usb2_hs_phy {
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status = "okay";
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};
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&usb2 {
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status = "okay";
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};
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&wifi0 {
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status = "okay";
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nvmem-cell-names = "pre-calibration";
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nvmem-cells = <&precal_art_1000>;
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qcom,ath10k-calibration-variant = "Sophos-APX120";
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};
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&wifi1 {
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status = "okay";
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nvmem-cell-names = "pre-calibration";
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nvmem-cells = <&precal_art_5000>;
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qcom,ath10k-calibration-variant = "Sophos-APX120";
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};
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@@ -1250,6 +1250,22 @@ define Device/sony_ncp-hg100-cellular
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endef
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TARGET_DEVICES += sony_ncp-hg100-cellular
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define Device/sophos_apx120
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$(call Device/FitImage)
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$(call Device/UbiFit)
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DEVICE_VENDOR := Sophos
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DEVICE_MODEL := APX 120
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SOC := qcom-ipq4019
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DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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IMAGES := sysupgrade.bin
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DEVICE_PACKAGES := kmod-tpm-i2c-atmel
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# Stock U-Boot rejects UBI layout changes from sysupgrade-tar
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IMAGE/sysupgrade.bin := append-ubi | append-metadata
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endef
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TARGET_DEVICES += sophos_apx120
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define Device/teltonika_rutx10
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$(call Device/FitImage)
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$(call Device/UbiFit)
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Block a user