ath79: dts: set builtin-switch for SoCs with fixed-link on eth1

Introduce the property from previous commit on the SoCs which use a
fixed 1000FD link to their internal switch. This way, devices which have
a single port attached through it can drop the "fixed-link" node if
needed, and attach proper phy-handle provided by built-in switch to
the port, to report link status information on userspace.

AR7100 is skipped intentionally, because its connection to built-in
switch isn't a fixed-link.

Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/9971
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

target/linux/ath79/dts/ar7240.dtsi

@@ -90,6 +90,7 @@
 	reset-names = "mac";
 
 	phy-mode = "gmii";
+	builtin-switch;
 
 	fixed-link {
 		speed = <1000>;

target/linux/ath79/dts/ar7241.dtsi

@@ -94,6 +94,7 @@
 	reset-names = "mac";
 
 	phy-mode = "gmii";
+	builtin-switch;
 
 	fixed-link {
 		speed = <1000>;

target/linux/ath79/dts/ar7242.dtsi

@@ -85,6 +85,7 @@
 	reset-names = "mac";
 
 	phy-mode = "gmii";
+	builtin-switch;
 
 	fixed-link {
 		speed = <1000>;

target/linux/ath79/dts/ar9330.dtsi

@@ -221,6 +221,7 @@
 
 	pll-data = <0x00110000 0x00001099 0x00991099>;
 	phy-mode = "gmii";
+	builtin-switch;
 
 	resets = <&rst 13>;
 	reset-names = "mac";

target/linux/ath79/dts/ar934x.dtsi

@@ -283,6 +283,7 @@
 	clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
 	clock-names = "eth", "mdio";
 	phy-mode = "gmii";
+	builtin-switch;
 
 	fixed-link {
 		speed = <1000>;

target/linux/ath79/dts/qca953x.dtsi

@@ -283,6 +283,7 @@
 	reset-names = "mac";
 
 	phy-mode = "gmii";
+	builtin-switch;
 
 	fixed-link {
 		speed = <1000>;

target/linux/ath79/dts/qca956x.dtsi

@@ -324,6 +324,7 @@
 	compatible = "qca,qca9560-eth", "syscon";
 
 	phy-mode = "gmii";
+	builtin-switch;
 
 	resets = <&rst 13>;
 	reset-names = "mac";