libunwind: replace local patches with upstream

libunwind solves these in different ways.

ppc-musl is still pending upstream.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21057
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Rosen Penev
2025-12-05 18:03:52 -08:00
committed by Robert Marko
parent 2f52b8f724
commit f259fae36c
6 changed files with 168 additions and 262 deletions
+1 -1
View File
@@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=libunwind
PKG_VERSION:=1.8.3
PKG_RELEASE:=2
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/libunwind/libunwind/releases/download/v$(PKG_VERSION)/
@@ -0,0 +1,97 @@
From df0807c1c2302c364c281d3d1109ddc10c9c7b19 Mon Sep 17 00:00:00 2001
From: Ross Burton <ross.burton@arm.com>
Date: Tue, 16 Jan 2024 18:21:26 +0000
Subject: [PATCH] coredump: use glibc or musl register names as appropriate on
MIPS
glibc has register macros of the form EF_REGx, but musl uses EF_Rx.
Handle this by using a macro to use the correct names.
Closes #708.
Signed-off-by: Ross Burton <ross.burton@arm.com>
---
src/coredump/_UCD_access_reg_linux.c | 69 ++++++++++++++++------------
1 file changed, 39 insertions(+), 30 deletions(-)
--- a/src/coredump/_UCD_access_reg_linux.c
+++ b/src/coredump/_UCD_access_reg_linux.c
@@ -100,38 +100,47 @@ _UCD_access_reg (unw_addr_space_t as UN
};
#else
#if defined(UNW_TARGET_MIPS)
+
+/* glibc and musl use different names */
+#ifdef __GLIBC__
+#define EF_REG(x) EF_REG ## x
+#else
+#include <sys/reg.h>
+#define EF_REG(x) EF_R ## x
+#endif
+
static const uint8_t remap_regs[] =
{
- [UNW_MIPS_R0] = EF_REG0,
- [UNW_MIPS_R1] = EF_REG1,
- [UNW_MIPS_R2] = EF_REG2,
- [UNW_MIPS_R3] = EF_REG3,
- [UNW_MIPS_R4] = EF_REG4,
- [UNW_MIPS_R5] = EF_REG5,
- [UNW_MIPS_R6] = EF_REG6,
- [UNW_MIPS_R7] = EF_REG7,
- [UNW_MIPS_R8] = EF_REG8,
- [UNW_MIPS_R9] = EF_REG9,
- [UNW_MIPS_R10] = EF_REG10,
- [UNW_MIPS_R11] = EF_REG11,
- [UNW_MIPS_R12] = EF_REG12,
- [UNW_MIPS_R13] = EF_REG13,
- [UNW_MIPS_R14] = EF_REG14,
- [UNW_MIPS_R15] = EF_REG15,
- [UNW_MIPS_R16] = EF_REG16,
- [UNW_MIPS_R17] = EF_REG17,
- [UNW_MIPS_R18] = EF_REG18,
- [UNW_MIPS_R19] = EF_REG19,
- [UNW_MIPS_R20] = EF_REG20,
- [UNW_MIPS_R21] = EF_REG21,
- [UNW_MIPS_R22] = EF_REG22,
- [UNW_MIPS_R23] = EF_REG23,
- [UNW_MIPS_R24] = EF_REG24,
- [UNW_MIPS_R25] = EF_REG25,
- [UNW_MIPS_R28] = EF_REG28,
- [UNW_MIPS_R29] = EF_REG29,
- [UNW_MIPS_R30] = EF_REG30,
- [UNW_MIPS_R31] = EF_REG31,
+ [UNW_MIPS_R0] = EF_REG(0),
+ [UNW_MIPS_R1] = EF_REG(1),
+ [UNW_MIPS_R2] = EF_REG(2),
+ [UNW_MIPS_R3] = EF_REG(3),
+ [UNW_MIPS_R4] = EF_REG(4),
+ [UNW_MIPS_R5] = EF_REG(5),
+ [UNW_MIPS_R6] = EF_REG(6),
+ [UNW_MIPS_R7] = EF_REG(7),
+ [UNW_MIPS_R8] = EF_REG(8),
+ [UNW_MIPS_R9] = EF_REG(9),
+ [UNW_MIPS_R10] = EF_REG(10),
+ [UNW_MIPS_R11] = EF_REG(11),
+ [UNW_MIPS_R12] = EF_REG(12),
+ [UNW_MIPS_R13] = EF_REG(13),
+ [UNW_MIPS_R14] = EF_REG(14),
+ [UNW_MIPS_R15] = EF_REG(15),
+ [UNW_MIPS_R16] = EF_REG(16),
+ [UNW_MIPS_R17] = EF_REG(17),
+ [UNW_MIPS_R18] = EF_REG(18),
+ [UNW_MIPS_R19] = EF_REG(19),
+ [UNW_MIPS_R20] = EF_REG(20),
+ [UNW_MIPS_R21] = EF_REG(21),
+ [UNW_MIPS_R22] = EF_REG(22),
+ [UNW_MIPS_R23] = EF_REG(23),
+ [UNW_MIPS_R24] = EF_REG(24),
+ [UNW_MIPS_R25] = EF_REG(25),
+ [UNW_MIPS_R28] = EF_REG(28),
+ [UNW_MIPS_R29] = EF_REG(29),
+ [UNW_MIPS_R30] = EF_REG(30),
+ [UNW_MIPS_R31] = EF_REG(31),
[UNW_MIPS_PC] = EF_CP0_EPC,
};
#elif defined(UNW_TARGET_S390X)
@@ -1,3 +1,16 @@
From b2d2e81e5fe53b01a0dd39e2e634f963ebeaab43 Mon Sep 17 00:00:00 2001
From: Ross Burton <ross.burton@arm.com>
Date: Tue, 16 Jan 2024 18:22:38 +0000
Subject: [PATCH] mips/getcontext.S: use assembler-friendly byte order symbols
endian.h on musl/mips can't be included in __ASSEMBLER__ mode,
so use the __BYTE_ORDER__ symbol instead.
Signed-off-by: Ross Burton <ross.burton@arm.com>
---
src/mips/getcontext.S | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- a/src/mips/getcontext.S
+++ b/src/mips/getcontext.S
@@ -24,12 +24,12 @@ OF CONTRACT, TORT OR OTHERWISE, ARISING
@@ -1,45 +0,0 @@
--- a/include/libunwind-mips.h
+++ b/include/libunwind-mips.h
@@ -121,6 +121,42 @@ typedef enum
}
mips_regnum_t;
+#ifndef __GLIBC__
+#include <sys/reg.h>
+
+/* musl as of 1.1.14 does not export these */
+#define EF_REG0 6
+#define EF_REG1 7
+#define EF_REG2 8
+#define EF_REG3 9
+#define EF_REG4 10
+#define EF_REG5 11
+#define EF_REG6 12
+#define EF_REG7 13
+#define EF_REG8 14
+#define EF_REG9 15
+#define EF_REG10 16
+#define EF_REG11 17
+#define EF_REG12 18
+#define EF_REG13 19
+#define EF_REG14 20
+#define EF_REG15 21
+#define EF_REG16 22
+#define EF_REG17 23
+#define EF_REG18 24
+#define EF_REG19 25
+#define EF_REG20 26
+#define EF_REG21 27
+#define EF_REG22 28
+#define EF_REG23 29
+#define EF_REG24 30
+#define EF_REG25 31
+#define EF_REG28 34
+#define EF_REG29 35
+#define EF_REG30 36
+#define EF_REG31 37
+#endif
+
typedef enum
{
UNW_MIPS_ABI_O32,
+45 -212
View File
@@ -1,241 +1,74 @@
From 7f86abad3fec8c501c512283e5aa2512f91f7fbb Mon Sep 17 00:00:00 2001
From: Ross Burton <ross.burton@arm.com>
Date: Wed, 17 Jan 2024 16:28:39 +0000
Subject: [PATCH] Handle musl on PPC32
On Linux, glibc and musl disagree over the layout of the ucontext_t
structure. For more details, see the musl mailing list:
https://www.openwall.com/lists/musl/2018/02/22/1
Add conditionals to handle both the glibc and musl layout of the
structures.
Closes #709.
Signed-off-by: Ross Burton <ross.burton@arm.com>
---
src/ppc32/Ginit.c | 13 ++++++++++---
src/ppc32/ucontext_i.h | 5 +++++
2 files changed, 15 insertions(+), 3 deletions(-)
--- a/include/libunwind-ppc32.h
+++ b/include/libunwind-ppc32.h
@@ -40,6 +40,10 @@ extern "C" {
@@ -38,6 +38,7 @@ extern "C" {
#include <inttypes.h>
#include <stdint.h>
+#include <sys/reg.h>
#include <ucontext.h>
+#ifndef __GLIBC__
+#include <bits/reg.h>
+#endif
+
#ifndef UNW_EMPTY_STRUCT
# define UNW_EMPTY_STRUCT uint8_t unused;
#endif
@@ -81,6 +85,88 @@ typedef int64_t unw_sword_t;
typedef long double unw_tdep_fpreg_t;
+#ifndef __GLIBC__
+
+/* We can't include asm/ptrace.h here, as it conflicts with musl's definitions */
+
+#define PT_R0 0
+#define PT_R1 1
+#define PT_R2 2
+#define PT_R3 3
+#define PT_R4 4
+#define PT_R5 5
+#define PT_R6 6
+#define PT_R7 7
+#define PT_R8 8
+#define PT_R9 9
+#define PT_R10 10
+#define PT_R11 11
+#define PT_R12 12
+#define PT_R13 13
+#define PT_R14 14
+#define PT_R15 15
+#define PT_R16 16
+#define PT_R17 17
+#define PT_R18 18
+#define PT_R19 19
+#define PT_R20 20
+#define PT_R21 21
+#define PT_R22 22
+#define PT_R23 23
+#define PT_R24 24
+#define PT_R25 25
+#define PT_R26 26
+#define PT_R27 27
+#define PT_R28 28
+#define PT_R29 29
+#define PT_R30 30
+#define PT_R31 31
+
+#define PT_NIP 32
+#define PT_MSR 33
+#define PT_ORIG_R3 34
+#define PT_CTR 35
+#define PT_LNK 36
+#define PT_XER 37
+#define PT_CCR 38
+#ifndef __powerpc64__
+#define PT_MQ 39
+#else
+#define PT_SOFTE 39
+#endif
+#define PT_TRAP 40
+#define PT_DAR 41
+#define PT_DSISR 42
+#define PT_RESULT 43
+#define PT_DSCR 44
+#define PT_REGS_COUNT 44
+
+#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
+
+#ifndef __powerpc64__
+
+#define PT_FPR31 (PT_FPR0 + 2*31)
+#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
+
+#else /* __powerpc64__ */
+
+#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
+
+
+#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
+#define PT_VSCR (PT_VR0 + 32*2 + 1)
+#define PT_VRSAVE (PT_VR0 + 33*2)
+
+
+/*
+ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
+ */
+#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
+#define PT_VSR31 (PT_VSR0 + 2*31)
+#endif /* __powerpc64__ */
+
+#endif /* !__GLIBC__ */
+
typedef enum
{
UNW_PPC32_R0,
--- a/include/libunwind-ppc64.h
+++ b/include/libunwind-ppc64.h
@@ -40,6 +40,10 @@ extern "C" {
#include <stdint.h>
#include <ucontext.h>
+#ifndef __GLIBC__
+#include <bits/reg.h>
+#endif
+
#ifndef UNW_EMPTY_STRUCT
# define UNW_EMPTY_STRUCT uint8_t unused;
#endif
@@ -88,6 +92,88 @@ typedef struct {
uint64_t halves[2];
} unw_tdep_vreg_t;
+#ifndef __GLIBC__
+
+/* We can't include asm/ptrace.h here, as it conflicts with musl's definitions */
+
+#define PT_R0 0
+#define PT_R1 1
+#define PT_R2 2
+#define PT_R3 3
+#define PT_R4 4
+#define PT_R5 5
+#define PT_R6 6
+#define PT_R7 7
+#define PT_R8 8
+#define PT_R9 9
+#define PT_R10 10
+#define PT_R11 11
+#define PT_R12 12
+#define PT_R13 13
+#define PT_R14 14
+#define PT_R15 15
+#define PT_R16 16
+#define PT_R17 17
+#define PT_R18 18
+#define PT_R19 19
+#define PT_R20 20
+#define PT_R21 21
+#define PT_R22 22
+#define PT_R23 23
+#define PT_R24 24
+#define PT_R25 25
+#define PT_R26 26
+#define PT_R27 27
+#define PT_R28 28
+#define PT_R29 29
+#define PT_R30 30
+#define PT_R31 31
+
+#define PT_NIP 32
+#define PT_MSR 33
+#define PT_ORIG_R3 34
+#define PT_CTR 35
+#define PT_LNK 36
+#define PT_XER 37
+#define PT_CCR 38
+#ifndef __powerpc64__
+#define PT_MQ 39
+#else
+#define PT_SOFTE 39
+#endif
+#define PT_TRAP 40
+#define PT_DAR 41
+#define PT_DSISR 42
+#define PT_RESULT 43
+#define PT_DSCR 44
+#define PT_REGS_COUNT 44
+
+#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
+
+#ifndef __powerpc64__
+
+#define PT_FPR31 (PT_FPR0 + 2*31)
+#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
+
+#else /* __powerpc64__ */
+
+#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
+
+
+#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
+#define PT_VSCR (PT_VR0 + 32*2 + 1)
+#define PT_VRSAVE (PT_VR0 + 33*2)
+
+
+/*
+ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
+ */
+#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
+#define PT_VSR31 (PT_VSR0 + 2*31)
+#endif /* __powerpc64__ */
+
+#endif /* !__GLIBC__ */
+
typedef enum
{
UNW_PPC64_R0,
--- a/src/ppc32/Ginit.c
+++ b/src/ppc32/Ginit.c
@@ -46,10 +46,15 @@ static void *
@@ -42,6 +42,13 @@ static struct unw_addr_space local_addr_
unw_addr_space_t unw_local_addr_space = &local_addr_space;
+/* glibc and musl disagree over the layout of this struct */
+#ifdef __GLIBC__
+#define _UCONTEXT_UC_REGS(uc) uc->uc_mcontext.uc_regs
+#else
+#define _UCONTEXT_UC_REGS(uc) uc->uc_regs
+#endif
+
static void *
uc_addr (ucontext_t *uc, int reg)
{
void *addr;
+#ifdef __GLIBC__
+ mcontext_t *mc = uc->uc_mcontext.uc_regs;
+#else
+ mcontext_t *mc = &uc->uc_mcontext;
+#endif
@@ -49,7 +56,7 @@ uc_addr (ucontext_t *uc, int reg)
if ((unsigned) (reg - UNW_PPC32_R0) < 32)
#if defined(__linux__)
- addr = &uc->uc_mcontext.uc_regs->gregs[reg - UNW_PPC32_R0];
+ addr = &mc->gregs[reg - UNW_PPC32_R0];
+ addr = &_UCONTEXT_UC_REGS(uc)->gregs[reg - UNW_PPC32_R0];
#elif defined(__FreeBSD__)
addr = &uc->uc_mcontext.mc_gpr[reg - UNW_PPC32_R0];
#endif
@@ -58,7 +63,7 @@ uc_addr (ucontext_t *uc, int reg)
@@ -58,7 +65,7 @@ uc_addr (ucontext_t *uc, int reg)
if ( ((unsigned) (reg - UNW_PPC32_F0) < 32) &&
((unsigned) (reg - UNW_PPC32_F0) >= 0) )
#if defined(__linux__)
- addr = &uc->uc_mcontext.uc_regs->fpregs.fpregs[reg - UNW_PPC32_F0];
+ addr = &mc->fpregs.fpregs[reg - UNW_PPC32_F0];
+ addr = &_UCONTEXT_UC_REGS(uc)->fpregs.fpregs[reg - UNW_PPC32_F0];
#elif defined(__FreeBSD__)
addr = &uc->uc_mcontext.mc_fpreg[reg - UNW_PPC32_F0];
#endif
@@ -85,7 +90,7 @@ uc_addr (ucontext_t *uc, int reg)
@@ -85,7 +92,7 @@ uc_addr (ucontext_t *uc, int reg)
return NULL;
}
#if defined(__linux__)
- addr = &uc->uc_mcontext.uc_regs->gregs[gregs_idx];
+ addr = &mc->gregs[gregs_idx];
+ addr = &_UCONTEXT_UC_REGS(uc)->gregs[gregs_idx];
#elif defined(__FreeBSD__)
addr = &uc->uc_mcontext.mc_gpr[gregs_idx];
#endif
@@ -249,8 +82,8 @@
#define _UC_MCONTEXT_GPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[x] - (void *)&dmy_ctxt) )
#define _UC_MCONTEXT_FPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[x] - (void *)&dmy_ctxt) )
+#else
+#define _UC_MCONTEXT_GPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.gregs[x] - (void *)&dmy_ctxt) )
+#define _UC_MCONTEXT_FPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.fpregs.fpregs[x] - (void *)&dmy_ctxt) )
+#define _UC_MCONTEXT_GPR(x) ( ((void *)&dmy_ctxt.uc_regs->gregs[x] - (void *)&dmy_ctxt) )
+#define _UC_MCONTEXT_FPR(x) ( ((void *)&dmy_ctxt.uc_regs->fpregs.fpregs[x] - (void *)&dmy_ctxt) )
+#endif
/* These are dummy structures used only for obtaining the offsets of the
@@ -1,12 +1,20 @@
From 05afdabf38d3fa461b7a9de80c64a6513a564d81 Mon Sep 17 00:00:00 2001
From: Jingyun Hua <huajingyun@loongson.cn>
Date: Mon, 8 Apr 2024 15:57:15 +0800
Subject: [PATCH] Remove the useless endina.h in getcontext.S for loongarch64
Fix issue #740
---
src/loongarch64/getcontext.S | 1 -
1 file changed, 1 deletion(-)
--- a/src/loongarch64/getcontext.S
+++ b/src/loongarch64/getcontext.S
@@ -25,7 +25,9 @@ OF CONTRACT, TORT OR OTHERWISE, ARISING
@@ -25,7 +25,6 @@ OF CONTRACT, TORT OR OTHERWISE, ARISING
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
#include "offsets.h"
+#ifdef __GLIBC__
#include <endian.h>
+#endif
-#include <endian.h>
.text
#define SREG(X) st.d $r##X, $r4, (LINUX_UC_MCONTEXT_GREGS + 8 * X)