mirror of
https://github.com/openwrt/openwrt.git
synced 2026-06-17 14:50:15 +04:00
realtek: rtl930x: mcx3: specify RTL8224 reset GPIO
The nRESET pins of the RTL8224 PHY on the MCX3 are wired to GPIO6 of the SoC, but this was never described in the devicetree. Commitc99a30668d("realtek: add RTL8224 initialization to Realtek driver") introduced support for reinitializing RTL8224 PHYs, and commit084da38a2e("realtek: mdio: activate multiple busses") allowed the MDIO bus provider load the devicetree properties to the bus, including reset descriptors. With both in place, a bus level PHY reset via the hardware pin is now correctly triggered before reinitialization. Add the missing reset-gpios property so the PHY can be reset via the hardware pin. Signed-off-by: Sven Eckelmann <sven@narfation.org> Link: https://github.com/openwrt/openwrt/pull/22966 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
committed by
Robert Marko
parent
54cb211d50
commit
fcb2ff6ec6
@@ -151,6 +151,10 @@
|
||||
};
|
||||
|
||||
&mdio_bus0 {
|
||||
reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <100000>;
|
||||
reset-deassert-us = <100000>;
|
||||
|
||||
PHY_C45(0, 0)
|
||||
PHY_C45(1, 1)
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user