On 25.12.0 the device has not enough free blocks to initialize overlay.
Move the device to tiny target and consume backup with storage
partitions, which were previously unused. This operation will reclaim
~800 KiB of flash memory. OEM used storage partition for configuration,
while backup was used to store copy of U-Boot environment and copy of
calibration data.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Partially revert 5e3a602def. Unfortunately the ethaddr value in U-Boot
environment is enclosed in double quotes which makes it longer than
ETH_ALEN, thus nvmem returns EINVAL. Switch back to handling the MAC
addresses in user space.
Fixes: 5e3a602def ("ath79: sitecom,wlrx100: use nvmem")
Reviewed-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
It's also a bit funny matching against phy0 and phy1 when both differ
between ath9k and ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
Normally WMAC handles 2.4ghz on ath79 devices. Some older units though
handle 5ghz on WMAC and 2.4ghz on pcie. This can be seen by the
frequemcy limits placed on each interface.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
It's also a bit funny matching against phy0 and phy1 when both differ
between ath9k and ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
It's also a bit funny matching against phy0 and phy1 when both differ
between ath9k and ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x and RTL931x program the same physical SerDes IP mode field
(page 0x1f reg 0x09, bits 11:7 hold the 5-bit mode value, bit 6 is
the "force mode" enable), but did so via two unrelated code paths:
RTL930x kept the force bit separate from the value in a __set helper,
while RTL931x had it baked into each switch-case constant.
Add a shared rtpcs_93xx_sds_set_ip_mode() that takes the rtpcs_sds_mode
enum, looks up the 5-bit value from the existing sds_hw_mode_vals
table, and writes value | force-bit in one place.
Convert both variants:
- RTL930x: drop __rtpcs_930x_sds_set_ip_mode and the manual table
lookup; __rtpcs_930x_sds_get_ip_mode is replaced by the shared
rtpcs_93xx_sds_get_ip_mode, which reverse-looks the raw register
value up in sds_hw_mode_vals[] and returns the matching enum
rtpcs_sds_mode (or -ENOENT for an unmapped raw value). The
wrapper that orchestrates power, CMU, state machine and rx-reset
around the mode write is renamed to rtpcs_930x_sds_apply_ip_mode
for clarity.
- RTL931x: drop the per-mode switch and the leftover pr_info debug
print; rename the symerr-clear + MAC-OFF + IP-mode-write wrapper
to rtpcs_931x_sds_apply_ip_mode.
rtpcs_930x_sds_reconfigure_to_pll() now goes through the new shared
get/set helpers: it saves the current IP mode as an enum on entry
and restores it via the enum-taking setter after the PLL reconfigure.
This changes behavior by mapping the raw mode setting through the
hardware mode table, effectively blocking unknown modes which might be
set by bootloader or somewhere else. This is intended and might uncover
unknown behavior instead of hiding it.
As a side-effect, QSGMII is now properly set too for RTL931x. Most code
paths anyway already had support for this mode, but it was missing from
the mode setting.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23213
Signed-off-by: Robert Marko <robimarko@gmail.com>
Device/zyxel_zynos sets COMPILE := loader-$(1).bin to drive the
standalone rt-loader build, but include/image.mk's Device/Init does
not reset COMPILE between TARGET_DEVICES iterations. When a non-zynos
device follows a zynos device, the stale COMPILE entry survives and
Device/Build/compile registers a second recipe for the previous
device's loader-*.bin target. Make warns about the override and the
second (wrong) recipe wins.
Reset COMPILE in Device/Default so each device starts with a clean
slate.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23226
Signed-off-by: Robert Marko <robimarko@gmail.com>
FLASH_ADDR is referenced inside Build/rt-loader-standalone but is not
listed in DEVICE_VARS, so include/image.mk's Device/Export does not
emit a per-target FLASH_ADDR := <value> assignment for the standalone
loader recipe. At recipe expansion time $(FLASH_ADDR) therefore
resolves to whatever value the last device in TARGET_DEVICES set
globally, which is not necessarily the value belonging to the loader
being built.
This currently happens to produce correct binaries only because every
device that sets FLASH_ADDR within a given subtarget shares the same
value, so the leaked global matches by coincidence.
Add FLASH_ADDR to DEVICE_VARS so each loader recipe captures its own
device's address.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23226
Signed-off-by: Robert Marko <robimarko@gmail.com>
Between 6.12 and 6.18, a 'blank' led_status_power has been added into
jh7110-common.dtsi. Update the patches responsible for adding the LED
aliases and add functionality for this LED entry.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
The mdio driver has found a simple way to handle phy addresses
for all devices with upstream kernel defaults. Remove all unneeded
hacks from the corresponding patch and reword it.
While we are here increase DSA_MAX_PORTS to 56 to match RTL931x.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23186
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL839x actually has two mdio busses.
- mdio bus 0 serves ports 0..23
- mdio bus 1 serves ports 24..51
This is baked into hardware and cannot be changed during mdio driver
setup with any register write. With the recent changes the driver
handles ports, phys and busses in a more logical way. So a port X
is assigned to a bus Y and a phy Z (on that bus). This gives a
mapping like
- port 16 <=> bus 0, address 16
- port 32 <=> bus 1, address 8
This unique assignment is used in the mdio driver as follows:
- Request to read bus 1, address 8
- Lookup corresponding port = 32
- Read from port 32
Looking at RTL839x it becomes clear that bus/phy => port lookup can
be achieved in multiple different ways. The simple reason is, that
for this device the driver cannot setup the smi topology. It is
baked into the hardware. So adding a "virtual" second bus does not
change the hardware access but allows to keep phy addresses below 32.
Making an example
mdio_bus0 {
PHY_C22(40, 40)
}
resolves to port 40. But the same can be achieved with
mdio_bus1 {
PHY_C22(40, 16)
}
In the first case the kernel sees bus/phy = 0/40 and in the second
case it sees bus/phy = 1/16. Both result in the access to the same
phy device on hardware port 40.
Use this analogy for RTL839x devices to match the real hardware
topology. For this change the existing dts and
- activate mdio bus 1 in rtl839x.dtsi
- rearrange devices with ports 24..51 to make use of bus 1
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23186
Signed-off-by: Robert Marko <robimarko@gmail.com>
The simpleImage contains a payload already compressed with lzma-based
xz (by default), so further compressing it with lzma will often make
the result larger. On the contrary, compressing these simpleImages
with gzip can make the result smaller, so replace lzma with
libdeflate-gzip to compress kernel for ws-ap3715i.
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/23121
Signed-off-by: Robert Marko <robimarko@gmail.com>
find_mtd_part() outputs /dev/mtdblockX, to which fw_setenv cannot
write, "/dev/mtd$(find_mtd_index '<vol name>')" could be used instead.
The envsize should also be changed to 0x1000 to make the CRC checksum
valid and the env block recognized by the uboot-envtools, but the
flash sector size remains 0x10000, otherwise the env block will be
readable but not writable.
The "read-only" mark within device tree is also removed.
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/23121
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add the basic bits to allow 100base-FX SFP mode on the RTL8214FC.
While this looks good fom ethtool perspective, it does not really
change the phy registers to enforce the mode. The SFP is still
driven in 1000base-X.
While it might seem useless at the moment this at least opens
up a new phy control method. This comes handy with one known bug.
In rare cases a SFP that is plugged in during boot does not get
a link. One option to revive the dead port seems to be
root@OpenWrt:~# ethtool -s lan28 speed 100 duplex full autoneg off
rtl83xx-switch 1b000000.switchcore:ethernet-switch lan28: Link is Up - 100Mbps/Full - flow control off
switch: port 28(lan28) entered blocking state
switch: port 28(lan28) entered forwarding state
rtl83xx_fib_event: FIB_RULE ADD/DEL for IPv6 not supported
rtl83xx_fib_event: FIB_RULE ADD/DEL for IPv6 not supported
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23087
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL839x allows to add an extended page operator during phy
access. This is not needed for the standard linux kernel C22
access. Give the hardcoded 0x1ff value a meaningful define.
Although it is not needed, add the corresponding register define.
This makes clear where the mask belongs to.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
The rtmdio_931x_setup_ctrl() function currently initializes the c22/c45
and the proprietary format bit of the controller. This works because of
the order these calls are arranged. Narrow down the update to the really
needed bits.
- c22/c45 (bit 1) is updated here
- standard/proprietary (bit 0) is updated in rtmdio_931x_setup_polling()
Adapt the confusing comment "Std. C45, non-standard is 0x3" it basically
explains the other function.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Tomasz Maciej Nowak
Rosen Penev
Michael Pfeifroth
Markus Stockhausen
Mieczyslaw Nalewaj
Andre Heider
Jonas Jelonek
Christoph Krapp
Robert Marko
Zoltan HERPAI
Edward Chow