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openwrt/target/linux
Jonas Jelonek 27d97aa507 realtek: pcs: rtl930x: limit clock-ready polling to 10G SerDes
The clock-ready debug readback is used by the SDK's 10G SerDes setup
sequence. Restrict polling to 10G-type SerDes while retaining the
existing exclusion for OFF mode.

This avoids applying the check to the 5G QSGMII SerDes 0 and 1, which can
report clock synchronization failures despite working links.

Assisted-By: ChatGPT (OpenAI GPT-6.1 Sol)
Link: https://github.com/openwrt/openwrt/pull/25882
Signed-off-by: Jonas Jelonek <jonas@jonasjelonek.de>
2026-10-19 09:35:04 +02:00
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