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Gleb Pesin
d0f9d2143c
Add a DSA driver for the seven-port switch integrated in MT7620. Keep the existing swconfig path for device trees without a DSA ports node. Use RXD4 source-port and TXD4 forced-port metadata with the Ralink DSA tagger. The programming guide places TXD4 FP_BMAP at bits 27:20; use that layout instead of the stale unused bits 26:19 definition. Implement bridge isolation and STP, VLAN filtering, FDB and MDB offload, ageing, flood controls, phylink, MTU limits, and software-extended hardware MIB counters. Poll the 1000BASE-T CPU port counters every 20 ms and the remaining ports every 200 ms to leave scheduling margin before their 16-bit packet counters wrap at minimum-sized line-rate traffic. DSA invokes port_stp_state_set() before updating its cached state, so pass the pending callback state as an override when recalculating port matrices instead of leaving hardware one transition behind. Correct the shared switch MIB enable register and enable all seven port counters. The old address was inside port 0 counter space, so this also fixes legacy swconfig initialization. Register DSA through a bound child of the frame-engine device. This gives the managed conduit device link the correct lifetime across driver unbind and reprobe while the switch registers remain owned by the existing GSW platform device. Package the driver and tagger as kmod-dsa-mt7620 for per-device opt-in. This keeps DSA and switchdev out of swconfig-only MT7620 images and prevents installing the DSA package together with swconfig. Also make MDIO and frame-engine teardown safe for deferred probes and runtime reprobes. Replace the legacy MDIO busy loop and -1 return with readl_poll_timeout_atomic() and its real error, and reset a still-busy frame engine before freeing DMA rings. Resolve FE and ESW resets by name so recovery can reset FE alone, and warn if a switch node provides neither named reset. The netdev is devm-managed, so leave NAPI deletion to free_netdev after unregister instead of deleting NAPI from fe_remove while the netdev is still registered. Tested on an MT7620N rev 2 eco 6 with 100BASE-T traffic, VLAN-aware hardware bridging, 2026-byte MTU, FDB/MDB offload, pending STP state, and driver unbind/rebind. The modular driver, tagger, package contents, DSA image composition, and swconfig-only kernel configuration were also verified. An independent TP-Link Archer C5 v4 test exercised an external RTL8367S DSA switch using the RTL8_4t tagger as a regression check on the shared dsa_tag_protocol enum. It found no collision or external-switch regression; it does not validate the MT7620 integrated-switch path. Signed-off-by: Gleb Pesin <dormancygrace@gmail.com> Link: https://github.com/openwrt/openwrt/pull/24493 Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>