realtek: soc: add m_bit and hit_bit properties

The RTL9607C has access method bit field that is used as a look-up
method for read queries of L2 tables and hit bit for whether or not
the table query found an entry. It is exactly the same as how L2
tables are interfaced on RTL8365MB switch as per rtl8365mb_table in
its DSA driver.

For now only the otto_table sruct is changed for description purposes
without adding the functionality.

Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/25136
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
This commit is contained in:
Rustam Adilov authored and Markus Stockhausen committed 2026-09-22 17:39:24 +02:00
1 parent a74fa4bf4d
commit 070ed83c88
1 file changed
+27 -24
@@ -33,42 +33,44 @@ struct otto_table {
u8 addr_msb;
s8 rd_e_bit;
s8 wr_e_bit;
s8 m_bit;
s8 hit_bit;
struct mutex lock;
};
/* One row per table access register: name, command register, status register,
* write data window, read data window, how many data registers the window holds,
* the busy status bit, the read/write bit, the shift the table type sits at,
* whether the read/write bit is inverted, LSB and MSB of the address bit field
* and read / write execute bits.
* whether the read/write bit is inverted, LSB and MSB of the address bit field,
* read / write execute bits, access method bit and hit status bit.
* The enum, the descriptors and the per-register width limit are all generated
* from here, so an entry cannot be described in one place and not in the others.
*/
#define OTTO_REG_LIST(_) \
_(OTTO_REG_8380_L2, 0x6900, 0x6900, 0x6908, 0x6908, 3, -1, 15, 13, 1, 0, 12, 16, 16) \
_(OTTO_REG_8380_0, 0x6914, 0x6914, 0x6918, 0x6918, 18, -1, 14, 12, 1, 0, 11, 15, 15) \
_(OTTO_REG_8380_1, 0xA4C8, 0xA4C8, 0xA4CC, 0xA4CC, 6, -1, 14, 12, 1, 0, 11, 15, 15) \
_(OTTO_REG_8390_L2, 0x1180, 0x1180, 0x1184, 0x1184, 3, -1, 16, 14, 0, 0, 13, 17, 17) \
_(OTTO_REG_8390_0, 0x1190, 0x1190, 0x1194, 0x1194, 17, -1, 15, 12, 0, 0, 11, 16, 16) \
_(OTTO_REG_8390_1, 0x6B80, 0x6B80, 0x6B84, 0x6B84, 4, -1, 14, 12, 0, 0, 11, 15, 15) \
_(OTTO_REG_8390_2, 0x611C, 0x611C, 0x6120, 0x6120, 9, -1, 8, 6, 0, 0, 5, 9, 9) \
_(OTTO_REG_9300_L2, 0xB320, 0xB320, 0xB334, 0xB334, 3, -1, 18, 16, 0, 0, 13, 19, 19) \
_(OTTO_REG_9300_0, 0xB340, 0xB340, 0xB344, 0xB344, 19, -1, 16, 12, 0, 0, 11, 17, 17) \
_(OTTO_REG_9300_1, 0xB3A0, 0xB3A0, 0xB3A4, 0xB3A4, 20, -1, 16, 13, 0, 0, 12, 17, 17) \
_(OTTO_REG_9300_2, 0xCE04, 0xCE04, 0xCE08, 0xCE08, 6, -1, 14, 12, 0, 0, 11, 15, 15) \
_(OTTO_REG_9300_HSB, 0xD600, 0xD600, 0xD604, 0xD604, 30, -1, 7, 6, 0, 0, 5, 8, 8) \
_(OTTO_REG_9300_HSA, 0x7880, 0x7880, 0x7884, 0x7884, 22, -1, 9, 8, 0, 0, 7, 10, 10) \
_(OTTO_REG_9310_0, 0x8500, 0x8500, 0x8508, 0x8508, 8, -1, 19, 15, 0, 0, 14, 20, 20) \
_(OTTO_REG_9310_1, 0x40C0, 0x40C0, 0x40C4, 0x40C4, 22, -1, 16, 14, 0, 0, 13, 17, 17) \
_(OTTO_REG_9310_2, 0x8528, 0x8528, 0x852C, 0x852C, 6, -1, 18, 14, 0, 0, 13, 19, 19) \
_(OTTO_REG_9310_3, 0x0200, 0x0200, 0x0204, 0x0204, 9, -1, 15, 12, 0, 0, 11, 16, 16) \
_(OTTO_REG_9310_4, 0x20dc, 0x20dc, 0x20e0, 0x20e0, 29, -1, 7, 6, 0, 0, 5, 8, 8) \
_(OTTO_REG_9310_5, 0x7e1c, 0x7e1c, 0x7e20, 0x7e20, 53, -1, 8, 6, 0, 0, 5, 9, 9) \
_(OTTO_REG_8380_L2, 0x6900, 0x6900, 0x6908, 0x6908, 3, -1, 15, 13, 1, 0, 12, 16, 16, -1, -1) \
_(OTTO_REG_8380_0, 0x6914, 0x6914, 0x6918, 0x6918, 18, -1, 14, 12, 1, 0, 11, 15, 15, -1, -1) \
_(OTTO_REG_8380_1, 0xA4C8, 0xA4C8, 0xA4CC, 0xA4CC, 6, -1, 14, 12, 1, 0, 11, 15, 15, -1, -1) \
_(OTTO_REG_8390_L2, 0x1180, 0x1180, 0x1184, 0x1184, 3, -1, 16, 14, 0, 0, 13, 17, 17, -1, -1) \
_(OTTO_REG_8390_0, 0x1190, 0x1190, 0x1194, 0x1194, 17, -1, 15, 12, 0, 0, 11, 16, 16, -1, -1) \
_(OTTO_REG_8390_1, 0x6B80, 0x6B80, 0x6B84, 0x6B84, 4, -1, 14, 12, 0, 0, 11, 15, 15, -1, -1) \
_(OTTO_REG_8390_2, 0x611C, 0x611C, 0x6120, 0x6120, 9, -1, 8, 6, 0, 0, 5, 9, 9, -1, -1) \
_(OTTO_REG_9300_L2, 0xB320, 0xB320, 0xB334, 0xB334, 3, -1, 18, 16, 0, 0, 13, 19, 19, -1, -1) \
_(OTTO_REG_9300_0, 0xB340, 0xB340, 0xB344, 0xB344, 19, -1, 16, 12, 0, 0, 11, 17, 17, -1, -1) \
_(OTTO_REG_9300_1, 0xB3A0, 0xB3A0, 0xB3A4, 0xB3A4, 20, -1, 16, 13, 0, 0, 12, 17, 17, -1, -1) \
_(OTTO_REG_9300_2, 0xCE04, 0xCE04, 0xCE08, 0xCE08, 6, -1, 14, 12, 0, 0, 11, 15, 15, -1, -1) \
_(OTTO_REG_9300_HSB, 0xD600, 0xD600, 0xD604, 0xD604, 30, -1, 7, 6, 0, 0, 5, 8, 8, -1, -1) \
_(OTTO_REG_9300_HSA, 0x7880, 0x7880, 0x7884, 0x7884, 22, -1, 9, 8, 0, 0, 7, 10, 10, -1, -1) \
_(OTTO_REG_9310_0, 0x8500, 0x8500, 0x8508, 0x8508, 8, -1, 19, 15, 0, 0, 14, 20, 20, -1, -1) \
_(OTTO_REG_9310_1, 0x40C0, 0x40C0, 0x40C4, 0x40C4, 22, -1, 16, 14, 0, 0, 13, 17, 17, -1, -1) \
_(OTTO_REG_9310_2, 0x8528, 0x8528, 0x852C, 0x852C, 6, -1, 18, 14, 0, 0, 13, 19, 19, -1, -1) \
_(OTTO_REG_9310_3, 0x0200, 0x0200, 0x0204, 0x0204, 9, -1, 15, 12, 0, 0, 11, 16, 16, -1, -1) \
_(OTTO_REG_9310_4, 0x20dc, 0x20dc, 0x20e0, 0x20e0, 29, -1, 7, 6, 0, 0, 5, 8, 8, -1, -1) \
_(OTTO_REG_9310_5, 0x7e1c, 0x7e1c, 0x7e20, 0x7e20, 53, -1, 8, 6, 0, 0, 5, 9, 9, -1, -1) \
#define OTTO_REG_ENUM(name, ctrl_addr, sts_addr, wr_data, rd_data, max, \
busy_bit, cbit, tbit, rmode, addr_lsb, addr_msb, \
rd_e_bit, wr_e_bit) \
rd_e_bit, wr_e_bit, m_bit, hit_bit) \
name,
enum otto_table_reg {
@@ -78,7 +80,7 @@ enum otto_table_reg {
#define OTTO_REG_MAX(name, ctrl_addr, sts_addr, wr_data, rd_data, max, \
busy_bit, cbit, tbit, rmode, addr_lsb, addr_msb, \
rd_e_bit, wr_e_bit) \
rd_e_bit, wr_e_bit, m_bit, hit_bit) \
name##_MAX_DATA = max,
enum otto_table_reg_max {
@@ -87,7 +89,7 @@ enum otto_table_reg_max {
#define OTTO_REG_DESC(name, ctrl_addr_, sts_addr_, wr_data_, rd_data_, \
max_, busy_bit_, cbit_, tbit_, rmode_, addr_lsb_, \
addr_msb_, rd_e_bit_, wr_e_bit_) \
addr_msb_, rd_e_bit_, wr_e_bit_, m_bit_, hit_bit_)\
[name] = { \
.ctrl_addr = ctrl_addr_, .sts_addr = sts_addr_, \
.wr_data = wr_data_, .rd_data = rd_data_, \
@@ -95,6 +97,7 @@ enum otto_table_reg_max {
.rmode = rmode_, \
.addr_lsb = addr_lsb_, .addr_msb = addr_msb_, \
.rd_e_bit = rd_e_bit_, .wr_e_bit = wr_e_bit_, \
.m_bit = m_bit_, .hit_bit = hit_bit_, \
},
static struct otto_table otto_regs[OTTO_REG_END] = {