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qualcommax: ipq50xx: add support for CMCC RAX3000Q/QY
Add support for the CMCC RAX3000Q/QY platform based on Qualcomm IPQ5000.
Both hardware variants are identical and share the same device tree.
Hardware Specifications:
- SoC: Qualcomm IPQ5000
- RAM: 256 MiB, integrated in SoC
- Flash: GigaDevice GD5F1GQ5REYIG (Dosilicon variant is not supported)
- 2.4 GHz Wi-Fi: SoC integrated, with 2 FEMs
- 5 GHz Wi-Fi: QCN6102, with 2 FEMs
- Switch: QCA8337, 1 WAN + 3 LAN
- LEDs: 3 RGB LEDs
- Keys: reset and mesh pairing
- UART: 3-pin, 115200n8
The vendor flash layout is documented and the ART partition contains
calibration data, which must be preserved carefully.
Due to the limited 256 MiB RAM, ath11k is disabled in the DTS to avoid
OOM issues on this device.
The MAC address location in flash could not be identified reliably.
As a temporary workaround, the MAC addresses (WAN LAN 2.4G 5G WiFi) are derived from the ART
partition start, with vendor/default values being invalid and falling
back to random generation if left unchanged (FF).
Flash Guide
Requirements
- UART access (3-pin, 115200n8)
- Ethernet cable
- TFTP server running on your computer
- OpenWrt `.ubi` firmware image
Step 0: Backup all partitions (strongly recommended)
Step 1: Connect UART and interrupt U-Boot
Step 2: Configure PC network
Step 3: Start TFTP server
Step 4: Load firmware via U-Boot
tftpboot 192.168.10.19:<your_firmware>.ubi
Step 5: Flash firmware
flash rootfs
Step 6: Reboot device
reset
Signed-off-by: Mark Jia <mark304188@hotmail.com>
This commit is contained in:
Mark Jia authored and 
Robert Marko committed
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@@ -10,6 +10,7 @@ board=$(board_name)
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case "$board" in
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cmcc,mr3000d-ci|\
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cmcc,pz-l8|\
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cmcc,rax3000q|\
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elecom,wrc-x3000gs2|\
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elecom,wrc-x3000gst2|\
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iodata,wn-dax3000gr|\
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@@ -0,0 +1,356 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ipq5018.dtsi"
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#include "ipq5018-ess.dtsi"
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#include "ipq5018-qcn6122.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "CMCC RAX3000Q";
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compatible = "cmcc,rax3000q", "qcom,ipq5018";
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aliases {
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label-mac-device = <&gmac1>;
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led-boot = &led_status_red;
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led-failsafe = &led_status_blue;
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led-running = &led_status_green;
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led-upgrade = &led_status_blue;
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serial0 = &blsp1_uart1;
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};
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chosen {
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bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M";
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stdout-path = "serial0:115200n8";
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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reset-button {
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label = "reset";
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gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps-button {
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label = "wps";
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gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&led_pins>;
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pinctrl-names = "default";
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led_status_red: led-0 {
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gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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default-state = "off";
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};
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led_status_green: led-1 {
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gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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default-state = "off";
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};
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led_status_blue: led-2 {
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gpios = <&tlmm 17 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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default-state = "off";
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};
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};
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};
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&sleep_clk {
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clock-frequency = <32000>;
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};
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&xo_board_clk {
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clock-div = <4>;
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clock-mult = <1>;
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};
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&blsp1_uart1 {
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status = "okay";
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pinctrl-0 = <&serial_0_pins>;
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pinctrl-names = "default";
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};
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&prng {
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status = "okay";
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};
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&qfprom {
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status = "okay";
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};
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&qpic_bam {
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status = "okay";
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};
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&qpic_nand {
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pinctrl-0 = <&qpic_pins>;
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pinctrl-names = "default";
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status = "okay";
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//GigaDevice GD5F1GQ5REYIG
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nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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nand-ecc-engine = <&qpic_nand>;
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nand-ecc-step-size = <512>;
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nand-ecc-strength = <8>;
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nand-bus-width = <8>;
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partitions {
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compatible = "qcom,smem-part";
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partition-art {
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label = "0:art";
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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// WAN MAC address
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macaddr_art_0: mac-address@0 {
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compatible = "mac-base";
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reg = <0x0 0x6>;
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#nvmem-cell-cells = <1>;
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};
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// LAN MAC address
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macaddr_art_6: mac-address@6 {
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compatible = "mac-base";
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reg = <0x6 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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};
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};
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};
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&uniphy0 {
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status = "okay";
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assigned-clocks = <&uniphy0 UNIPHY_CLK_REF>;
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assigned-clock-rates = <UNIPHY_REFCLK_25MHZ>;
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};
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// MAC1 -> SGMII
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&gmac1 {
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status = "okay";
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phy-mode = "sgmii";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_art_6 (0)>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&mdio0 {
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status = "okay";
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};
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&mdio1 {
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status = "okay";
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pinctrl-0 = <&mdio1_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
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// QCA8337 Phy0 -> WAN
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qca8337_0: ethernet-phy@0 {
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reg = <0>;
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};
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// QCA8337 Phy1 -> LAN1
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qca8337_1: ethernet-phy@1 {
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reg = <1>;
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};
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// QCA8337 Phy3 -> LAN2
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qca8337_3: ethernet-phy@3 {
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reg = <3>;
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};
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// QCA8337 Phy4 -> LAN3
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qca8337_4: ethernet-phy@4 {
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reg = <4>;
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};
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// QCA8337 switch
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switch1: ethernet-switch@11 {
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compatible = "qca,qca8337";
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reg = <0x11>;
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-port@0 {
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reg = <0>;
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phy-mode = "sgmii";
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ethernet = <&gmac1>;
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qca,sgmii-enable-pll;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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ethernet-port@1 {
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reg = <1>;
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label = "wan";
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phy-handle = <&qca8337_0>;
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nvmem-cells = <&macaddr_art_0 (0)>;
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nvmem-cell-names = "mac-address";
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};
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ethernet-port@2 {
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reg = <2>;
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label = "lan1";
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phy-handle = <&qca8337_1>;
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};
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ethernet-port@4 {
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reg = <4>;
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label = "lan2";
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phy-handle = <&qca8337_3>;
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};
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ethernet-port@5 {
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reg = <5>;
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label = "lan3";
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phy-handle = <&qca8337_4>;
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};
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};
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};
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};
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&tlmm {
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button_pins: button-state {
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pins = "gpio23", "gpio38";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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led_pins: led-state {
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pins = "gpio24", "gpio19", "gpio17";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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mdio1_pins: mdio-state {
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mdc-pins {
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pins = "gpio36";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio-pins {
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pins = "gpio37";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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qpic_pins: qpic-state {
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clock-pins {
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pins = "gpio9";
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function = "qspi_clk";
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drive-strength = <8>;
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bias-disable;
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};
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cs-pins {
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pins = "gpio8";
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function = "qspi_cs";
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drive-strength = <8>;
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bias-disable;
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};
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data-pins {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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function = "qspi_data";
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drive-strength = <8>;
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bias-disable;
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};
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};
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serial_0_pins: uart0-state {
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pins = "gpio28", "gpio29";
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function = "blsp0_uart1";
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drive-strength = <8>;
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bias-disable;
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};
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};
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//256M RAM is too small for ath11k, so WiFi is disabled to prevent OOM.
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&q6v5_wcss {
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status = "disabled";
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/* The QCN6102 radio should map to UPD ID 2. Without */
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/* bootargs, the firmware will expect it to be on UPD ID 3 */
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boot-args = </* type: */ 0x2 /* PCIE1 */
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/* length: */ 4
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/* PD id: */ 2
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/* reset GPIO: */ 27
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/* reserved: */ 0 0>;
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};
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&wifi {
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// IPQ5018
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status = "disabled";
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qcom,rproc = <&q6_wcss_pd1>;
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qcom,ath11k-calibration-variant = "CMCC-RAX3000Q";
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qcom,ath11k-fw-memory-mode = <1>;
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qcom,bdf-addr = <0x4c400000>;
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};
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&wifi1 {
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// QCN6102 5G
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status = "disabled";
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qcom,rproc = <&q6_wcss_pd2>;
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qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
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qcom,ath11k-calibration-variant = "CMCC-RAX3000Q";
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qcom,ath11k-fw-memory-mode = <1>;
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qcom,bdf-addr = <0x4d100000>;
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qcom,m3-dump-addr = <0x4df00000>;
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};
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@@ -49,6 +49,20 @@ define Device/cmcc_pz-l8
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endef
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TARGET_DEVICES += cmcc_pz-l8
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define Device/cmcc_rax3000q
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$(call Device/FitImage)
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$(call Device/UbiFit)
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DEVICE_VENDOR := CMCC
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DEVICE_MODEL := RAX3000Q
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DEVICE_DTS_CONFIG := config@mp02.1
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SOC := ipq5018
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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IMAGE_SIZE := 59392k
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NAND_SIZE := 128m
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endef
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TARGET_DEVICES += cmcc_rax3000q
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define Device/elecom_wrc-x3000gs2
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$(call Device/FitImageLzma)
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DEVICE_VENDOR := ELECOM
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@@ -10,6 +10,7 @@ board=$(board_name)
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case "$board" in
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cmcc,pz-l8|\
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cmcc,rax3000q|\
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elecom,wrc-x3000gs2|\
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elecom,wrc-x3000gst2|\
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iodata,wn-dax3000gr)
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@@ -19,6 +19,7 @@ ipq50xx_setup_interfaces()
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ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
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;;
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cmcc,mr3000d-ci|\
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cmcc,rax3000q|\
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linksys,mx2000|\
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linksys,mx5500|\
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linksys,spnmx56|\
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@@ -181,6 +181,7 @@ platform_do_upgrade() {
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case "$(board_name)" in
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cmcc,mr3000d-ci|\
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cmcc,pz-l8|\
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cmcc,rax3000q|\
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elecom,wrc-x3000gs2|\
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elecom,wrc-x3000gst2|\
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iodata,wn-dax3000gr)
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Reference in new issue
Block a user