This version fixes security issues and bugs.
Security fixes:
* Fix a side channel in RSA PKCS#1 v1.5 decryption. (CVE-2026-50587)
* Fix a bug where transcript-hash computation errors during TLS 1.2 extended master secret calculation could be ignored instead of causing the handshake to fail. (CVE-2026-50581)
* Fix a TLS 1.3 server-side error-handling bug affecting session ticket generation. (CVE-2026-50640)
* Fix renegotiation failing and potentially causing a buffer overflow in DTLS when badmac_limit is enabled. (CVE-2026-50713)
* Reject ChaCha20 operations that would make the 32-bit block counter wrap around, which could otherwise reuse keystream and compromise confidentiality. (CVE-2026-50584)
* Fixed a TLS 1.3 record-boundary validation issue that could allow unauthenticated plaintext data to be processed across a key change.
* Fix a possible buffer overflow in mbedtls_ecdh_calc_secret() (CVE-2026-35336)
* Fix a remote buffer overflow in (D)TLS with ECDHE-PSK cipher suites when CBC is disabled. (CVE-ID-50580)
* Fix a side channel in ECC computations that allows a powerful local attacker (typically, untrusted OS attacking a secure enclave) to fully recover long-term secret keys). (CVE-2026-54435)
* Fix a potential information disclosure in TLS 1.2 servers using session tickets. (CVE-2026-50586)
* Fix timing side channel in RSA key generation, prime generation and primality testing, on platforms where division is not constant-time.
* Fix a 1-byte buffer overread when parsing a malformed ECC public key in the PK module. (CVE-2026-50583)
* Fix an out-of-bounds read when parsing TLS 1.2 ECJPAKE ServerKeyExchange messages. (CVE-2026-50588)
* Fix a use-after-free/double-free risk in mbedtls_pkcs7_free() when reusing an mbedtls_pkcs7 context across parse -> free -> parse -> free cycles. (CVE-2026-50579)
* PKCS7 now rejects weak hash algorithms (RIPEMD160, MD5, SHA-1, SHA-224, SHA3-224) on signature verification.
* Improved documentation of mbedtls_ssl_conf_sig_algs() to emphasize that this function only sets signature algorithms that are enforced during TLS key exchange and not on certificate verification. (CVE-2026-54441)
* Ensure 'dtls_srtp_info' field from 'mbedtls_ssl_context' is properly zeroized when mbedtls_ssl_session_reset() is called. (CVE-2026-50585)
* Fix a bug where mbedtls_ssl_read() and mbedtls_ssl_write() could return 1 instead of an error code if the random generator failed when a server called these functions before the end of a TLS 1.3 handshake.
* Fix TLS 1.3 clients to reject a HelloRetryRequest whose selected group was not advertised in the original ClientHello. (CVE-2026-25832)
* Fix two bugs in the X.509 certificate parser that caused some inputs with a malformed basicConstraints extension to be accepted. (CVE-2026-49300)
Full release notes: https://github.com/Mbed-TLS/mbedtls/releases/tag/mbedtls-3.6.7
Remove backported upstream patches that are included in this release.
Signed-off-by: Magnus Kroken <mkroken@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Discovered that EnGenius EWS2910P v1 appears to require a Set Power
Management Mode command for the port control to function. Ensure
that the power management mode is set to dynamic power management
mode with priority. This should be safe for all gen1 and gen2 boards,
issue a warning if an error is detected.
Signed-off-by: Russell Senior <russell@personaltelco.net>
Link: https://github.com/openwrt/openwrt/pull/24550
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Add mtd_get_mac_uci_config() for reading a MAC address from a UCI-style
config stored in an MTD partition. This is needed to support the
TP-Link ER605 v1; the existing UBI helper already covers the ER605 v2.
Also refactor common sed logic into a shared helper used by both
variants and drop the redundant cat pipe.
TP-Link ER605 v2 device support is unaffected. The one and only MAC
address on the tddp partition for v1/v2 is the label MAC address.
Signed-off-by: Charles Joynson <ctjoynson@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24331
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
This MCU is present on most Hasivo devices and controls basic things
such as watchdog, sensor, and RTC if available.
On devices with PoE PSE support, it also controls the PSE chip and LEDs.
One funny detail is that while the watchdog is present on most Hasivo devices
and (unless armed) resets the whole device, here it only resets the PoE LEDs.
The PoE LEDs reset and blink twice every 75s, even if PoE is unmanaged or off.
Signed-off-by: Lars Gierth <larsg@systemli.org>
Link: https://github.com/openwrt/openwrt/pull/24643
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Now that there's the potential for PoE support on this device,
we make the PoE variant its own device, so that later commits can add
the respective device tree items.
While at it, be explicit about the real SoC in the root compatible.
Signed-off-by: Lars Gierth <larsg@systemli.org>
Link: https://github.com/openwrt/openwrt/pull/24643
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
GPIO 9 is the reset input of the MT7995 radio module, active low.
The old description used it as a PERST line on pcie0 with active
high polarity, so the port reset toggled the module reset at the
wrong time and with the wrong polarity.
Describe it as wifi-reset-gpios on pcie3, the port wired to the
module reset. The PCIe controller then releases the module from
reset before link training, with a 100 ms delay.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
USB3 SuperSpeed signaling interferes with the 6 GHz radio. Disable
the SuperSpeed port on ssusb1 with mediatek,u3p-dis-msk; the port
then runs at USB2 speed.
Stop enabling ssusb0 and its xs-phy. Nothing connects to them on
these boards.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
The MAC address on the product label is the base MAC, mfginfo
cell 0. On this board gmac2 (wan) uses cell 0. The alias pointed
at gmac1 (lan), which uses cell 1, so the reported label MAC did
not match the label.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
The board has three LAN LEDs: white on GPIO 59, amber on GPIO 60
and green on GPIO 68. The old description listed two GPIO LEDs
with swapped colors and drove the green LED from the internal
2.5G PHY.
Describe all three as GPIO LEDs and set the netdev triggers to
match: white 2.5G, green 1G, amber 100M. Drop the PHY LED node
and the LED pinctrl state: the PHY LED pad (2p5gbe_led0, pin 68)
now works as the green LED GPIO, so the PHY drives no LED.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
The AQR113C PHYs run hot and sit away from the SoC sensor. Export
the PHY hwmon sensor as a thermal sensor and add a thermal zone per
AQR113C on all three boards. The zones drive the fan with trips at
108/104/100/90/80/40 C.
Set critical-action "reboot" so a runaway zone restarts the board
instead of an unclean thermal shutdown. Raise the trip hysteresis
from 2 C to 4 C to stop the fan from cycling near a trip point.
Stop passive polling; the zones use active cooling only.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Each board wires one reset line that resets the AQR113C PHYs as a
group: GPIO 71 on SDG-8733/SDG-8734 and GPIO 62 on SDG-8733A.
Describe that line as the MDIO bus reset with the same assert and
deassert times.
Drop the per-PHY reset-gpios. On SDG-8733 the second AQR113C
claimed GPIO 62, which is not connected on that board.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Replace mt7988a-smartrg-mt-stuart.dtsi with layered dtsi files.
The existing 3 boards assemble from shared building blocks instead
of include-then-delete:
* mt798x-smartrg-common.dtsi: thermal trip/cooling-map macros
* mt798x-smartrg-factory.dtsi: eMMC factory/mfginfo nvmem layout
* mt7988-smartrg-base.dtsi: PMIC, regulators, eMMC, ramoops,
console, watchdog, reset button
* mt7988-smartrg-sysled.dtsi: system LED controller and aliases
* mt7988-smartrg-mt-stuart-gsw.dtsi: built-in switch as lan2-4
with the per-port PHY LEDs
* mt7988-smartrg-wifi-pcie3.dtsi / -wifi-mt7995.dtsi: radio second
PCIe function and pcie0 radio wiring for SDG-8733A
* mt7988a-smartrg-mt-stuart-phase1.dtsi plus per-model pair dtsi
for SDG-8733 (AQR113C WAN) and SDG-8734 (SFP+ WAN)
No functional change is intended. Nodes for hardware that a board
does not have are no longer instantiated on that board: the
unstuffed WAN PHY on SDG-8734, unused pin groups per model, and
the PHY LED setup of the disabled switch on SDG-8733A.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Rename the system LED children to led@1..led@4. The nodes have a
reg property, so dtc wants unit addresses. The sysled driver names
the LEDs from the label property, which does not change.
Remove #address-cells and #size-cells from the eMMC card@0 node.
The node has no children with a reg property.
No functional change.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
No Mt. Stuart model has SLIC voice hardware or SPI NAND flash.
Remove the SLIC gpio-exports and the spi0/spi_nand nodes.
Remove phy-connection-type where phy-mode gives the same value.
Remove the pcie1 pinctrl properties. They are identical to the
SoC defaults in mt7988a.dtsi.
No functional change.
Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
While at it, move away from using dated builds to release tags.
Compile-tested: sifiveu/*, d1/*
Runtime-tested: sifiveu/unleashed, sifiveu/unmatched, d1/nezha
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
The NPU driver maps a missing firmware file to -EPROBE_DEFER, so that it
can be retried once the rootfs carrying /lib/firmware is mounted. That
mapping holds only while request_firmware() reports -ENOENT, and it does
not when the sysfs fallback is in play: the request goes to a userspace
helper, blocks for the full 60 second loading_timeout and comes back as
-ETIMEDOUT, which dev_err_probe() then turns into a hard failure. The
board boots a minute slower and ends up with no NPU at all, so no
hardware flow offloading either.
Our own config disables FW_LOADER_USER_HELPER for the target, but that
is not a dependable guard: LEDS_LP55XX_COMMON selects it, so any build
that pulls in kmod-leds-lp55xx-common - every image built with
ALL_KMODS, snapshots included - gets it back, and generic's
FW_LOADER_USER_HELPER_FALLBACK=y then arms the fallback.
Add a patch switching the driver to request_firmware_direct(), which
sets FW_OPT_NOFALLBACK_SYSFS and so reports -ENOENT whatever the
firmware loader is configured to do.
request_firmware_direct() also sets FW_OPT_NO_WARN, so the "Direct
firmware load for airoha/en7581_npu_rv32.bin failed with error -2"
line goes away together with the fallback. There is no variant that
skips the fallback but keeps the warning. While the probe is being
deferred that message was noise, but on a board where the firmware
package is genuinely missing it was the only hint naming the file.
Measured on a Nokia XG-040G-MD with FW_LOADER_USER_HELPER=y and
FW_LOADER_USER_HELPER_FALLBACK=y forced on, the two images differing
only by this patch:
without: 2.477 fallback -> 64.555 -ETIMEDOUT -> probe failed -110,
preinit at 69.6s, NPU unbound
with: no fallback and no warning at all, NPU fw version 1456.62
at 3.665s, preinit at 7.6s
Note the fallback is still compiled in and forced in both cases; the
patch does not disable it, it only keeps the driver from falling into
it.
The patch carries Fixes: 23290c7bc190 ("net: airoha: Introduce Airoha
NPU support") and Cc: stable@vger.kernel.org, so it can be dropped once
it lands upstream and reaches us through a stable update.
Link: https://lore.kernel.org/netdev/20260807024125.434055-1-sochnev.v.74@gmail.com/
Signed-off-by: Vitaliy Sochnev <sochnev.v.74@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24593
Signed-off-by: Robert Marko <robimarko@gmail.com>
an7581.dtsi reserves five no-map regions for the NPU and hands all of
them to the npu node. Four of them - pkt, tx-pkt, tx-bufid and ba,
110 MiB plus 26 KiB - are consumed only by
airoha_npu_wlan_init_memory(), which the mt76 NPU layer calls when it
attaches an Airoha-offloaded Wi-Fi chip. To run its firmware and to
offload flows the NPU needs the binary region alone, and the driver
looks that one up by index rather than by name.
Boards that bind no Wi-Fi chip to the NPU therefore lose 110 MiB of
DRAM for nothing, and they lose it whether or not the NPU probes at
all: the memory is carved out by the reserved-memory node itself. On
AN7581 that is both Nokia XG-040G-MD variants. an7583.dtsi already does
this correctly and reserves npu_binary only.
Move the four regions into a new an7581-npu-wlan.dtsi and include it
from the two NPU overlays the Wi-Fi boards already pull in, so that the
regions and the full memory-region list follow the Wi-Fi chip instead
of the SoC.
an7581-evb includes the new overlay directly instead. It declares two
mediatek,mt76 nodes with airoha,npu and enables the NPU, but pins no
particular chip because the card goes into a PCIe slot, so it is the
one board using the offload that pulls in neither NPU overlay.
Keep the ba region on all four Wi-Fi boards even though it is described
as MT7996-only. It is already optional in the driver, but narrowing it
down to MT7996 would change behaviour on Kite, so leave that for a
separate change.
Verified by building the device trees before and after: the DTBs of
an7581-evb, an7581-evb-emmc-eagle, an7581-evb-emmc-kite,
an7581-nokia-valyrian and an7581-w1700k-ubi are byte for byte
identical, while an7581-nokia_xg-040g-md and an7581-nokia_xg-040g-md-ubi
each shrink by 376 bytes and lose the four regions.
Tested on a Nokia XG-040G-MD. Reserved memory drops from 197296K to
84400K and MemTotal rises from 325900 kB to 438736 kB, 110 MiB given
back. The NPU still comes up on the binary region alone and reports
"NPU fw version: 1456.62", so dropping the four regions costs the board
neither the NPU nor its flow offloading. Not tested on Wi-Fi hardware,
where the argument rests on the DTBs being unchanged.
Signed-off-by: Vitaliy Sochnev <sochnev.v.74@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24593
Signed-off-by: Robert Marko <robimarko@gmail.com>
The uboot-airoha package now stages compressed U-Boot images using the
u-boot.lzma suffix. The AN7581 chainloader still looks for the previous
u-boot.bin.lzma filename and consequently falls back to a nonexistent
uncompressed image.
Use the staged u-boot.lzma filename when generating the chainloader FIT.
Fixes: 94a21b3fe9 ("uboot-airoha: move FIP generation to target and enable autoselection")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The AN7581 eMMC Eagle and Kite boards use the shared an7581_rfb
U-Boot build, which produces artifacts with the rfb suffix. The image
recipes instead look for nonexistent per-device rfb-emmc-eagle and
rfb-emmc-kite artifacts.
Use the shared rfb artifacts for both boards so their preloader and
BL31/U-Boot FIP artifacts can be generated.
Fixes: 94a21b3fe9 ("uboot-airoha: move FIP generation to target and enable autoselection")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
CONFIG_OF_EMBED is intended for debugging and is not recommended for
production devices. Remove it from the Nokia XG-040G-MD defconfig so
Kconfig selects CONFIG_OF_SEPARATE, consistent with the other Airoha
boards.
The existing default device tree and u-boot.bin build target ensure that
the separate DTB is built and appended to the deployable U-Boot image.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Debian 11 ships coreutils 8.32, whose cksum does not support the
-a crc32b option. This leaves crc empty and causes the subsequent shell
arithmetic expression to fail.
Use Python's built-in binascii.crc32 implementation instead. Python 3 is
already required by the OpenWrt build system and produces the same CRC-32
value before the existing final XOR.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Move FIP handling to target now that we compile ATF. This is to have always
in sync new ATF and new U-Boot if one of the 2 is already compiled.
Also add HIDDEN ops to enable autoselection of the U-Boot for the required
target. This is needed to prevent user to deselect the U-Boot package
causing failure on ARTIFACTS generation.
Drop precompiled BL2 and BL31 as they can be now compiled from source.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24257
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for compiling Airoha ATF, based on a modified version of the
TF-A based on 2.10.
The package will clone the base TF-A and apply the modified source and
pre-compiled objects (DDR calibration, eFUSE handling, TX/RX path...) to
correctly compile.
An helper script is added to implement the same format used for special BL2
handling. BL2 is composed of 3 sub-phase with a initial BL21, a BL22 that
loads a LZMA decompressor and BL23 that actually calibrate and loads BL31
ATF.
Also a special flash_table is used to handle SPI-NAND externally to the
BL2, a special Host target is added for that.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24257
Signed-off-by: Robert Marko <robimarko@gmail.com>
The kernel config refresh done with commit
ada7ded disabled the Airoha PM Domain driver
due to the broken Kconfig dependency fixed with an earlier commit.
Add the missing symbol to enable the driver again. Also do a another
kernel config refresh to resolve some dependent PM domain symbols.
Fixes: ada7ded ("airoha: an7583: refresh kernel config")
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The clk-en7523 driver tries to look up the chip-scu regmap via the
"airoha,chip-scu" phandle first. If absent, it falls back to a
compatible-based lookup with syscon_regmap_lookup_by_compatible().
The AN7583 DTSI already had the phandle but AN7581 did not, relying
on the fallback instead. Add it so the DT explicitly describes the
connection and both platforms use the same lookup path.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
dev_pm_domain_attach_list() returns the number of attached PM domains
on success (a positive count), or a negative error code on failure.
The airoha-cpufreq driver checks 'if (ret)' which treats a successful
attachment as an error.
Fix by checking 'if (ret < 0)' like all other users of this API.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add SoC compatible for AN7583 to PM domain driver (the cpufreq driver
already has it).
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The AIROHA_CPU_PM_DOMAIN option was added inside the MediaTek PM Domains
menu, which depends on ARCH_MEDIATEK || COMPILE_TEST. Since Airoha
platforms use ARCH_AIROHA, the menu is invisible during kernel
configuration, silently dropping AIROHA_CPU_PM_DOMAIN. This breaks
running `make kernel_menuconfig`.
Add ARCH_AIROHA to the menu dependency so that this option and its
dependencies (PM_GENERIC_DOMAINS, PM_GENERIC_DOMAINS_OF) remain
enabled on Airoha targets.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The prom initialization is a bit of a mess now with all these
model and soc family checks. And realtek_read_model() function
is the worst offender of all as it goes through all of the model
info register from different SoCs just to read details from one
of them.
We can make use of the .data property in realtek_of_match to
clean things up so that each soc family has its own way of
initialization and reading model details.
Create a struct that will be used for that and add all of the
soc data structs for all chip families.
With all that, remove realtek_read_model() function and most
of the soc_info.family checks in various functions.
In addition, add the rtl960x compatibles along as well so that
rtl960x model info details has somewhere to be used. RTL8198D
is also added as it is part of RTL9607C family.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/24588
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Some rtl9302 based boards use the realtek,rtl838x-soc compatible
in their device tree instead of the correct realtek,rtl9302-soc.
This is also the case for main rtl931x and rtl930x device tree files.
In preperation for utilizing device data in the board-realtek, fix
this up now so that these boards don't end up breaking due to incorrect
prom initialization caused by rtl838x-soc compatible.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/24588
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Instead of putting in the target config where each refresh drops it,
lets disable it in the generic config.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Recent upstream cleanups moved switch port labels to the board level and
disabled switch ports/PHYs by default on the AN7583 SoC dtsi. This broke
ethernet on the Nokia XG-040G-MF since its board DTS was not updated to
explicitly configure and enable them.
Fix this by explicitly enabling gsw_port2-4 along with their respective
PHYs and restoring the "lan2", "lan3", and "lan4" port labels.
Fixes: ce55cdde26 ("airoha: an7583: move the switch port label from soc-level to board-level")
Fixes: d2698d325b ("airoha: an7583: disable all switch ports and PHYs by default")
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/24606
Signed-off-by: Robert Marko <robimarko@gmail.com>
Disable write-protection on sdhci0, similar to the upstream
U-boot DTS. This also enables (obviously) the working overlayfs.
Link: https://github.com/openwrt/openwrt/issues/24602
Fixes: e050bb7946 ("zynq: add Bitmain Antminer S9 control board support")
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
The SCU IOMUX reset puts AN7583 pins 45-47 into GPIO mode. These pins
are shared with eMMC, but the generic eMMC function group only enables
the eMMC mode bit and leaves the GPIO overrides active, preventing the
card from initializing.
Add an AN7583-specific eMMC function group that also clears the GPIO
mode bits for the shared pins.
Fixes: d0110a25ed ("airoha: add pinctrl fixes for AN7581 and AN7583")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
There is no reason to add a custom kmod which is not even an7581
specific as its just the regular Mediatek MT7621 I2C driver.
So, simply enable the driver in kernel configs, drop the inclusion
per-board and remove the kmod definition.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Magnus Kroken
Russell Senior
Rosen Penev
Charles Joynson
Aleksander Jan Bajkowski
Lars Gierth
Chad Monroe
Andrew LaMarche
Zoltan HERPAI
Mikhail Kshevetskiy
Vitaliy Sochnev
xiao bo
Robert Marko
Carlo Szelinsky
Christian Marangi
Daniel Schwierzeck
Rustam Adilov
Mikhail Zhilkin