Currently, sysupgrade will only upgrade the unused slot, however since the
whole dual firmware logic is in the bootscript U-boot will just use the
first bootscript it finds.
So, in a case that you are running slot A it will upgrade slot B, however
that means that slot B will be still booted by the old bootscript that came
with the previous firmware version.
This is an issue if you need to change anything, so lets add a custom
function that upgrades the active bootscript as well after flashing the
slot firmware.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Methode uDPU and eDPU devices are one of the rare ones with a completely
custom image format being used with custom partition table with F2FS.
Instead of converting the boards to dual firmware (A/B style) and further
expand the already convoluted custom scripts, especially considering that
dual firmware conversion is a breaking change anyway, lets convert to using
the generic eMMC sysupgrade based images.
F2FS ZSTD compression is preserved thanks to fstools now supporting its use
on overlays.
Dual firmware support is implemented via U-Boot scripts so no U-Boot
upgrade is required.
Since there is a partition table layout change, eMMC must be wiped and
reflashed with the generated GPT image from OpenWrt initramfs.
Then on each sysupgrade the firmware slot will be altered.
Instructions:
1. Boot into OpenWrt initramfs
2. Copy openwrt-mvebu-cortexa53-methode_edpu-squashfs-emmc-gpt.img.gz to
the device into /tmp
3. Erase eMMC:
dd if=/dev/zero of=/dev/mmcblk0 bs=1M
4. Extract image
gzip -d /tmp/openwrt-mvebu-cortexa53-methode_edpu-squashfs-emmc-gpt.img.gz
5. Flash image
dd if=/tmp/openwrt-mvebu-cortexa53-methode_edpu-squashfs-emmc-gpt.img of=/dev/mmcblk0
6. Reboot
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
ELECOM WRC-X3000GST2 is a 2.4/5 GHz band 11ax (Wi-Fi 6) router based on
IPQ5018. The only hardware difference from the WRC-X3000GS2 is the RAM
capacity; all other peripherals are identical. This port therefore
reuses the GS2 board-2.bin (ipq-wifi-elecom_wrc-x3000gs2) and ath11k
calibration variant.
Specification:
- SoC : Qualcomm IPQ5018
- RAM : DDR3 512 MiB (Kingston Technology D2516ECMDXGJD)
- Flash : SPI-NAND 128 MiB (Macronix MX35UF1G24AD-Z4I)
- WLAN : 2.4/5 GHz 2T2R
- 2.4 GHz : Qualcomm IPQ5018 (SoC)
- 5 GHz : Qualcomm QCN6122
- Ethernet : 5x 10/100/1000 Mbps
- wan (phy) : Qualcomm IPQ5018 (SoC)
- lan (switch) : Qualcomm Atheros QCA8337
- LEDs/Keys (GPIO): 8x / 3x (reset, WPS, router/AP slide switch)
- UART : through-hole on PCB, 4pins near the barcode
- assignment : 3.3V, TX, RX, NC, GND from the barcode side
- settings : 115200n8
- Power : 12 VDC, 1 A (Max. 11.5W)
Flash instruction using factory.bin image:
1. Boot WRC-X3000GST2 normally in router mode
2. Access the WebUI ("http://192.168.2.1/") and open the firmware
update page ("ファームウェア更新")
3. Select the OpenWrt factory.bin image and click apply ("適用")
4. After the device reboots automatically, wait until the green power LED
stops blinking and stays solid
5. When the green power LED is solid, hold the reset button until the red
LED starts blinking to clear remaining stock firmware settings
Switching to the stock firmware:
1. Load the elecom.sh script
. /lib/upgrade/elecom.sh
2. Check the current index of rootfs
bootconfig_rw_index 0:bootconfig rootfs
3. Set the index to inverted value
bootconfig_rw_index 0:bootconfig rootfs <value>
bootconfig_rw_index 0:bootconfig1 rootfs <value>
example:
- step2 returned "0":
bootconfig_rw_index 0:bootconfig rootfs 1
bootconfig_rw_index 0:bootconfig1 rootfs 1
- step2 returned "1":
bootconfig_rw_index 0:bootconfig rootfs 0
bootconfig_rw_index 0:bootconfig1 rootfs 0
4. Reboot
Partition Layout (Stock FW):
0x000000000000-0x000000080000 : "0:SBL1"
0x000000080000-0x000000100000 : "0:MIBIB"
0x000000100000-0x000000140000 : "0:BOOTCONFIG"
0x000000140000-0x000000180000 : "0:BOOTCONFIG1"
0x000000180000-0x000000280000 : "0:QSEE"
0x000000280000-0x000000380000 : "0:QSEE_1"
0x000000380000-0x0000003c0000 : "0:DEVCFG"
0x0000003c0000-0x000000400000 : "0:DEVCFG_1"
0x000000400000-0x000000440000 : "0:CDT"
0x000000440000-0x000000480000 : "0:CDT_1"
0x000000480000-0x000000500000 : "0:APPSBLENV"
0x000000500000-0x000000640000 : "0:APPSBL"
0x000000640000-0x000000780000 : "0:APPSBL_1"
0x000000780000-0x000000880000 : "0:ART"
0x000000880000-0x000000900000 : "0:TRAINING"
0x000000900000-0x000003c40000 : "rootfs"
0x000003c40000-0x000003fc0000 : "Config"
0x000003fc0000-0x000007300000 : "rootfs_1"
0x000007300000-0x000007680000 : "Config_2"
0x000007680000-0x000007b80000 : "Reserved"
0x000007b80000-0x000007c00000 : "FWHEADER"
0x000007c00000-0x000007c80000 : "Factory"
Notes:
- This device has dual-boot feature and it's managed by the index in the
0:bootconfig and 0:bootconfig1 partitions.
- Wi-Fi BDF is shared with WRC-X3000GS2 (ipq-wifi-elecom_wrc-x3000gs2)
as the hardware (SoC, QCN6122, antennas) is identical between the two
models.
- GST2 stock firmware keeps its configuration even when sysupgrade is
called with -n. When installing from the OEM WebUI, those stock
settings can be restored into OpenWrt overlay, so settings must be
initialized after the first OpenWrt boot.
MAC Addresses:
LAN : 38:97:A4:xx:xx:40 (0:APPSBLENV, "eth1addr"/"ethaddr" (text))
WAN : 38:97:A4:xx:xx:43 (0:APPSBLENV, "eth0addr" (text))
2.4 GHz: 38:97:A4:xx:xx:41 (0:APPSBLENV, "wifi0" (text))
5 GHz : 38:97:A4:xx:xx:42 (0:APPSBLENV, "wifi1" (text))
Signed-off-by: Taiga Ogawa <zectaiga@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23471
Signed-off-by: Robert Marko <robimarko@gmail.com>
Hardware specification
----------------------
* RTL9301 SoC, 1 MIPS 34KEc core @ 800MHz
* 512MB DRAM
* 2MB NOR Flash
* 128MB NAND Flash
* 24 x 10/100/1000BASE-T ports with PoE+
* 4 x 10G SFP+ ports
* Power LED, Fault LED, PoE Max LED, LAN Mode LED, PoE Mode LED
* Reset button and LED Mode button on front panel
* LM63 Fan Controller
* UART (115200 8N1) via RJ45
* PSE: Nuvoton M0516LDE via I2C + 3x RTL8238B (not supported yet)
Installation using serial interface
-----------------------------------
1. Press "a" "c" "p" during message "Enter correct key to stop autoboot"
2. Start network "rtk network on"
3. Load image "tftpboot <TFTP IP>:openwrt-realtek-rtl930x_nand-linksys_lgs328mpc-v2-initramfs-kernel.bin"
4. Boot image "bootm"
5. Switch to first bootpartition "fw_setsys bootpartition 0"
6. Download sysupgrade "scp <IP>:openwrt-realtek-rtl930x_nand-linksys_lgs328mpc-v2-squashfs-sysupgrade.bin /tmp/."
7. Install sysupgrade "sysupgrade /tmp/openwrt-realtek-rtl930x_nand-linksys_lgs328mpc-v2-squashfs-sysupgrade.bin"
Installation using OEM webinterface
-----------------------------------
This is not possible because the OpenWrt NAND Flash layout is different
from the vendor layout. To be precise. Vendor uses:
- 64 MB vendor UBI root_data
- 32 MB vendor kernel+root 1 (~19 MB used)
- 32 MB vendor kernel+root 2 (~19 MB used)
OpenWrt uses:
- 64 MB vendor UBI (not touched)
- 10 MB OpenWrt kernel
- 22 MB Openwrt mtd-concat UBI
- 23 MB vendor kernel 2 (space reduced, vendor data unchanged)
- 09 MB OpenWrt mtd-concat UBI
Dual-boot with stock firmware using writable u-boot-env
-------------------------------------------------------
From stock to OpenWrt / primary image 1 (CLI as admin):
- > boot system image1
- > reboot
From OpenWrt to stock / boot image 2: (shell as root)
- # fw_setsys bootpartition 1
- # reboot
Debrick using serial interface
------------------------------
1. Press "a" "c" "p" during message "Enter correct key to stop autoboot"
2. Load vendor image with "upgrade runtime <TFTP IP>:LGS328xxxxx.imag"
3. switch to primary partition "setsys bootpartition 0"
4. safe config "savesys"
MAC Address Source
------------------
The MAC address for this device is coming from the u-boot-env ethaddr cell.
Further documentation
---------------------
See https://openwrt.org/toh/linksys/lgs352c
Signed-off-by: Jan-Henrik Bruhn <git@jhbruhn.de>
Link: https://github.com/openwrt/openwrt/pull/23466
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
This is in preparation for the addition of the LGS328MPC, which is
based on the LGS328C.
It also drops the unused UBINIZE_OPTS, as UBI is only used during runtime
of the firmware, not during build.
Signed-off-by: Jan-Henrik Bruhn <git@jhbruhn.de>
Link: https://github.com/openwrt/openwrt/pull/23466
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Make deactivate fully restore the SerDes to an inert state at both the
MAC and IP layers. Previously deactivate only zeroed the MAC mode via
set_mode(OFF), which on the default branch only writes the MAC mode
register and leaves the IP mode register untouched. The IP mode register
then retained whatever the previous bring-up left behind (force=1 with
a stale mode value, or force=0 from boot defaults), making "deactivate"
not fully deactivate the SerDes.
Replace the set_mode(OFF) call with explicit set_mac_mode(OFF) plus
set_ip_mode(OFF). The latter writes force=1 with mode=OFF, pinning the
IP block to OFF until a subsequent bring-up takes a defined action.
This forced-OFF state would break MAC-driven modes (USXGMII / QSGMII /
XSGMII), which set only the MAC mode register and rely on the IP block
following along. To compensate, add an explicit unforce of the IP mode
force-bit (page 0x1f reg 0x09 bit 6) at the start of the MAC-mode branch
of rtpcs_930x_sds_set_mode. IP-mode bring-up via apply_ip_mode is
unaffected -- it re-asserts force=1 with the target mode value, which
overrides the deactivate force-OFF.
Net result: deactivate fully and explicitly deactivates the SerDes; each
set_mode path takes its own responsibility for the IP mode register
state. The previous asymmetric behaviour (set_mode default branch silently
not touching the IP register) is now explicit code rather than an
implicit accident-of-dispatch.
Verified on RTL930x hardware: SGMII, 2500BASE-X, 10GBASE-R, USXGMII-QX
and XSGMII all bring up correctly with link, traffic and iperf3 as
expected.
Link: https://github.com/openwrt/openwrt/pull/23513
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Move rtpcs_930x_sds_set_power() and rtpcs_930x_sds_rx_reset() out of
rtpcs_930x_sds_apply_ip_mode() and into rtpcs_930x_sds_{de,}activate().
After this, apply_ip_mode is pure IP-mode/CMU/state-machine programming
and the SerDes-core analog power is owned by the outer phase pair, the
same place that already owns the 1G/10G PHY block and fiber RX power.
Behavioural change: USXGMII / QSGMII / XSGMII modes did not previously
go through apply_ip_mode and therefore never had the SerDes-core power
gated on mode transitions. After this commit, every mode transition
power-cycles the SerDes core via the outer deactivate/activate.
For the SGMII / 1000BASE-X / 2500BASE-X / 10GBASE-R path the set of
register writes is unchanged; only the relative ordering vs. the
fiber/PHY power writes shifts: set_power(false) now precedes those
writes (was after), set_power(true) now follows them (was before).
Verified on RTL930x hardware: SGMII, 2500BASE-X, 10GBASE-R, USXGMII-QX
and XSGMII all come up with link, ping and iperf3 throughput as
expected.
Link: https://github.com/openwrt/openwrt/pull/23513
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Move rtpcs_931x_sds_set_mode(sds, hw_mode) ahead of
rtpcs_931x_sds_activate() in rtpcs_931x_setup_serdes(). The IP-block
mode registers latch with the SerDes powered down, so the mode can be
committed during the configure phase rather than after power-on.
This matches the phase order already used by 838x and 930x
(deactivate -> configure -> set_mode -> activate) and is a step toward
a unified bring-up sequence across variants.
Verified on RTL931x hardware: USXGMII, SGMII and 10GBASE-R modes all
come up, link is established, L2 forwarding works, and iperf3 reports
expected throughput.
Link: https://github.com/openwrt/openwrt/pull/23513
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Move the 1G and 10G PHY block power-up writes (clear BMCR_PDOWN on pages
0x02 and 0x04) out of rtpcs_930x_phy_enable_10g_1g() and into
rtpcs_930x_sds_activate(), and add the mirror writes (set BMCR_PDOWN) to
rtpcs_930x_sds_deactivate(). Same for the fiber RX bit.
With 1G PHY / 10G PHY / fiber RX all now handled symmetrically, drop the
rtpcs_930x_phy_enable_10g_1g() helper. The remaining write it contained
(set medium = fiber on page 0x1f reg 11 bit 1) is unrelated to power
management, unconditionally applied, and to-be-inspected for non-fiber
modes. Move it inline into setup_serdes with a TODO comment; proper
mode-aware handling is out of scope for this commit.
Behavioural note: the 1G/10G PHY blocks and fiber RX are now
power-cycled on every mode transition. Previously they were only
powered up (never explicitly down) and the state persisted across
reconfigure. The new behaviour makes each setup_serdes a standalone
bring-up that does not rely on the prior state of these bits.
Link: https://github.com/openwrt/openwrt/pull/23513
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Mirror of the previous sds_deactivate commit: add rtpcs_{838x,931x}_sds_activate()
helpers that each wrap the variant-specific "bring the SerDes back to operational"
block-power call at the end of setup_serdes, and replace the inline call.
- 838x: wraps rtpcs_838x_sds_power(sds, true)
- 931x: wraps rtpcs_931x_sds_power(sds, true)
RTL839x and RTL930x are intentionally not given an activate helper in this
commit:
- RTL839x calls rtpcs_839x_sds_reset() at the end of setup_serdes. That is
a reset pulse whose internals (per-type 10G/5G analog sequences, internal
REG3 0x7146 -> 0x7106 dance) are not yet fully characterized. Aliasing
it as _activate would misrepresent the function.
- RTL930x has no separate activation step: rtpcs_930x_sds_set_mode(sds,
hw_mode) is what commits the new mode and is intended to be surfaced
as its own "set mode" phase in a later commit rather than hidden inside
a variant-specific _activate wrapper.
Both variants will be revisited when their respective phases are clarified.
This commit is a pure refactor, no behavioural change.
Link: https://github.com/openwrt/openwrt/pull/23513
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Add rtpcs_{838x,930x,931x}_sds_deactivate() helpers that each encapsulate
the variant-specific "make SerDes inert before reconfigure" sequence, and
replace the inline calls at the start of each setup_serdes with a single
call to the new helper:
- 838x: wraps rtpcs_838x_sds_power(sds, false)
- 930x: wraps rtpcs_930x_sds_set_mode(sds, RTPCS_SDS_MODE_OFF)
- 931x: rtpcs_931x_sds_power(sds, false) + rtpcs_931x_sds_set_mode(sds,
RTPCS_SDS_MODE_OFF)
RTL839x has no deactivate step to factor out and is left unchanged.
This is a pure refactor: same register writes, same order, same return-
value handling at the call site. The helpers give each variant a named
hook for the deactivate phase and prepare for a subsequent commit that
promotes it to an rtpcs_sds_ops entry and hoists the call site into
rtpcs_pcs_config.
Link: https://github.com/openwrt/openwrt/pull/23513
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Turris Mox boards may include an SDIO Wi-Fi module based on the
Marvell 88W8997 chip. Add kmod-mwifiex-sdio to the default package
list so the driver is included in the image out of the box.
Signed-off-by: Štěpán Dalecký <daleckystepan@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23421
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The bootscript had several issues that prevented squashfs from booting:
- bootpath was set to "/" causing double slashes in load paths (e.g.
"//Image"); changed to "" so "${bootpath}/Image" resolves to "/Image"
- rootflags was set to "commit=5" (a btrfs-specific mount option) for
the ext4/squashfs case; cleared to empty string
- rootfstype was missing in the non-btrfs branch; added "auto" to let
the kernel detect the filesystem; the btrfs branch now sets "btrfs"
explicitly
- bootargs incorrectly referenced ${bootfstype} (the distroboot input
variable) instead of the locally constructed ${rootfstype}
- has_dtb assignment used shell-style "has_dtb=1" but was cleared with
"setenv has_dtb 0"; unified both to use setenv
- DTB load failure message now includes the attempted file path
- Fixed Image.lzma error echo that still used a stale "${subvol}/boot/"
prefix; now consistently uses ${bootpath}
- Removed undefined variable "rootpart" from env delete
Signed-off-by: Štěpán Dalecký <daleckystepan@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23421
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add three backported patches from Linux upstream to fix the onboard
Ethernet controller (dwmac-loongson) detection and driver issues on
Loongson 2K3000 and 3B6000M platforms.
These patches are taken from the upstream Linux kernel and retain the
original authorship and commit logs. No other modifications are made
to the loongarch64 target.
The patches address the following symptoms:
- Onboard network interface not recognized
- Driver probe failures on 2K3000/3B6000M boards
Signed-off-by: xinmu <xinmu@loongfans.cn>
Link: https://github.com/openwrt/openwrt/pull/23366
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for netis EAP930 V1 ceiling access point.
Specification
-------------
- SoC : MediaTek MT7981BA dual-core ARM Cortex-A53 1.3 GHz
- RAM : 256 MiB DDR3 (ESMT M15T2G16128A-EFB)
- Flash : SPI-NAND 128 MiB (ESMT F50L1G41LB-104)
- WLAN : MediaTek MT7976CN dual-band WiFi 6
- 2.4 GHz : b/g/n/ax, MIMO 2x2
- 5 GHz : a/n/ac/ax, MIMO 2x2
- Ethernet : 10/100/1000 Mbps x1 (SoC internal phy)
- USB : No
- Buttons : Reset
- LEDs : 1x Status (red), gpio-controlled
1x Status (blue), gpio-controlled
- Power : 48 VDC (PoE) or 12 VDC, 1.5 A
Installation
------------
1. Connect to the access point using ssh (user: admin, pass: web interface
password)
2. Make mtd backup:
cat /dev/mtd0 | gzip -1 -c > /tmp/mtd0_spi0.0.bin.gz
cat /dev/mtd1 | gzip -1 -c > /tmp/mtd1_BL2.bin.gz
cat /dev/mtd2 | gzip -1 -c > /tmp/mtd2_u-boot-env.bin.gz
cat /dev/mtd3 | gzip -1 -c > /tmp/mtd3_Factory.bin.gz
cat /dev/mtd4 | gzip -1 -c > /tmp/mtd4_FIP.bin.gz
cat /dev/mtd5 | gzip -1 -c > /tmp/mtd5_ubi.bin.gz
3. Download mtd backup from the /tmp dir of the router to your PC using
scp protocol
4. Upload OpenWrt 'bl31-uboot.fip', 'preloader.bin' images to the /tmp
dir of the router using scp protocol
5. Write FIP and BL2 (replace bootloader):
mtd write /tmp/bl31-uboot.fip FIP
mtd write /tmp/preloader.bin spi0.0
6. Place OpenWrt
'openwrt-mediatek-filogic-netis_eap930-v1-initramfs-recovery.itb' image
on the tftp server (IP: 192.168.1.254)
7. Erase 'ubi' partition and reboot the router:
mtd erase ubi
reboot
8. U-Boot automatically boot OpenWrt recovery image from tftp server to
the RAM (1 Gbps link is required)
9. Upload OpenWrt 'sysupgrade.itb' image to the /tmp dir of the router
(IP: 192.168.1.1) using scp protocol
10. Connect to the router using ssh and run:
sysupgrade -n squashfs-sysupgrade.itb
Recovery
--------
1. Place OpenWrt
'openwrt-mediatek-filogic-netis_eap930-v1-initramfs-recovery.itb' image
on the tftp server (IP: 192.168.1.254)
2. Press Reset button and power on the router. After ~10 sec release
the button.
3. Use OpenWrt initramfs system for recovery
Return to stock
---------------
1. Upload stock BL2, FIP, ubi partitions backup archives to the /tmp dir
of the router using scp protocol
2. Connect to the router using ssh and run:
apk update && apk add kmod-mtd-rw
insmod mtd-rw i_want_a_brick=1
mtd unlock BL2
mtd unlock FIP
4. Restore backups:
zcat /tmp/mtd1_BL2.bin.gz | mtd write - BL2
zcat /tmp/mtd4_FIP.bin.gz | mtd write - FIP
zcat /tmp/mtd5_ubi.bin.gz | mtd write - ubi
3. Reboot the router:
reboot
UART
----
Connection parameters: 115200, 8N1, 3.3V
UART pins are silkscreened on the PCB.
MAC addresses
-------------
+---------+-------------------+-----------+
| | MAC | Algorithm |
+---------+-------------------+-----------+
| LAN | 88:xx:xx:88:xx:d3 | label |
| WLAN 2g | 88:xx:xx:18:xx:d4 | |
| WLAN 5g | 88:xx:xx:78:xx:d4 | |
+---------+-------------------+-----------+
The LAN MAC (hex) was found in 'Factory', 0x1fef20
The WLAN 2g/5g MAC prototype (hex) was found in 'Factory', 0x4
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23133
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Remove duplicate KERNEL/KERNEL_INITRAMFS recipes from filogic.mk,
which are already defined in Device/Default for the mediatek target:
KERNEL = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/23490
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Dragino LPS8 is a LoRa/LoRaWAN gateway with single Wi-Fi 4 radio and a
single Fast Ethernet port, based around Dragino HE module.
Specifications:
CPU: Atheros AR9330 SoC @400MHz,
RAM: 64MB DDR,
Flash: 16MB SPI-NOR,
Ethernet: One 100Mbps port.
Wireless: built-in 1x1 802.11 2.4GHz radio,
USB: single USB2.0 High speed host port,
LoRa: Semtech SX1301 or compatible module, dependent on LoRa band.
Power: USB-C 5V, with the usual 5,1k CC resistors missing - use type
A-to-C cable.
LEDs:
- LAN (red)
- WAN/Status (RGB, blue: status, green: WLAN, red: WAN)
- LoRa (bicolor, controlled by Semtech module)
UART: 3.3V 115200-8-N-1 at internal expansion header J2
RxD: pin 4
TxD: pin 6
GND: pin 8
Label MAC: Wi-Fi interface.
Installation:
Log in via SSH to the unit, default username and password are 'root' and
'dragino', respectively. SSH listens on port 2222.
Just 'sysupgrade -n' from vendor firmware, dropping old configuration.
Restore vendor firmware:
the same as installation, just 'sysupgrade -F -n', dropping configuration.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23472
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Dragino MS14 is a small router/development kit with two Fast Ethernet
ports, with single 1x1 2,4GHz Wi-Fi radio and expansion headers.
Specifications:
CPU: Atheros AR9330 SoC @400MHz,
RAM: 64MB DDR,
Flash: 16MB SPI-NOR,
Ethernet: Two 100Mbps ports, LAN on eth0, WAN on eth1,
Wireless: built-in 1x1 802.11 2.4GHz radio,
USB: single USB2.0 High speed host port,
LEDs: 4 status LEDs for system, LAN, WAN and WLAN.
UART: 115200-8-N-1 at the 2x8 header
Label MAC: Wi-Fi interface.
The board support is ported over from old ar71xx target, and only
partially verified using LPS8 board, which will be introduced next.
Installation:
Log in via SSH to the unit, default username and password are 'root' and
'dragino', respectively. SSH listens on port 2222.
Just 'sysupgrade -n' from vendor firmware, dropping old configuration.
Update with configuration from ar71xx builds may be possible, but isn't
guaranteed, as the builds are many releases apart.
Restore vendor firmware:
the same as installation, just 'sysupgrade -F -n', dropping configuration.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23472
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
A recently added patch needs to be refreshed. Do that with make
target/linux/refresh.
Fixes: 89ef8aaf3e ("kernel: backport lm63 enhancements")
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Fix typo in backup partition offset: `0xfe000` should be `0xfe0000`.
The incorrect offset caused the partition to be mapped at `0x0fe000`
instead of `0xfe0000`, placing it inside the firmware partition range.
Signed-off-by: Fil Dunsky <filipp.dunsky@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23511
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware:
- SoC: MediaTek MT7628AN (MIPS 580MHz)
- Flash: 8 MiB NOR
- RAM: 64 MiB DDR2
- WLAN: 2.4 GHz (MT7628)
- Ethernet: 1x 10/100 Mbps WAN, 3x 10/100 LAN (MT7628)
- Buttons: 1x Reset, 1x wps
- LEDs: Front: 1x Red, 1x White
- Serial console: unpopulated header, 115200 8n1
- Power: 12v barrel
MAC addresses:
+---------+-------------------+-----------+
| | MAC | Algorithm |
+---------+-------------------+-----------+
| LAN/WAN | d4:0d:ab:xx:xx:x0 | label |
| WLAN 2g | d4:0d:ab:xx:xx:x1 | label+1 |
+---------+-------------------+-----------+
Migration to OpenWrt:
- Download the RSA-signed intermediate firmware from the Cudy website: `openwrt-ramips-mt76x8-cudy_wr300-squashfs-flash.bin`
- Connect the computer to the LAN and flash the intermediate firmware via the OEM web interface
- OpenWrt is now accessible via 192.168.1.1
Revert to OEM firmware:
- Set up a TFTP server on IP 192.168.1.88 and connect to the WAN port (upper port)
- Provide the Cudy firmware as `recovery.bin` in the TFTP server
- Power on the device and hold the reset button immediately after the first LED blink
- The recovery process will start
- When the recovery process is done, OEM firmware is accessible via 192.168.10.1 again
General information:
- No possibility to load an initramfs image via U-Boot because there is no option to interrupt U-Boot
Signed-off-by: Fil Dunsky <filipp.dunsky@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23426
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These were found by running:
comm -12 <(sort target/linux/generic/config-6.18) \
<(sort target/linux/armsr/config-6.18)
A similar process has been run between armsr/config-6.18
and armsr/armv8/config-6.18, though I have not pruned
the armv8 as much. Once the main branch switches armsr
to 6.18 we can do a more aggressive deduplication.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://github.com/openwrt/openwrt/pull/21433
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
The armv8 configuration has more features enabled compared to armv7,
as armv8 is intended to run on a selection of real hardware, while
armsr/armv7 almost always runs only in QEMU.
Some kmod dependency issues were appearing on armv7 builds which
did not appear elsewhere. To minimise these issues, we will
move the framebuffer feature set to the top level of the target.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://github.com/openwrt/openwrt/pull/21433
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Set the configuration options that were prompted for
by the new kernel.
ARCH_CIX (Cixtech) has been enabled as their SoCs
have appeared in high end arm64 hardware.
There are also new Arm64 SoCs from Renesas and
Allwinner that should be bootable with the right
firmware stack.
There are minimal changes in the armv7 config,
only CONFIG_PAGE_BLOCK_MAX_ORDER has a unique
setting.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://github.com/openwrt/openwrt/pull/21433
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
NXP has introduced an evolved version of the LS1028A ENETC
IP in their new i.MX94/5 family. While the two devices
share a common lineage, they are different enough that
they cannot be implemented in the same driver.
Hence some functions from the LS1028A ENETC driver have been
split into a 'library'.
When a kmod package for the new ENETC (nxp-enetc4) is introduced then
the packaging for the common library will need to be reworked.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://github.com/openwrt/openwrt/pull/21433
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
In target/linux/generic/backport-6.18/ we have backported
bitfield changes from 6.19.
This change to drivers/soc/renesas/rz-sysc.c was part
of the same patch series and is needed to resolve
a duplicate definition compile error.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://github.com/openwrt/openwrt/pull/21433
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
In OpenWrt we have backported changes to bitfield.h
from kernel 6.19.
A backport fix, 9966c8cc987e ("irqchip/renesas-rzv2h:
Prevent TINT spurious interrupt during resume") into
linux-stable/linux-6.18.y modified irq-renesas-rzv2h.c
to include it's own field_get, which does not exist
in the 6.18 branch, causing a compile error.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://github.com/openwrt/openwrt/pull/21433
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Now, that the support for e750a/e600g/e600gac is merged, enable link state
reporting for the Fast Ethernet port attached through the built-in switch,
so it can generate netifd and hotplug events as well, for example -
- to control DHCP client.
Signed-off-by: 张 鹏 <sd20@qxwlan.com>
Link: https://github.com/openwrt/openwrt/pull/9971
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add node for swphy1 in qca953x.dtsi, as it is common part - but make it
disabled, as this one is rarely used in other devices. Enable it in
RBmAP-2nD and attach to eth1 as PHY.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/9971
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now, that the support for ZF7372 is merged, enable link state reporting
for the Fast Ethernet port attached through the built-in switch, so
it can generate netifd and hotplug events as well, for example -
- to control DHCP client.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/9971
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Introduce the property from previous commit on the SoCs which use a
fixed 1000FD link to their internal switch. This way, devices which have
a single port attached through it can drop the "fixed-link" node if
needed, and attach proper phy-handle provided by built-in switch to
the port, to report link status information on userspace.
AR7100 is skipped intentionally, because its connection to built-in
switch isn't a fixed-link.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/9971
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
To support reporting link state of PHYs attached to built-in switch,
add a device tree knob which allows to force 1000Mbps/FD mode,
which is the link mode between eth1 MAC and the on-chip switch, even if
no "fixed-link" node is present. Re-use the "builtin-switch" name
already used in respective MDIO nodes.
This way, a phy-handle property can be added to eth1 node, and devices,
which have a single port attached through the built-in switch,
can report proper link state of that to userspace.
To perform that, one needs to delete the 'fixed-link' node and map the
correct swphy node to 'phy-handle' property. One of those is still
required to be present in the eth1 node.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/9971
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
EN7581 or AN7583 SoCs support connecting multiple external SerDes (e.g.
Ethernet or USB SerDes) to GDM3 or GDM4 ports via a hw arbiter that
manages the traffic in a TDM manner. As a result multiple net_devices can
connect to the same GDM{3,4} port and there is a theoretical "1:n"
relation between GDM ports and net_devices.
┌─────────────────────────────────┐
│ │ ┌──────┐
│ P1 GDM1 ├────►MT7530│
│ │ └──────┘
│ │ ETH0 (DSA conduit)
│ │
│ PSE/FE │
│ │
│ │
│ │ ┌─────┐
│ P0 CDM1 ├────►QDMA0│
│ P4 P9 GDM4 │ └─────┘
└──┬─────────────────────────┬────┘
│ │
┌──▼──┐ ┌────▼────┐
│ PPE │ │ ARB │
└─────┘ └─┬─────┬─┘
│ │
┌──▼──┐┌─▼───┐
│ ETH ││ USB │
└─────┘└─────┘
ETH1 ETH2
This series introduces support for multiple net_devices connected to the
same Frame Engine (FE) GDM port (GDM3 or GDM4) via an external hw
arbiter. Please note GDM1 or GDM2 does not support the connection with
the external arbiter.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://github.com/openwrt/openwrt/pull/23481
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Robert Marko
Taiga Ogawa
Jan-Henrik Bruhn
Tianling Shen
Rosen Penev
Jonas Jelonek
Štěpán Dalecký
xinmu
Mikhail Zhilkin
Chukun Pan
Lech Perczak
Mario Andrés Pérez
Fil Dunsky
Mathew McBride
John Audia
Shiji Yang
张 鹏
Lorenzo Bianconi