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The video codecs sit behind their own IOMMUs, but with the default domain set to passthrough their buffers have to be physically contiguous and come out of the 16 MiB CMA pool. A 4K frame needs 15.8 MiB of it, so hardware decoding of 4K video fails allocation and falls back to software: 10 seconds of 4K HEVC then cost 22 seconds of CPU, where the decoder does the same work with 0.15. Have rockchip-iommu ask for a translated domain for the masters it serves, so the display, codec, ISP and RGA blocks get scatter-gather while everything behind another IOMMU, PCIe included, keeps the system default and its throughput. Signed-off-by: Daniel Golle <daniel@makrotopia.org>