Some W1700K and XR1701G boards with Realtek RTL8261N/RTL8261BE 10G PHYs
fail to bring up the USXGMII link on cold boot. The PHY enters a bad
state during initialization and the link stays down permanently until
power cycle.
Root cause: the GPIO reset assert/deassert timing (40ms/150ms) is too
short for the RTL8261N to complete its internal firmware load. The OEM
firmware uses 200ms/200ms.
Increase both PHY reset timings to 200ms/200ms to match OEM values.
Confirmed to fix intermittent boot failures on both W1700K (Gemtek)
and XR1701G boards.
Signed-off-by: Ryan Chen <rchen14b@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22564
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK macro was shifting
the 4-bit mask (0xF) by only (_extint % 2) bits instead of
(_extint % 2) * 4. This caused the mask to overlap with the adjacent
nibble when configuring odd-numbered external interfaces, selecting
the wrong bits entirely.
Align the shift calculation with the existing ...MODE_OFFSET macro.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/23285
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Ethernet LAN port is set to `eth1` (silkscreen "ETH2" and case label "2") next to the 2x USB Type-A
ports and WAN is set to `eth0` (silkscreen "ETH1" and case label "1") next to the USB Type-C port.
The USER ("reset") button serves as the reset button. A short press will reboot and a long press
will reset to factory settings (deleting all data) if using squashfs image.
MASK ("maskrom") and RCRY ("recovery") buttons are enabled but are not set to any specific function
Pressing the POWER button will `poweroff` the device and it will stay off until a power cycle.
Hardware
---------------
* SoC: RockChip RK3576 64-bit ARMv8-A 8 cores big.LITTLE (4x A72 and 4x A53)
* RAM: 3/4GB LPDDR4X or 8/16GB LPDDR5
* Ethernet: 2x GbE (SoC RGMII MAC, RTL8211F PHY)
* 3x LEDs (SYS - red / 1 (WAN) - green / 2 (LAN) - green)
* 4x Buttons (MASK ("maskrom"), RCRY ("recovery"), USER ("reset" - OpenWrt reset), POWER)
* 1x 16MiB SPI NOR on board
* 1x UFS slot for optional UFS 2.0 module (currently not supported)
* 1x microSD card slot (UHS-I)
* 1x HDMI OUT
* 1x Headphone OUT 3.5mm
* 1x M.2 M-key 2280 PCIe slot (PCIe 2.1 x1 supports NVMe SSD)
* 1x M.2 E-key *SDIO* slot for optional RTL8822CS Wi-Fi 5
* the case has integrated antennae as well as 2x knockouts
* the device tree is missing the nodes relevant to Wi-Fi operations so it's not supported for now.
* 2x USB 3.2 Gen 1 Type-A Ports
* Power: 1x USB Type-C 6V-20V with both DC and USB PD supported
* Serial: 1500000 8N1 3.3V - 2.54mm 3-pin header next to HDMI
MAC addresses
---------------
WAN (`eth0` case label "1"): generated from /sys/.../mmcblk0/cid (CID of SD card)
LAN (`eth1` case label "2"): WAN + 1
Installation
---------------
Decompress the archive of the OpenWrt sysupgrade image and write it to a microSD card using `dd`
or use Balena Etcher (no need to decompress).
Boot
---------------
Insert microSD card, set boot switch to "UFS/SD" and then supply power.
Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/23008
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Apply pending U-Boot patches so that Rockchip RK3576 devices can boot from SD card. The problem:
"The BootROM on RK3576 has an issue loading boot images from an SD-card. This issue can be worked
around by injecting an initial boot image before TPL…and return to BootROM to load next image, TPL"
Compilation of the initial boot image has been added to the U-Boot build recipe.
Tested on FriendlyELEC NanoPi M5
Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/23008
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Select `CONFIG_ROCKCHIP_SARADC=y` to enable Rockchip SAR ADC
Add ADC Ladder Buttons driver as a kernel module as well as `kmod-button-hotplug` to the list of
default packages for Rockchip targets that have buttons connected to ADC, not including some
devices (e.g. NanoPi R76S) that have ADC buttons which are not in the device tree.
This is needed to use buttons on Rockchip devices that are connected to ADC and not GPIO
Tested on FriendlyELEC NanoPi M5
Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/23008
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add chip info entry for the Realtek RTL8367SB switch. This device has
chip ID 0x6367 and version 0x0010. It exposes two external interfaces:
port 6 supports MII, TMII, RMII, RGMII, SGMII and HSGMII, while port 7
supports MII, TMII, RMII and RGMII. Use the existing 8365MB-VC jam table
for initialization.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/23345
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RG-EW1300G is a router with 1 x WAN and 3 x LAN gigabit ports.
The router runs on Ruijie OS by default.
- Specifications:
* SoC: MT7621A
* RAM: 128MB DDR3
* Flash: 16MB SPI NOR flash (GD25Q128C)
* WiFi0: Mediatek MT7615 2.4GHz 802.11b/g/n
* WiFi1: Mediatek MT7615 5GHz 802.11ac
* Ethernet: MT7530, 4x 1000Base-T.
* UART: Serial console - As marked on PCB, baudrate is 57600. DO NOT CONNECT 3.3V.
* Buttons: Reset, WPS.
* LED: Programmable LEDs via GPIO working for Red+Green status, and Mesh/WPS at the rear of the chassis.
- Default Flash:
```
GD25Q128C(c8 40180000) (16384 Kbytes)
mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
6 cmdlinepart partitions found on MTD device raspi
Creating 6 MTD partitions on "raspi":
0x000000000000-0x000000050000 : "u-boot"
0x000000050000-0x000000060000 : "u-boot-env"
0x000000060000-0x000000070000 : "Factory"
0x000000070000-0x000000080000 : "product_info"
0x000000080000-0x000000090000 : "kdump"
0x000000090000-0x000001000000 : "firmware"
0x00000031a847-0x000001000000 : "rootfs"
mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
mtd: partition "rootfs_data" created automatically, ofs=0xae0000, len=0x520000
0x000000ae0000-0x000001000000 : "rootfs_data"
register mt_drv
```
```
cat /proc/mtd
dev: size erasesize name
mtd0: 00050000 00010000 "u-boot"
mtd1: 00010000 00010000 "u-boot-env"
mtd2: 00010000 00010000 "factory"
mtd3: 00010000 00010000 "product_info"
mtd4: 00010000 00010000 "kdump"
mtd5: 00f70000 00010000 "firmware"
mtd6: 0028a847 00010000 "kernel"
mtd7: 00ce57b9 00010000 "rootfs"
mtd8: 00520000 00010000 "rootfs_data"
```
- Installation:
1. Open the case, solder to the marked 4 pin header
2. Connect it to a USB-UART TTL (do not connect to 3.3v)
3. Open a terminal with baud 57600.
4. Power on device, and repeatedly press "2" key to catch bootloader option
5. Set IP, TFTP server IP, and image file to load (eg, openwrt-ramips-mt7621-ruijie_rg-ew1300g-v1-squashfs-sysupgrade.bin)
6. System will reboot into OpenWRT.
Signed-off-by: Matt Brent <git@mattzfiber.co.za>
Link: https://github.com/openwrt/openwrt/pull/21864
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
With new PCS implementation, the pcs property needs to be updated to the
new name of 'pcs-handle' to correctly work with PCS fwnode
consumer/provider.
Fixes: 4d5f579a81 ("airoha: update PCS node in DTSI for new PCS implementation")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The nRESET pins of the RTL8224 PHYs on the PSX8/PSX10 are wired to GPIO6
(lan1-4) + GPIO10 (lan5-8) of the SoC, but this was never described in the
devicetree.
GPIO 6 is the global reset shared by (logical) PHYs 0-3 on MDIO bus0. GPIO
10 is the global reset shared by (logical) PHYs 8-11 on mdio bus0. It is
intentionally not declared as reset-gpios on any bus: the MDIO driver /
phylink only support a single reset GPIO per bus, not two (or more). And a
GPIO can only be used as reset-gpio on a single PHY. Attaching it to a
single PHY would still reset the other PHYs on the same chip as a side
effect, leaving their software state out of sync with the hardware and
likely breaking them.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/23297
Signed-off-by: Robert Marko <robimarko@gmail.com>
The nRESET pins of the RTL8224 PHYs on the PSX28/ESX28 are wired to GPIO29
of the SoC, but this was never described in the devicetree.
GPIO 29 is the global reset shared by all PHYs across all MDIO busses. It
is intentionally not declared as reset-gpios on any bus: the MDIO driver /
phylink only support a reset GPIO per bus, not on the parent controller.
Attaching it to a single bus would still reset the PHYs on the other busses
as a side effect, leaving their software state out of sync with the
hardware and likely breaking them.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/23297
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for the Meraki Z3C "Teleworker" device with
802.11ac, LTE Cat 3 modem, and an integrated 5 port Gigabit switch.
Port 5 has POE output (802.3af). The WAN port is used for tftp booting
in U-Boot.
This device ships with secure boot, and cannot be flashed without an
external programmer.
|||
|--|--|
|Model|Z3C|
|CPU|Qualcomm Atheros IPQ4029|
|Flash MB|128 NAND|
|RAM MB|512|
|WLAN Hardware|Qualcomm Atheros IPQ4029|
|WLAN 2.4GHz|b/g/n 2x2|
|WLAN 5.0GHz|a/n/ac 2x2|
|WWAN|LTE Cat 3|
|Ethernet 1Gbit ports|5|
The LAN/WiFi MAC addresses are sourced from an internal I2C EEPROM.
Z3C-HW-NA (NA: North America) supports LTE bands: 2,4,5,13,17
Z3C-HW-WW (WW: World-wide) supports LTE bands: 1,3,7,8,20
Disassembly:
Remove the four T8 screws on the bottom of the device under the rubber feet.
Using a guitar pick or similar plastic tool, insert it on the side between
the bottom case and the side, pry up gently. The plastic bottom has 18 latches
around the perimeter (but none on the rear by the Ethernet ports).
Remember to remove the SIM tray!
Gently remove the metal RF shield on the bottom of the PCB.
The TSOP48 NAND flash (U30, Spansion S34ML01G200TFV00) is located on the bottom
side of the PCB (facing you as you remove the bottom plastic). To flash, you
will need to desolder the TSOP48. Attempts to flash in-circuit using a 360 clip
were unsuccessful.
The SOIC8 I2C EEPROM (U32, Atmel 24C64) is located on the bottom side of the PCB
under a metal RF shield. It can be flashed in circuit using a chip clip. You may
have to bend the RF shield up to fit the chip clip.
The UART header is on the top (opposite) side of the PCB. You do not need to
remove any more screws to remove the PCB. The PCB has some thermal interface
material for heat dissipation and will be slightly difficult to remove the
first time. Gently pry up on the green PCB from one of the front corners until
the thermal pads break contact with the top case. You can then lift out the
entire PCB, including the attached LTE/WiFi antennas.
Installation:
The dumps to flash can be found in this repository:
https://github.com/halmartin/meraki-openwrt-docs/tree/main/z3c
The device has the following flash layout (offsets with OOB data):
```
0x000000000000-0x000000100000 : "sbl1"
0x000000100000-0x000000200000 : "mibib"
0x000000200000-0x000000300000 : "bootconfig"
0x000000300000-0x000000400000 : "qsee"
0x000000400000-0x000000500000 : "qsee_alt"
0x000000500000-0x000000580000 : "cdt"
0x000000580000-0x000000600000 : "cdt_alt"
0x000000600000-0x000000680000 : "ddrparams"
0x000000700000-0x000000900000 : "u-boot"
0x000000900000-0x000000b00000 : "u-boot-backup"
0x000000b00000-0x000000b80000 : "ART"
0x000000c00000-0x000007c00000 : "ubi"
```
* Dump your original NAND (if using nanddump, include OOB data).
* Decompress `u-boot.bin.gz` dump (contains OOB data) and overwrite the
`u-boot` portion of NAND from `0x738000-0x948000` (length `0x210000`).
* Decompress `ubi.bin.gz` dump (contains OOB data) and overwrite the `ubi`
portion of NAND from `0xc60000-0x8400000` (length `0x77a0000`).
* Dump your original EEPROM. Change the byte at offset `0x49` to `0x1e`
(originally `0x2a`). Remember to re-write the EEPROM with the
modified data.
* This can be done on Linux via the following command:
`printf "\x1e" | dd of=/tmp/eeprom.bin bs=1 seek=$((0x49)) conv=notrunc`
**Note**: the device will not boot if you modify the board major number and
have not yet overwritten the `ubi` and `u-boot` regions of NAND.
* Resolder the NAND after overwriting the `u-boot` and `ubi` regions.
OpenWrt Installation:
* After flashing NAND and EEPROM with external programmers. Plug in an
Ethernet cable and power up the device.
* The new U-Boot build uses the space character `" "` (without quotes) to
interrupt boot.
* Interrupt U-Boot and `tftpboot` the OpenWrt initramfs image from your
tftp server
```
dhcp
setenv serverip <your_tftp>
tftpboot openwrt-ipq40xx-generic-meraki_z3c-initramfs-uImage.itb
```
* Once booted into the OpenWrt initramfs, created the `ART` ubivol with
the WiFi radio calibration from the mtd partition:
```
cat /dev/mtd10 > /tmp/ART.bin
ubiupdatevol /dev/ubi0_1 /tmp/ART.bin
```
* `scp` the `sysupgrade` image to
the device and run the normal `sysupgrade` procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_z3c-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_z3c-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
* Note: To use the LTE modem as a WWAN, you must install `modemmanager`
(you probably also want `luci-proto-modemmanager`) and then configure
the modem for your provider.
Due to OpenWrt policies these packages are not included in the
initramfs/sysupgrade image.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23307
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove target/linux/ipq40xx/dts/qcom-ipq4029-wired-qca-common.dtsi
This file is no longer used after the ipq40xx Meraki device tree
refactoring that occurred last year when adding support for the MR30H.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23307
Signed-off-by: Robert Marko <robimarko@gmail.com>
This fixes:
* CVE-2026-6042: Algorithmic Complexity DoS in musl libc iconv
* CVE-2026-40200: musl libc: stack corruption in qsort with sufficiently large inputs
Link: https://github.com/openwrt/openwrt/pull/23329
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Update the PCS node in AN7581/AN7583 .dtsi for new PCS implementation.
The #pcs-cell is now needed for the produced/consumer implementation.
Also add entry for USB and PCIe PCS for AN7581 but keep them disabled
by default. USB and PCIe PCS for AN7583 node will be added later once PHY
code will stabilize.
Link: https://github.com/openwrt/openwrt/pull/23271
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Migrate Airoha PCS/Ethernet pending patch to PCS standalone implementation.
This new implementation drop the hack of reading and accessing the dev from
a different device and drop the legacy pcs_create/drop implementation in
favor of fwnode one with a provider/consumer approach.
This is also to sync with the proposed series posted upstream for revision.
The new PCS patch for AN7581 implement full support for USB and PCIe PCS.
Link: https://github.com/openwrt/openwrt/pull/23271
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport phylink_replay_link() API patch from upstream kernel. This is
mostly needed for force_major_config bool in phylink struct needed for new
standalone PCS series.
While at it also rename the current 703 patch to 703-01 as it's part of the
same series merged upstream.
All patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/23271
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
With Kernel 6.18 the kernel size exceeds 4MB. Without additional changes
to the partition layout or kernel size reduction, the image will not be
usable. Disable this sub-target until necessary changes or a decision
regarding its removal have been made.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/22761
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Without explicit dependency between these two packages compilation
against Kernel 6.18 fails with the following error:
Package kmod-leds-turris-omnia is missing dependencies for the
following libraries: turris-omnia-mcu.ko
Make the dependency explicit to resolve this issue.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/22761
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The current 150s watchdog timeout is too aggressive, leading to
premature hostname re-resolution on alive connections.
Even with a 25s keepalive, handshakes may not occur within the 150s window.
Increasing the timeout to 180s aligns the watchdog with WireGuard's
REJECT_AFTER_TIME constant, ensuring we only re-resolve when the connection
is truly considered dead.
Signed-off-by: Roberto Almeida Silva <robertoalmeidasilva1981@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23248
Signed-off-by: Robert Marko <robimarko@gmail.com>
Although the AN8855 eFuse driver was merged upstream, other
drivers were not. Restore Kconfig dependencies to enable it.
Also remove useless change logs from the patch.
Fixes: 2129465 ("mediatek: fix patches for Linux 6.18")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/23250
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Manual workflow_dispatch and push share the same ref on main, so
they previously landed in the same concurrency group
'Build Kernel-refs/heads/main' (and the equivalent for the packages
workflow). With cancel-in-progress: false for non-PR events, only
one run can be pending per group: a newer queued run cancels the
older pending one.
That made the manual trigger unreliable in both directions. A push
landing while a dispatch was queued displaced the dispatch (so the
ccache reseed never ran), and dispatching while a push was queued
displaced the push (so the legitimate per-commit build was lost).
Adding github.event_name to the concurrency group puts pushes,
dispatches, and pull_requests in separate buckets on the same ref,
so they no longer compete with each other.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Link: https://github.com/openwrt/openwrt/pull/23283
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Allow the Build Kernel and Build all core packages workflows to be
launched manually from the Actions tab. The shared workflow side
detects workflow_dispatch and, for Build Kernel, rebuilds the full
target/subtarget matrix including testing kernel versions, so a
manual run can re-seed the s3 ccache when a queued push run got
displaced from the concurrency queue by the next commit on main.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Link: https://github.com/openwrt/openwrt/pull/23283
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The vendor firmware checks for a bmt header in the last 528 erase blocks
of flash. The OpenWrt partition table did not respect that requirement,
and therefore the vendor and openwrt chainloader fight over those blocks
on every boot, potentially corrupting data stored in UBI blocks there.
This commit increases the size of the reserved_bmt partition to avoid
that fight.
Although the vendor bootloader only seems to touch the final 250 erase
blocks[1], the original vendor firmware system partition ended at
0x1be00000[2], so to be conservative, the consensus is to use that as
the end of mtd2 (ubi) partition and leave the last 528 blocks for mtd3
(reserved_bmt).
From https://openwrt.org/toh/gemtek/mxf-w1700k:
[1] OEM bootlog: [ 5.324337] bmt pool size: 250
[2] OEM bootlog: [ 5.478927] 0x000008600000-0x00001be00000 : "system"
Adds a compat_version to warn users to re-install to accomodate the
shrunken mtd2 ubi partition.
Fixed two nits suggested by Claude, zero padding a hex value and removed
an extra space.
Removed the wildcard setting of compat_version for other boards, as
suggested by Robert Marko, set compat_version only for the w1700k.
Reported-by: Loïc Yhuel <loic.yhuel@gmail.com>
Signed-off-by: Russell Senior <russell@personaltelco.net>
Link: https://github.com/openwrt/openwrt/pull/23061
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL930x calibration code is especially chatty. There are debug
prints for every start and end of a section corresponding to the
sections the SDK uses. In the end, this doesn't help a user much and
just wastes CPU cycles. Moreover it doesn't help in understand what is
done there. As a first step, drop "start" and "end" prints but preserve
their meaning as comments.
While at it, slightly adjust two other prints and drop one confusing
print.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23288
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is no need to be extra chatty for simple writes which set a single
bit. As a nice side effect, without the prints there's no need to have
open-coded register access when there a helper that covers that.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23288
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SerDes setup code for RTL931x still has a lot of debug prints as
pr_info from former times. A lot has changed and we don't need that
rather useless chattiness anymore. We reached a state where we have a
standalone setup of most hardware modes. The registers printed are still
"documented" in rtpcs_931x_sds_config_hw_mode and
rtpcs_93xx_sds_config_cmu. For every other issues we rely on comparison
of full SerDes dumps instead of cherry-picked registers.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23288
Signed-off-by: Robert Marko <robimarko@gmail.com>
Specifications
==============
- SoC: RTL9302C
- Flash: 32 MiB SPI NOR flash
- RAM: 256 MiB
- Ethernet: 8x 10/100/1000/2500 Mbps (RTL8224)
- PoE: 802.3 af/at/bt on 8x RJ45 ports
- 60W per port, 130W total budget
- SFP: 2x SFP+ cages
- UART: 1x 4 pins serial header, 115200 bauds, 8n1, 3.3v logic levels,
pinout: unused (top), TX, RX, GND (bottom)
- Buttons: 1x "Restore" button, 1x "LED mode" button
MAC address
===========
Single MAC address derived from board partition with vendor-specific
format. MAC address is 70:49:a2:xx:xx:xx and applied to all switch
ports.
PoE
===
PoE is supported by realtek-poe package. To make it work, additional
options in the realtek-poe configuration file /etc/config/poe must be
set:
config globals
option force_baudrate '115200'
option force_dialect 'realtek'
Disclaimer
==========
Flashing OpenWrt will overwrite BootExtension + ZyNOS. BootExtension
functionality is not available anymore then. The U-boot/Bootbase still
has some limited functionality which can be used in emergency cases.
Installation
============
Simple web upgrade:
1. Take the OpenWrt factory.bin image generated by the build.
2. In the ZyNOS web UI, login and go to Maintenance -> Firmware Upgrade.
3. Under "Boot Image", make sure the Config Boot Image is set to 1. In
other words, make sure the switch booted from firmware image 1 or it
will do so on next reboot.
This is crucial, otherwise OpenWrt cannot boot.
4. Below, select and upload the factory.bin image. After clicking
upgrade, the image will be flashed.
5. After flashing has finished, reboot the switch. It will now boot into
OpenWrt.
U-Boot
======
This device ships with U-boot masked as Bootbase. After the device is
powered, a DRAM test is performed. Spamming $ during that test will drop
you into a shell after test finished. You'll have a limited command set
at first.
Unlocking the shell with [1] or [2] will give you a normal U-boot
command set. From here, you can perform initramfs boot or recovery.
Initramfs boot:
> loady 0x82000000 + go 0x82000000
Recovery:
> upgradeY image2 0x82000000 115200
Return to stock firmware
========================
1. Download the firmware for the switch from Zyxel website.
2. Unzip the download, there should be a .bin file with a alphanumeric
name.
3. Upload this file to running OpenWrt.
4. Run (use -F since the image doesn't have image metadata):
> sysupgrade -F <stock-firmware>.bin
5. Wait for the sysupgrade to succeed and the switch reboot. At the next
boot, ZyNOS should come up again.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x SoCs have a second serial interface UART1 which is exposed on
dual-function pins shared with JTAG. The SoC defaults to the JTAG
functionality after reset. Similar to existing pinmux registers, there's
a separate register for that where a selector decides about JTAG vs
UART.
Add a now pinctrl node for that register and a pinmux node to enable
UART1 functionality. Reference the pinmux in the (by default disabled)
uart1 node. Without this, UART1 doesn't work when it is actually needed.
This is e.g. the case with some PoE-capable switch where the PSE MCU
communicates with the SoC via UART instead of I2C.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
The XMG1915 is a switch family with multiple variants sharing nearly
all hardware (same SoC, PHYs, SFP cages, LEDs) and mainly differing
in PoE and minor details.
In preparation for adding further variants, move the bulk of the
device tree into a shared rtl9302_zyxel_xmg1915.dtsi and reduce the
per-device dts to the device identity (compatible, model) plus any
variant-specific nodes.
For images, factor a Device/zyxel_xmg1915 template holding the shared
build settings so per-device definitions only need DEVICE_MODEL.
No functional change for XMG1915-10E.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
So far the XMG1915-10E used the rt-loader-bootbase recipe which
produces a separate loader.bin and only allows installation/upgrade
from the CLI side, not via the Zyxel web UI.
Switch to the standard zyxel_zynos image recipe shared with the other
Zyxel rtl930x devices. The loader now lives inside the 'factory'
parent partition introduced in the previous commit, so the resulting
single sysupgrade image can be flashed both from the vendor web UI
and via sysupgrade. Hook the device into the existing xs1930 case in
platform.sh which sets PART_NAME=factory and calls default_do_upgrade.
This makes the installation and revert procedure in 94607d6285
("realtek: add support for Zyxel XMG1915-10E") mostly obsolete and
partly not working anymore (due to different build images that are
emitted).
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
When support for this device was added, the partition layout was defined
in a way that doesn't use space as intended and wastes quite a lot of
it.
(1) firmware partition starts at offset 0x1260000. This is the second
partition/B partition in the A/B scheme used by Zyxel. While the
commit mentions the image is written to A, the firmware partition
is defined in the B space.
(2) firmware partition only ~16MB in size. The device has a total of
32MB of flash. The vendor uses an A/B scheme but OpenWrt doesn't use
it. Thus, OpenWrt can make use of the full available space.
(3) loader partition too big. Other devices using rt-loader explicitly
in a partition use a size of 0x10000. This is more than enough
already. The device here uses 0x30000 which is mostly wasted.
Those issues are fixed accordingly. While at it, move partitions 'loader'
and 'firmware' into a parent partition 'factory'. This is a preparation
for adding web upgrade support for this device.
Fixes: 94607d6285 ("realtek: add support for Zyxel XMG1915-10E")
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now there is a O(n) loop that looks up a port for a
given bus/phy combination. This is slow for high port count
devices (RTL839x and RTL931x). Implement a efficient reverse
lookup table for that.
While we are here adapt tiny bits of the documentation to
better reflect the driver logic after the recent refactoring.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Ryan Chen
Qingfang Deng
Mieczyslaw Nalewaj
Ryan Leung
librarat876
Matt Brent
Mikhail Zhilkin
Christian Marangi
Sven Eckelmann
Hal Martin
Hauke Mehrtens
Hannu Nyman
Stefan Kalscheuer
Shiji Yang
Roberto Almeida Silva
Chukun Pan
Vincent Legoll
Russell Senior
Jonas Jelonek
Markus Stockhausen